serial_ar933x.c 5.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
  4. */
  5. #include <common.h>
  6. #include <clock_legacy.h>
  7. #include <dm.h>
  8. #include <div64.h>
  9. #include <errno.h>
  10. #include <serial.h>
  11. #include <asm/io.h>
  12. #include <asm/addrspace.h>
  13. #include <asm/types.h>
  14. #include <dm/pinctrl.h>
  15. #include <linux/bitops.h>
  16. #include <mach/ar71xx_regs.h>
  17. #define AR933X_UART_DATA_REG 0x00
  18. #define AR933X_UART_CS_REG 0x04
  19. #define AR933X_UART_CLK_REG 0x08
  20. #define AR933X_UART_DATA_TX_RX_MASK 0xff
  21. #define AR933X_UART_DATA_RX_CSR BIT(8)
  22. #define AR933X_UART_DATA_TX_CSR BIT(9)
  23. #define AR933X_UART_CS_IF_MODE_S 2
  24. #define AR933X_UART_CS_IF_MODE_M 0x3
  25. #define AR933X_UART_CS_IF_MODE_DTE 1
  26. #define AR933X_UART_CS_IF_MODE_DCE 2
  27. #define AR933X_UART_CS_TX_RDY_ORIDE BIT(7)
  28. #define AR933X_UART_CS_RX_RDY_ORIDE BIT(8)
  29. #define AR933X_UART_CLK_STEP_M 0xffff
  30. #define AR933X_UART_CLK_SCALE_M 0xfff
  31. #define AR933X_UART_CLK_SCALE_S 16
  32. #define AR933X_UART_CLK_STEP_S 0
  33. struct ar933x_serial_priv {
  34. void __iomem *regs;
  35. };
  36. /*
  37. * Baudrate algorithm come from Linux/drivers/tty/serial/ar933x_uart.c
  38. * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
  39. */
  40. static u32 ar933x_serial_get_baud(u32 clk, u32 scale, u32 step)
  41. {
  42. u64 t;
  43. u32 div;
  44. div = (2 << 16) * (scale + 1);
  45. t = clk;
  46. t *= step;
  47. t += (div / 2);
  48. do_div(t, div);
  49. return t;
  50. }
  51. static void ar933x_serial_get_scale_step(u32 clk, u32 baud,
  52. u32 *scale, u32 *step)
  53. {
  54. u32 tscale, baudrate;
  55. long min_diff;
  56. *scale = 0;
  57. *step = 0;
  58. min_diff = baud;
  59. for (tscale = 0; tscale < AR933X_UART_CLK_SCALE_M; tscale++) {
  60. u64 tstep;
  61. int diff;
  62. tstep = baud * (tscale + 1);
  63. tstep *= (2 << 16);
  64. do_div(tstep, clk);
  65. if (tstep > AR933X_UART_CLK_STEP_M)
  66. break;
  67. baudrate = ar933x_serial_get_baud(clk, tscale, tstep);
  68. diff = abs(baudrate - baud);
  69. if (diff < min_diff) {
  70. min_diff = diff;
  71. *scale = tscale;
  72. *step = tstep;
  73. }
  74. }
  75. }
  76. static int ar933x_serial_setbrg(struct udevice *dev, int baudrate)
  77. {
  78. struct ar933x_serial_priv *priv = dev_get_priv(dev);
  79. u32 val, scale, step;
  80. val = get_serial_clock();
  81. ar933x_serial_get_scale_step(val, baudrate, &scale, &step);
  82. val = (scale & AR933X_UART_CLK_SCALE_M)
  83. << AR933X_UART_CLK_SCALE_S;
  84. val |= (step & AR933X_UART_CLK_STEP_M)
  85. << AR933X_UART_CLK_STEP_S;
  86. writel(val, priv->regs + AR933X_UART_CLK_REG);
  87. return 0;
  88. }
  89. static int ar933x_serial_putc(struct udevice *dev, const char c)
  90. {
  91. struct ar933x_serial_priv *priv = dev_get_priv(dev);
  92. u32 data;
  93. data = readl(priv->regs + AR933X_UART_DATA_REG);
  94. if (!(data & AR933X_UART_DATA_TX_CSR))
  95. return -EAGAIN;
  96. data = (u32)c | AR933X_UART_DATA_TX_CSR;
  97. writel(data, priv->regs + AR933X_UART_DATA_REG);
  98. return 0;
  99. }
  100. static int ar933x_serial_getc(struct udevice *dev)
  101. {
  102. struct ar933x_serial_priv *priv = dev_get_priv(dev);
  103. u32 data;
  104. data = readl(priv->regs + AR933X_UART_DATA_REG);
  105. if (!(data & AR933X_UART_DATA_RX_CSR))
  106. return -EAGAIN;
  107. writel(AR933X_UART_DATA_RX_CSR, priv->regs + AR933X_UART_DATA_REG);
  108. return data & AR933X_UART_DATA_TX_RX_MASK;
  109. }
  110. static int ar933x_serial_pending(struct udevice *dev, bool input)
  111. {
  112. struct ar933x_serial_priv *priv = dev_get_priv(dev);
  113. u32 data;
  114. data = readl(priv->regs + AR933X_UART_DATA_REG);
  115. if (input)
  116. return (data & AR933X_UART_DATA_RX_CSR) ? 1 : 0;
  117. else
  118. return (data & AR933X_UART_DATA_TX_CSR) ? 0 : 1;
  119. }
  120. static int ar933x_serial_probe(struct udevice *dev)
  121. {
  122. struct ar933x_serial_priv *priv = dev_get_priv(dev);
  123. fdt_addr_t addr;
  124. u32 val;
  125. addr = dev_read_addr(dev);
  126. if (addr == FDT_ADDR_T_NONE)
  127. return -EINVAL;
  128. priv->regs = map_physmem(addr, AR933X_UART_SIZE,
  129. MAP_NOCACHE);
  130. /*
  131. * UART controller configuration:
  132. * - no DMA
  133. * - no interrupt
  134. * - DCE mode
  135. * - no flow control
  136. * - set RX ready oride
  137. * - set TX ready oride
  138. */
  139. val = (AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S) |
  140. AR933X_UART_CS_TX_RDY_ORIDE | AR933X_UART_CS_RX_RDY_ORIDE;
  141. writel(val, priv->regs + AR933X_UART_CS_REG);
  142. return 0;
  143. }
  144. static const struct dm_serial_ops ar933x_serial_ops = {
  145. .putc = ar933x_serial_putc,
  146. .pending = ar933x_serial_pending,
  147. .getc = ar933x_serial_getc,
  148. .setbrg = ar933x_serial_setbrg,
  149. };
  150. static const struct udevice_id ar933x_serial_ids[] = {
  151. { .compatible = "qca,ar9330-uart" },
  152. { }
  153. };
  154. U_BOOT_DRIVER(serial_ar933x) = {
  155. .name = "serial_ar933x",
  156. .id = UCLASS_SERIAL,
  157. .of_match = ar933x_serial_ids,
  158. .priv_auto_alloc_size = sizeof(struct ar933x_serial_priv),
  159. .probe = ar933x_serial_probe,
  160. .ops = &ar933x_serial_ops,
  161. };
  162. #ifdef CONFIG_DEBUG_UART_AR933X
  163. #include <debug_uart.h>
  164. static inline void _debug_uart_init(void)
  165. {
  166. void __iomem *regs = (void *)CONFIG_DEBUG_UART_BASE;
  167. u32 val, scale, step;
  168. /*
  169. * UART controller configuration:
  170. * - no DMA
  171. * - no interrupt
  172. * - DCE mode
  173. * - no flow control
  174. * - set RX ready oride
  175. * - set TX ready oride
  176. */
  177. val = (AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S) |
  178. AR933X_UART_CS_TX_RDY_ORIDE | AR933X_UART_CS_RX_RDY_ORIDE;
  179. writel(val, regs + AR933X_UART_CS_REG);
  180. ar933x_serial_get_scale_step(CONFIG_DEBUG_UART_CLOCK,
  181. CONFIG_BAUDRATE, &scale, &step);
  182. val = (scale & AR933X_UART_CLK_SCALE_M)
  183. << AR933X_UART_CLK_SCALE_S;
  184. val |= (step & AR933X_UART_CLK_STEP_M)
  185. << AR933X_UART_CLK_STEP_S;
  186. writel(val, regs + AR933X_UART_CLK_REG);
  187. }
  188. static inline void _debug_uart_putc(int c)
  189. {
  190. void __iomem *regs = (void *)CONFIG_DEBUG_UART_BASE;
  191. u32 data;
  192. do {
  193. data = readl(regs + AR933X_UART_DATA_REG);
  194. } while (!(data & AR933X_UART_DATA_TX_CSR));
  195. data = (u32)c | AR933X_UART_DATA_TX_CSR;
  196. writel(data, regs + AR933X_UART_DATA_REG);
  197. }
  198. DEBUG_UART_FUNCS
  199. #endif