ns16550.c 17 KB

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  1. /*
  2. * COM1 NS16550 support
  3. * originally from linux source (arch/powerpc/boot/ns16550.c)
  4. * modified to use CONFIG_SYS_ISA_MEM and new defines
  5. */
  6. #include <clock_legacy.h>
  7. #include <common.h>
  8. #include <clk.h>
  9. #include <dm.h>
  10. #include <errno.h>
  11. #include <log.h>
  12. #include <ns16550.h>
  13. #include <reset.h>
  14. #include <serial.h>
  15. #include <watchdog.h>
  16. #include <linux/err.h>
  17. #include <linux/types.h>
  18. #include <asm/io.h>
  19. DECLARE_GLOBAL_DATA_PTR;
  20. #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
  21. #define UART_MCRVAL (UART_MCR_DTR | \
  22. UART_MCR_RTS) /* RTS/DTR */
  23. #if !CONFIG_IS_ENABLED(DM_SERIAL)
  24. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  25. #define serial_out(x, y) outb(x, (ulong)y)
  26. #define serial_in(y) inb((ulong)y)
  27. #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
  28. #define serial_out(x, y) out_be32(y, x)
  29. #define serial_in(y) in_be32(y)
  30. #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
  31. #define serial_out(x, y) out_le32(y, x)
  32. #define serial_in(y) in_le32(y)
  33. #else
  34. #define serial_out(x, y) writeb(x, y)
  35. #define serial_in(y) readb(y)
  36. #endif
  37. #endif /* !CONFIG_DM_SERIAL */
  38. #if defined(CONFIG_SOC_KEYSTONE)
  39. #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
  40. #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
  41. #undef UART_MCRVAL
  42. #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
  43. #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
  44. #else
  45. #define UART_MCRVAL (UART_MCR_RTS)
  46. #endif
  47. #endif
  48. #ifndef CONFIG_SYS_NS16550_IER
  49. #define CONFIG_SYS_NS16550_IER 0x00
  50. #endif /* CONFIG_SYS_NS16550_IER */
  51. static inline void serial_out_shift(void *addr, int shift, int value)
  52. {
  53. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  54. outb(value, (ulong)addr);
  55. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
  56. out_le32(addr, value);
  57. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
  58. out_be32(addr, value);
  59. #elif defined(CONFIG_SYS_NS16550_MEM32)
  60. writel(value, addr);
  61. #elif defined(CONFIG_SYS_BIG_ENDIAN)
  62. writeb(value, addr + (1 << shift) - 1);
  63. #else
  64. writeb(value, addr);
  65. #endif
  66. }
  67. static inline int serial_in_shift(void *addr, int shift)
  68. {
  69. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  70. return inb((ulong)addr);
  71. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
  72. return in_le32(addr);
  73. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
  74. return in_be32(addr);
  75. #elif defined(CONFIG_SYS_NS16550_MEM32)
  76. return readl(addr);
  77. #elif defined(CONFIG_SYS_BIG_ENDIAN)
  78. return readb(addr + (1 << shift) - 1);
  79. #else
  80. return readb(addr);
  81. #endif
  82. }
  83. #if CONFIG_IS_ENABLED(DM_SERIAL)
  84. #ifndef CONFIG_SYS_NS16550_CLK
  85. #define CONFIG_SYS_NS16550_CLK 0
  86. #endif
  87. /*
  88. * Use this #ifdef for now since many platforms don't define in(), out(),
  89. * out_le32(), etc. but we don't have #defines to indicate this.
  90. *
  91. * TODO(sjg@chromium.org): Add CONFIG options to indicate what I/O is available
  92. * on a platform
  93. */
  94. #ifdef CONFIG_NS16550_DYNAMIC
  95. static void serial_out_dynamic(struct ns16550_platdata *plat, u8 *addr,
  96. int value)
  97. {
  98. if (plat->flags & NS16550_FLAG_IO) {
  99. outb(value, addr);
  100. } else if (plat->reg_width == 4) {
  101. if (plat->flags & NS16550_FLAG_ENDIAN) {
  102. if (plat->flags & NS16550_FLAG_BE)
  103. out_be32(addr, value);
  104. else
  105. out_le32(addr, value);
  106. } else {
  107. writel(value, addr);
  108. }
  109. } else if (plat->flags & NS16550_FLAG_BE) {
  110. writeb(value, addr + (1 << plat->reg_shift) - 1);
  111. } else {
  112. writeb(value, addr);
  113. }
  114. }
  115. static int serial_in_dynamic(struct ns16550_platdata *plat, u8 *addr)
  116. {
  117. if (plat->flags & NS16550_FLAG_IO) {
  118. return inb(addr);
  119. } else if (plat->reg_width == 4) {
  120. if (plat->flags & NS16550_FLAG_ENDIAN) {
  121. if (plat->flags & NS16550_FLAG_BE)
  122. return in_be32(addr);
  123. else
  124. return in_le32(addr);
  125. } else {
  126. return readl(addr);
  127. }
  128. } else if (plat->flags & NS16550_FLAG_BE) {
  129. return readb(addr + (1 << plat->reg_shift) - 1);
  130. } else {
  131. return readb(addr);
  132. }
  133. }
  134. #else
  135. static inline void serial_out_dynamic(struct ns16550_platdata *plat, u8 *addr,
  136. int value)
  137. {
  138. }
  139. static inline int serial_in_dynamic(struct ns16550_platdata *plat, u8 *addr)
  140. {
  141. return 0;
  142. }
  143. #endif /* CONFIG_NS16550_DYNAMIC */
  144. static void ns16550_writeb(NS16550_t port, int offset, int value)
  145. {
  146. struct ns16550_platdata *plat = port->plat;
  147. unsigned char *addr;
  148. offset *= 1 << plat->reg_shift;
  149. addr = (unsigned char *)plat->base + offset + plat->reg_offset;
  150. if (IS_ENABLED(CONFIG_NS16550_DYNAMIC))
  151. serial_out_dynamic(plat, addr, value);
  152. else
  153. serial_out_shift(addr, plat->reg_shift, value);
  154. }
  155. static int ns16550_readb(NS16550_t port, int offset)
  156. {
  157. struct ns16550_platdata *plat = port->plat;
  158. unsigned char *addr;
  159. offset *= 1 << plat->reg_shift;
  160. addr = (unsigned char *)plat->base + offset + plat->reg_offset;
  161. if (IS_ENABLED(CONFIG_NS16550_DYNAMIC))
  162. return serial_in_dynamic(plat, addr);
  163. else
  164. return serial_in_shift(addr, plat->reg_shift);
  165. }
  166. static u32 ns16550_getfcr(NS16550_t port)
  167. {
  168. struct ns16550_platdata *plat = port->plat;
  169. return plat->fcr;
  170. }
  171. /* We can clean these up once everything is moved to driver model */
  172. #define serial_out(value, addr) \
  173. ns16550_writeb(com_port, \
  174. (unsigned char *)addr - (unsigned char *)com_port, value)
  175. #define serial_in(addr) \
  176. ns16550_readb(com_port, \
  177. (unsigned char *)addr - (unsigned char *)com_port)
  178. #else
  179. static u32 ns16550_getfcr(NS16550_t port)
  180. {
  181. return UART_FCR_DEFVAL;
  182. }
  183. #endif
  184. int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
  185. {
  186. const unsigned int mode_x_div = 16;
  187. return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
  188. }
  189. static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
  190. {
  191. /* to keep serial format, read lcr before writing BKSE */
  192. int lcr_val = serial_in(&com_port->lcr) & ~UART_LCR_BKSE;
  193. serial_out(UART_LCR_BKSE | lcr_val, &com_port->lcr);
  194. serial_out(baud_divisor & 0xff, &com_port->dll);
  195. serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
  196. serial_out(lcr_val, &com_port->lcr);
  197. }
  198. void NS16550_init(NS16550_t com_port, int baud_divisor)
  199. {
  200. #if (defined(CONFIG_SPL_BUILD) && \
  201. (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
  202. /*
  203. * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
  204. * before SPL starts only THRE bit is set. We have to empty the
  205. * transmitter before initialization starts.
  206. */
  207. if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
  208. == UART_LSR_THRE) {
  209. if (baud_divisor != -1)
  210. NS16550_setbrg(com_port, baud_divisor);
  211. else {
  212. // Re-use old baud rate divisor to flush transmit reg.
  213. const int dll = serial_in(&com_port->dll);
  214. const int dlm = serial_in(&com_port->dlm);
  215. const int divisor = dll | (dlm << 8);
  216. NS16550_setbrg(com_port, divisor);
  217. }
  218. serial_out(0, &com_port->mdr1);
  219. }
  220. #endif
  221. while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
  222. ;
  223. serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
  224. #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_OMAP_SERIAL)
  225. serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
  226. #endif
  227. serial_out(UART_MCRVAL, &com_port->mcr);
  228. serial_out(ns16550_getfcr(com_port), &com_port->fcr);
  229. /* initialize serial config to 8N1 before writing baudrate */
  230. serial_out(UART_LCRVAL, &com_port->lcr);
  231. if (baud_divisor != -1)
  232. NS16550_setbrg(com_port, baud_divisor);
  233. #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) || \
  234. defined(CONFIG_OMAP_SERIAL)
  235. /* /16 is proper to hit 115200 with 48MHz */
  236. serial_out(0, &com_port->mdr1);
  237. #endif
  238. #if defined(CONFIG_SOC_KEYSTONE)
  239. serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
  240. #endif
  241. }
  242. #ifndef CONFIG_NS16550_MIN_FUNCTIONS
  243. void NS16550_reinit(NS16550_t com_port, int baud_divisor)
  244. {
  245. serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
  246. NS16550_setbrg(com_port, 0);
  247. serial_out(UART_MCRVAL, &com_port->mcr);
  248. serial_out(ns16550_getfcr(com_port), &com_port->fcr);
  249. NS16550_setbrg(com_port, baud_divisor);
  250. }
  251. #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
  252. void NS16550_putc(NS16550_t com_port, char c)
  253. {
  254. while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
  255. ;
  256. serial_out(c, &com_port->thr);
  257. /*
  258. * Call watchdog_reset() upon newline. This is done here in putc
  259. * since the environment code uses a single puts() to print the complete
  260. * environment upon "printenv". So we can't put this watchdog call
  261. * in puts().
  262. */
  263. if (c == '\n')
  264. WATCHDOG_RESET();
  265. }
  266. #ifndef CONFIG_NS16550_MIN_FUNCTIONS
  267. char NS16550_getc(NS16550_t com_port)
  268. {
  269. while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
  270. #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
  271. extern void usbtty_poll(void);
  272. usbtty_poll();
  273. #endif
  274. WATCHDOG_RESET();
  275. }
  276. return serial_in(&com_port->rbr);
  277. }
  278. int NS16550_tstc(NS16550_t com_port)
  279. {
  280. return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
  281. }
  282. #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
  283. #ifdef CONFIG_DEBUG_UART_NS16550
  284. #include <debug_uart.h>
  285. static inline void _debug_uart_init(void)
  286. {
  287. struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
  288. int baud_divisor;
  289. /*
  290. * We copy the code from above because it is already horribly messy.
  291. * Trying to refactor to nicely remove the duplication doesn't seem
  292. * feasible. The better fix is to move all users of this driver to
  293. * driver model.
  294. */
  295. baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
  296. CONFIG_BAUDRATE);
  297. serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
  298. serial_dout(&com_port->mcr, UART_MCRVAL);
  299. serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
  300. serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
  301. serial_dout(&com_port->dll, baud_divisor & 0xff);
  302. serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
  303. serial_dout(&com_port->lcr, UART_LCRVAL);
  304. }
  305. static inline int NS16550_read_baud_divisor(struct NS16550 *com_port)
  306. {
  307. int ret;
  308. serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
  309. ret = serial_din(&com_port->dll) & 0xff;
  310. ret |= (serial_din(&com_port->dlm) & 0xff) << 8;
  311. serial_dout(&com_port->lcr, UART_LCRVAL);
  312. return ret;
  313. }
  314. static inline void _debug_uart_putc(int ch)
  315. {
  316. struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
  317. while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) {
  318. #ifdef CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED
  319. if (!NS16550_read_baud_divisor(com_port))
  320. return;
  321. #endif
  322. }
  323. serial_dout(&com_port->thr, ch);
  324. }
  325. DEBUG_UART_FUNCS
  326. #endif
  327. #if CONFIG_IS_ENABLED(DM_SERIAL)
  328. static int ns16550_serial_putc(struct udevice *dev, const char ch)
  329. {
  330. struct NS16550 *const com_port = dev_get_priv(dev);
  331. if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
  332. return -EAGAIN;
  333. serial_out(ch, &com_port->thr);
  334. /*
  335. * Call watchdog_reset() upon newline. This is done here in putc
  336. * since the environment code uses a single puts() to print the complete
  337. * environment upon "printenv". So we can't put this watchdog call
  338. * in puts().
  339. */
  340. if (ch == '\n')
  341. WATCHDOG_RESET();
  342. return 0;
  343. }
  344. static int ns16550_serial_pending(struct udevice *dev, bool input)
  345. {
  346. struct NS16550 *const com_port = dev_get_priv(dev);
  347. if (input)
  348. return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0;
  349. else
  350. return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1;
  351. }
  352. static int ns16550_serial_getc(struct udevice *dev)
  353. {
  354. struct NS16550 *const com_port = dev_get_priv(dev);
  355. if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
  356. return -EAGAIN;
  357. return serial_in(&com_port->rbr);
  358. }
  359. static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
  360. {
  361. struct NS16550 *const com_port = dev_get_priv(dev);
  362. struct ns16550_platdata *plat = com_port->plat;
  363. int clock_divisor;
  364. clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
  365. NS16550_setbrg(com_port, clock_divisor);
  366. return 0;
  367. }
  368. static int ns16550_serial_setconfig(struct udevice *dev, uint serial_config)
  369. {
  370. struct NS16550 *const com_port = dev_get_priv(dev);
  371. int lcr_val = UART_LCR_WLS_8;
  372. uint parity = SERIAL_GET_PARITY(serial_config);
  373. uint bits = SERIAL_GET_BITS(serial_config);
  374. uint stop = SERIAL_GET_STOP(serial_config);
  375. /*
  376. * only parity config is implemented, check if other serial settings
  377. * are the default one.
  378. */
  379. if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP)
  380. return -ENOTSUPP; /* not supported in driver*/
  381. switch (parity) {
  382. case SERIAL_PAR_NONE:
  383. /* no bits to add */
  384. break;
  385. case SERIAL_PAR_ODD:
  386. lcr_val |= UART_LCR_PEN;
  387. break;
  388. case SERIAL_PAR_EVEN:
  389. lcr_val |= UART_LCR_PEN | UART_LCR_EPS;
  390. break;
  391. default:
  392. return -ENOTSUPP; /* not supported in driver*/
  393. }
  394. serial_out(lcr_val, &com_port->lcr);
  395. return 0;
  396. }
  397. static int ns16550_serial_getinfo(struct udevice *dev,
  398. struct serial_device_info *info)
  399. {
  400. struct NS16550 *const com_port = dev_get_priv(dev);
  401. struct ns16550_platdata *plat = com_port->plat;
  402. info->type = SERIAL_CHIP_16550_COMPATIBLE;
  403. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  404. info->addr_space = SERIAL_ADDRESS_SPACE_IO;
  405. #else
  406. info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
  407. #endif
  408. info->addr = plat->base;
  409. info->reg_width = plat->reg_width;
  410. info->reg_shift = plat->reg_shift;
  411. info->reg_offset = plat->reg_offset;
  412. info->clock = plat->clock;
  413. return 0;
  414. }
  415. static int ns16550_serial_assign_base(struct ns16550_platdata *plat, ulong base)
  416. {
  417. if (base == FDT_ADDR_T_NONE)
  418. return -EINVAL;
  419. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  420. plat->base = base;
  421. #else
  422. plat->base = (unsigned long)map_physmem(base, 0, MAP_NOCACHE);
  423. #endif
  424. return 0;
  425. }
  426. int ns16550_serial_probe(struct udevice *dev)
  427. {
  428. struct ns16550_platdata *plat = dev->platdata;
  429. struct NS16550 *const com_port = dev_get_priv(dev);
  430. struct reset_ctl_bulk reset_bulk;
  431. fdt_addr_t addr;
  432. int ret;
  433. /*
  434. * If we are on PCI bus, either directly attached to a PCI root port,
  435. * or via a PCI bridge, assign platdata->base before probing hardware.
  436. */
  437. if (device_is_on_pci_bus(dev)) {
  438. addr = devfdt_get_addr_pci(dev);
  439. ret = ns16550_serial_assign_base(plat, addr);
  440. if (ret)
  441. return ret;
  442. }
  443. ret = reset_get_bulk(dev, &reset_bulk);
  444. if (!ret)
  445. reset_deassert_bulk(&reset_bulk);
  446. com_port->plat = dev_get_platdata(dev);
  447. NS16550_init(com_port, -1);
  448. return 0;
  449. }
  450. #if CONFIG_IS_ENABLED(OF_CONTROL)
  451. enum {
  452. PORT_NS16550 = 0,
  453. PORT_JZ4780,
  454. };
  455. #endif
  456. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  457. int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
  458. {
  459. struct ns16550_platdata *plat = dev->platdata;
  460. const u32 port_type = dev_get_driver_data(dev);
  461. fdt_addr_t addr;
  462. struct clk clk;
  463. int err;
  464. addr = dev_read_addr(dev);
  465. err = ns16550_serial_assign_base(plat, addr);
  466. if (err && !device_is_on_pci_bus(dev))
  467. return err;
  468. plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
  469. plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
  470. plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
  471. err = clk_get_by_index(dev, 0, &clk);
  472. if (!err) {
  473. err = clk_get_rate(&clk);
  474. if (!IS_ERR_VALUE(err))
  475. plat->clock = err;
  476. } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
  477. debug("ns16550 failed to get clock\n");
  478. return err;
  479. }
  480. if (!plat->clock)
  481. plat->clock = dev_read_u32_default(dev, "clock-frequency",
  482. CONFIG_SYS_NS16550_CLK);
  483. if (!plat->clock) {
  484. debug("ns16550 clock not defined\n");
  485. return -EINVAL;
  486. }
  487. plat->fcr = UART_FCR_DEFVAL;
  488. if (port_type == PORT_JZ4780)
  489. plat->fcr |= UART_FCR_UME;
  490. return 0;
  491. }
  492. #endif
  493. const struct dm_serial_ops ns16550_serial_ops = {
  494. .putc = ns16550_serial_putc,
  495. .pending = ns16550_serial_pending,
  496. .getc = ns16550_serial_getc,
  497. .setbrg = ns16550_serial_setbrg,
  498. .setconfig = ns16550_serial_setconfig,
  499. .getinfo = ns16550_serial_getinfo,
  500. };
  501. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  502. /*
  503. * Please consider existing compatible strings before adding a new
  504. * one to keep this table compact. Or you may add a generic "ns16550"
  505. * compatible string to your dts.
  506. */
  507. static const struct udevice_id ns16550_serial_ids[] = {
  508. { .compatible = "ns16550", .data = PORT_NS16550 },
  509. { .compatible = "ns16550a", .data = PORT_NS16550 },
  510. { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 },
  511. { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 },
  512. { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
  513. {}
  514. };
  515. #endif /* OF_CONTROL && !OF_PLATDATA */
  516. #if CONFIG_IS_ENABLED(SERIAL_PRESENT)
  517. /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
  518. #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
  519. U_BOOT_DRIVER(ns16550_serial) = {
  520. .name = "ns16550_serial",
  521. .id = UCLASS_SERIAL,
  522. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  523. .of_match = ns16550_serial_ids,
  524. .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
  525. .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
  526. #endif
  527. .priv_auto_alloc_size = sizeof(struct NS16550),
  528. .probe = ns16550_serial_probe,
  529. .ops = &ns16550_serial_ops,
  530. #if !CONFIG_IS_ENABLED(OF_CONTROL)
  531. .flags = DM_FLAG_PRE_RELOC,
  532. #endif
  533. };
  534. U_BOOT_DRIVER_ALIAS(ns16550_serial, rockchip_rk3328_uart)
  535. U_BOOT_DRIVER_ALIAS(ns16550_serial, rockchip_rk3368_uart)
  536. U_BOOT_DRIVER_ALIAS(ns16550_serial, ti_da830_uart)
  537. #endif
  538. #endif /* SERIAL_PRESENT */
  539. #endif /* CONFIG_DM_SERIAL */