m48t35ax.c 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2001
  4. * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
  5. */
  6. /*
  7. * Date & Time support for ST Electronics M48T35Ax RTC
  8. */
  9. /*#define DEBUG */
  10. #include <common.h>
  11. #include <command.h>
  12. #include <rtc.h>
  13. #include <config.h>
  14. static uchar rtc_read (uchar reg);
  15. static void rtc_write (uchar reg, uchar val);
  16. /* ------------------------------------------------------------------------- */
  17. int rtc_get (struct rtc_time *tmp)
  18. {
  19. uchar sec, min, hour, cent_day, date, month, year;
  20. uchar ccr; /* Clock control register */
  21. /* Lock RTC for read using clock control register */
  22. ccr = rtc_read(0);
  23. ccr = ccr | 0x40;
  24. rtc_write(0, ccr);
  25. sec = rtc_read (0x1);
  26. min = rtc_read (0x2);
  27. hour = rtc_read (0x3);
  28. cent_day= rtc_read (0x4);
  29. date = rtc_read (0x5);
  30. month = rtc_read (0x6);
  31. year = rtc_read (0x7);
  32. /* UNLock RTC */
  33. ccr = rtc_read(0);
  34. ccr = ccr & 0xBF;
  35. rtc_write(0, ccr);
  36. debug ( "Get RTC year: %02x month: %02x date: %02x cent_day: %02x "
  37. "hr: %02x min: %02x sec: %02x\n",
  38. year, month, date, cent_day,
  39. hour, min, sec );
  40. tmp->tm_sec = bcd2bin (sec & 0x7F);
  41. tmp->tm_min = bcd2bin (min & 0x7F);
  42. tmp->tm_hour = bcd2bin (hour & 0x3F);
  43. tmp->tm_mday = bcd2bin (date & 0x3F);
  44. tmp->tm_mon = bcd2bin (month & 0x1F);
  45. tmp->tm_year = bcd2bin (year) + ((cent_day & 0x10) ? 2000 : 1900);
  46. tmp->tm_wday = bcd2bin (cent_day & 0x07);
  47. tmp->tm_yday = 0;
  48. tmp->tm_isdst= 0;
  49. debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  50. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  51. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  52. return 0;
  53. }
  54. int rtc_set (struct rtc_time *tmp)
  55. {
  56. uchar ccr; /* Clock control register */
  57. uchar century;
  58. debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  59. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  60. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  61. /* Lock RTC for write using clock control register */
  62. ccr = rtc_read(0);
  63. ccr = ccr | 0x80;
  64. rtc_write(0, ccr);
  65. rtc_write (0x07, bin2bcd(tmp->tm_year % 100));
  66. rtc_write (0x06, bin2bcd(tmp->tm_mon));
  67. rtc_write (0x05, bin2bcd(tmp->tm_mday));
  68. century = ((tmp->tm_year >= 2000) ? 0x10 : 0) | 0x20;
  69. rtc_write (0x04, bin2bcd(tmp->tm_wday) | century);
  70. rtc_write (0x03, bin2bcd(tmp->tm_hour));
  71. rtc_write (0x02, bin2bcd(tmp->tm_min ));
  72. rtc_write (0x01, bin2bcd(tmp->tm_sec ));
  73. /* UNLock RTC */
  74. ccr = rtc_read(0);
  75. ccr = ccr & 0x7F;
  76. rtc_write(0, ccr);
  77. return 0;
  78. }
  79. void rtc_reset (void)
  80. {
  81. uchar val;
  82. /* Clear all clock control registers */
  83. rtc_write (0x0, 0x80); /* No Read Lock or calibration */
  84. /* Clear stop bit */
  85. val = rtc_read (0x1);
  86. val &= 0x7f;
  87. rtc_write(0x1, val);
  88. /* Enable century / disable frequency test */
  89. val = rtc_read (0x4);
  90. val = (val & 0xBF) | 0x20;
  91. rtc_write(0x4, val);
  92. /* Clear write lock */
  93. rtc_write(0x0, 0);
  94. }
  95. /* ------------------------------------------------------------------------- */
  96. static uchar rtc_read (uchar reg)
  97. {
  98. return *(unsigned char *)
  99. ((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg);
  100. }
  101. static void rtc_write (uchar reg, uchar val)
  102. {
  103. *(unsigned char *)
  104. ((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg) = val;
  105. }