isl1208.c 4.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2008
  4. * Tor Krill, Excito Elektronik i Skåne , tor@excito.com
  5. *
  6. * Modelled after the ds1337 driver
  7. */
  8. /*
  9. * Date & Time support (no alarms) for Intersil
  10. * ISL1208 Real Time Clock (RTC).
  11. */
  12. #include <common.h>
  13. #include <command.h>
  14. #include <dm.h>
  15. #include <rtc.h>
  16. #include <i2c.h>
  17. /*---------------------------------------------------------------------*/
  18. #ifdef DEBUG_RTC
  19. #define DEBUGR(fmt,args...) printf(fmt ,##args)
  20. #else
  21. #define DEBUGR(fmt,args...)
  22. #endif
  23. /*---------------------------------------------------------------------*/
  24. /*
  25. * RTC register addresses
  26. */
  27. #define RTC_SEC_REG_ADDR 0x0
  28. #define RTC_MIN_REG_ADDR 0x1
  29. #define RTC_HR_REG_ADDR 0x2
  30. #define RTC_DATE_REG_ADDR 0x3
  31. #define RTC_MON_REG_ADDR 0x4
  32. #define RTC_YR_REG_ADDR 0x5
  33. #define RTC_DAY_REG_ADDR 0x6
  34. #define RTC_STAT_REG_ADDR 0x7
  35. /*
  36. * RTC control register bits
  37. */
  38. /*
  39. * RTC status register bits
  40. */
  41. #define RTC_STAT_BIT_ARST 0x80 /* AUTO RESET ENABLE BIT */
  42. #define RTC_STAT_BIT_XTOSCB 0x40 /* CRYSTAL OSCILLATOR ENABLE BIT */
  43. #define RTC_STAT_BIT_WRTC 0x10 /* WRITE RTC ENABLE BIT */
  44. #define RTC_STAT_BIT_ALM 0x04 /* ALARM BIT */
  45. #define RTC_STAT_BIT_BAT 0x02 /* BATTERY BIT */
  46. #define RTC_STAT_BIT_RTCF 0x01 /* REAL TIME CLOCK FAIL BIT */
  47. /*
  48. * Read an RTC register
  49. */
  50. static int isl1208_rtc_read8(struct udevice *dev, unsigned int reg)
  51. {
  52. return dm_i2c_reg_read(dev, reg);
  53. }
  54. /*
  55. * Write an RTC register
  56. */
  57. static int isl1208_rtc_write8(struct udevice *dev, unsigned int reg, int val)
  58. {
  59. return dm_i2c_reg_write(dev, reg, val);
  60. }
  61. /*
  62. * Get the current time from the RTC
  63. */
  64. static int isl1208_rtc_get(struct udevice *dev, struct rtc_time *tmp)
  65. {
  66. int ret;
  67. uchar buf[8], val;
  68. ret = dm_i2c_read(dev, 0, buf, sizeof(buf));
  69. if (ret < 0)
  70. return ret;
  71. if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) {
  72. printf ("### Warning: RTC oscillator has stopped\n");
  73. ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
  74. if (ret < 0)
  75. return ret;
  76. val = val & ~(RTC_STAT_BIT_BAT | RTC_STAT_BIT_RTCF);
  77. ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
  78. if (ret < 0)
  79. return ret;
  80. }
  81. tmp->tm_sec = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F);
  82. tmp->tm_min = bcd2bin(buf[RTC_MIN_REG_ADDR] & 0x7F);
  83. tmp->tm_hour = bcd2bin(buf[RTC_HR_REG_ADDR] & 0x3F);
  84. tmp->tm_mday = bcd2bin(buf[RTC_DATE_REG_ADDR] & 0x3F);
  85. tmp->tm_mon = bcd2bin(buf[RTC_MON_REG_ADDR] & 0x1F);
  86. tmp->tm_year = bcd2bin(buf[RTC_YR_REG_ADDR]) + 2000;
  87. tmp->tm_wday = bcd2bin(buf[RTC_DAY_REG_ADDR] & 0x07);
  88. tmp->tm_yday = 0;
  89. tmp->tm_isdst= 0;
  90. DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  91. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  92. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  93. return 0;
  94. }
  95. /*
  96. * Set the RTC
  97. */
  98. static int isl1208_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
  99. {
  100. int ret;
  101. uchar val, buf[7];
  102. DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  103. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  104. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  105. if (tmp->tm_year < 2000 || tmp->tm_year > 2099)
  106. printf("WARNING: year should be between 2000 and 2099!\n");
  107. /* enable write */
  108. ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
  109. if (ret < 0)
  110. return ret;
  111. val = val | RTC_STAT_BIT_WRTC;
  112. ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
  113. if (ret < 0)
  114. return ret;
  115. buf[RTC_YR_REG_ADDR] = bin2bcd(tmp->tm_year % 100);
  116. buf[RTC_MON_REG_ADDR] = bin2bcd(tmp->tm_mon);
  117. buf[RTC_DAY_REG_ADDR] = bin2bcd(tmp->tm_wday);
  118. buf[RTC_DATE_REG_ADDR] = bin2bcd(tmp->tm_mday);
  119. buf[RTC_HR_REG_ADDR] = bin2bcd(tmp->tm_hour) | 0x80; /* 24h clock */
  120. buf[RTC_MIN_REG_ADDR] = bin2bcd(tmp->tm_min);
  121. buf[RTC_SEC_REG_ADDR] = bin2bcd(tmp->tm_sec);
  122. ret = dm_i2c_write(dev, 0, buf, sizeof(buf));
  123. if (ret < 0)
  124. return ret;
  125. /* disable write */
  126. ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
  127. if (ret < 0)
  128. return ret;
  129. val = val & ~RTC_STAT_BIT_WRTC;
  130. ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
  131. if (ret < 0)
  132. return ret;
  133. return 0;
  134. }
  135. static int isl1208_rtc_reset(struct udevice *dev)
  136. {
  137. return 0;
  138. }
  139. static int isl1208_probe(struct udevice *dev)
  140. {
  141. i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS |
  142. DM_I2C_CHIP_WR_ADDRESS);
  143. return 0;
  144. }
  145. static const struct rtc_ops isl1208_rtc_ops = {
  146. .get = isl1208_rtc_get,
  147. .set = isl1208_rtc_set,
  148. .reset = isl1208_rtc_reset,
  149. .read8 = isl1208_rtc_read8,
  150. .write8 = isl1208_rtc_write8,
  151. };
  152. static const struct udevice_id isl1208_rtc_ids[] = {
  153. { .compatible = "isil,isl1208" },
  154. { }
  155. };
  156. U_BOOT_DRIVER(rtc_isl1208) = {
  157. .name = "rtc-isl1208",
  158. .id = UCLASS_RTC,
  159. .probe = isl1208_probe,
  160. .of_match = isl1208_rtc_ids,
  161. .ops = &isl1208_rtc_ops,
  162. };