stm32-reset.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
  4. * Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
  5. */
  6. #include <common.h>
  7. #include <dm.h>
  8. #include <errno.h>
  9. #include <log.h>
  10. #include <malloc.h>
  11. #include <reset-uclass.h>
  12. #include <stm32_rcc.h>
  13. #include <asm/io.h>
  14. #include <linux/bitops.h>
  15. /* offset of register without set/clear management */
  16. #define RCC_MP_GCR_OFFSET 0x10C
  17. /* reset clear offset for STM32MP RCC */
  18. #define RCC_CL 0x4
  19. struct stm32_reset_priv {
  20. fdt_addr_t base;
  21. };
  22. static int stm32_reset_request(struct reset_ctl *reset_ctl)
  23. {
  24. return 0;
  25. }
  26. static int stm32_reset_free(struct reset_ctl *reset_ctl)
  27. {
  28. return 0;
  29. }
  30. static int stm32_reset_assert(struct reset_ctl *reset_ctl)
  31. {
  32. struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
  33. int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
  34. int offset = reset_ctl->id % BITS_PER_LONG;
  35. debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
  36. reset_ctl->id, bank, offset);
  37. if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
  38. if (bank != RCC_MP_GCR_OFFSET)
  39. /* reset assert is done in rcc set register */
  40. writel(BIT(offset), priv->base + bank);
  41. else
  42. clrbits_le32(priv->base + bank, BIT(offset));
  43. else
  44. setbits_le32(priv->base + bank, BIT(offset));
  45. return 0;
  46. }
  47. static int stm32_reset_deassert(struct reset_ctl *reset_ctl)
  48. {
  49. struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
  50. int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
  51. int offset = reset_ctl->id % BITS_PER_LONG;
  52. debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
  53. reset_ctl->id, bank, offset);
  54. if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
  55. if (bank != RCC_MP_GCR_OFFSET)
  56. /* reset deassert is done in rcc clr register */
  57. writel(BIT(offset), priv->base + bank + RCC_CL);
  58. else
  59. setbits_le32(priv->base + bank, BIT(offset));
  60. else
  61. clrbits_le32(priv->base + bank, BIT(offset));
  62. return 0;
  63. }
  64. static const struct reset_ops stm32_reset_ops = {
  65. .request = stm32_reset_request,
  66. .rfree = stm32_reset_free,
  67. .rst_assert = stm32_reset_assert,
  68. .rst_deassert = stm32_reset_deassert,
  69. };
  70. static int stm32_reset_probe(struct udevice *dev)
  71. {
  72. struct stm32_reset_priv *priv = dev_get_priv(dev);
  73. priv->base = dev_read_addr(dev);
  74. if (priv->base == FDT_ADDR_T_NONE) {
  75. /* for MFD, get address of parent */
  76. priv->base = dev_read_addr(dev->parent);
  77. if (priv->base == FDT_ADDR_T_NONE)
  78. return -EINVAL;
  79. }
  80. return 0;
  81. }
  82. U_BOOT_DRIVER(stm32_rcc_reset) = {
  83. .name = "stm32_rcc_reset",
  84. .id = UCLASS_RESET,
  85. .probe = stm32_reset_probe,
  86. .priv_auto_alloc_size = sizeof(struct stm32_reset_priv),
  87. .ops = &stm32_reset_ops,
  88. };