Kconfig 2.9 KB

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  1. config RAM
  2. bool "Enable RAM drivers using Driver Model"
  3. depends on DM
  4. help
  5. This allows drivers to be provided for SDRAM and other RAM
  6. controllers and their type to be specified in the board's device
  7. tree. Generally some parameters are required to set up the RAM and
  8. the RAM size can either be statically defined or dynamically
  9. detected.
  10. config SPL_RAM
  11. bool "Enable RAM support in SPL"
  12. depends on RAM && SPL_DM
  13. help
  14. The RAM subsystem adds a small amount of overhead to the image.
  15. If this is acceptable and you have a need to use RAM drivers in
  16. SPL, enable this option. It might provide a cleaner interface to
  17. setting up RAM (e.g. SDRAM / DDR) within SPL.
  18. config TPL_RAM
  19. bool "Enable RAM support in TPL"
  20. depends on RAM
  21. help
  22. The RAM subsystem adds a small amount of overhead to the image.
  23. If this is acceptable and you have a need to use RAM drivers in
  24. TPL, enable this option. It might provide a cleaner interface to
  25. setting up RAM (e.g. SDRAM / DDR) within TPL.
  26. config STM32_SDRAM
  27. bool "Enable STM32 SDRAM support"
  28. depends on RAM
  29. help
  30. STM32F7 family devices support flexible memory controller(FMC) to
  31. support external memories like sdram, psram & nand.
  32. This driver is for the sdram memory interface with the FMC.
  33. config MPC83XX_SDRAM
  34. bool "Enable MPC83XX SDRAM support"
  35. depends on RAM
  36. help
  37. Enable support for the internal DDR Memory Controller of the MPC83xx
  38. family of SoCs. Both static configurations, as well as configuring
  39. the RAM through the use of SPD (Serial Presence Detect) is supported
  40. via device tree settings.
  41. config K3_AM654_DDRSS
  42. bool "Enable AM654 DDRSS support"
  43. depends on RAM && SOC_K3_AM6
  44. help
  45. K3 based AM654 devices has DDR memory subsystem that comprises
  46. Synopys DDR controller, Synopsis DDR phy and wrapper logic to
  47. intergrate these blocks into the device. This DDR subsystem
  48. provides an interface to external SDRAM devices. Enabling this
  49. config add support for the initialization of the external
  50. SDRAM devices connected to DDR subsystem.
  51. config K3_J721E_DDRSS
  52. bool "Enable J721E DDRSS support"
  53. depends on RAM
  54. help
  55. The J721E DDR subsystem comprises DDR controller, DDR PHY and
  56. wrapper logic to integrate these blocks in the device. The DDR
  57. subsystem is used to provide an interface to external SDRAM
  58. devices which can be utilized for storing program or data.
  59. Enabling this config adds support for the DDR memory controller
  60. on J721E family of SoCs.
  61. config IMXRT_SDRAM
  62. bool "Enable i.MXRT SDRAM support"
  63. depends on RAM
  64. help
  65. i.MXRT family devices support smart external memory controller(SEMC)
  66. to support external memories like sdram, psram & nand.
  67. This driver is for the sdram memory interface with the SEMC.
  68. source "drivers/ram/aspeed/Kconfig"
  69. source "drivers/ram/rockchip/Kconfig"
  70. source "drivers/ram/sifive/Kconfig"
  71. source "drivers/ram/stm32mp1/Kconfig"
  72. source "drivers/ram/octeon/Kconfig"