mscc-common.c 6.7 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. /*
  3. * Microsemi SoCs pinctrl driver
  4. *
  5. * Author: <alexandre.belloni@free-electrons.com>
  6. * Author: <gregory.clement@bootlin.com>
  7. * License: Dual MIT/GPL
  8. * Copyright (c) 2017 Microsemi Corporation
  9. */
  10. #include <asm/gpio.h>
  11. #include <asm/system.h>
  12. #include <common.h>
  13. #include <config.h>
  14. #include <dm.h>
  15. #include <dm/device-internal.h>
  16. #include <dm/device_compat.h>
  17. #include <dm/devres.h>
  18. #include <dm/lists.h>
  19. #include <dm/pinctrl.h>
  20. #include <dm/root.h>
  21. #include <errno.h>
  22. #include <fdtdec.h>
  23. #include <linux/bitops.h>
  24. #include <linux/io.h>
  25. #include "mscc-common.h"
  26. static void mscc_writel(unsigned int offset, void *addr)
  27. {
  28. if (offset < 32)
  29. writel(BIT(offset), addr);
  30. else
  31. writel(BIT(offset % 32), addr + 4);
  32. }
  33. static unsigned int mscc_readl(unsigned int offset, void *addr)
  34. {
  35. if (offset < 32)
  36. return readl(addr);
  37. else
  38. return readl(addr + 4);
  39. }
  40. static void mscc_setbits(unsigned int offset, void *addr)
  41. {
  42. if (offset < 32)
  43. writel(readl(addr) | BIT(offset), addr);
  44. else
  45. writel(readl(addr + 4) | BIT(offset % 32), addr + 4);
  46. }
  47. static void mscc_clrbits(unsigned int offset, void *addr)
  48. {
  49. if (offset < 32)
  50. writel(readl(addr) & ~BIT(offset), addr);
  51. else
  52. writel(readl(addr + 4) & ~BIT(offset % 32), addr + 4);
  53. }
  54. static int mscc_get_functions_count(struct udevice *dev)
  55. {
  56. struct mscc_pinctrl *info = dev_get_priv(dev);
  57. return info->num_func;
  58. }
  59. static const char *mscc_get_function_name(struct udevice *dev,
  60. unsigned int function)
  61. {
  62. struct mscc_pinctrl *info = dev_get_priv(dev);
  63. return info->function_names[function];
  64. }
  65. static int mscc_pin_function_idx(unsigned int pin, unsigned int function,
  66. const struct mscc_pin_data *mscc_pins)
  67. {
  68. struct mscc_pin_caps *p = mscc_pins[pin].drv_data;
  69. int i;
  70. for (i = 0; i < MSCC_FUNC_PER_PIN; i++) {
  71. if (function == p->functions[i])
  72. return i;
  73. }
  74. return -1;
  75. }
  76. static int mscc_pinmux_set_mux(struct udevice *dev,
  77. unsigned int pin_selector, unsigned int selector)
  78. {
  79. struct mscc_pinctrl *info = dev_get_priv(dev);
  80. struct mscc_pin_caps *pin = info->mscc_pins[pin_selector].drv_data;
  81. int f, offset, regoff;
  82. f = mscc_pin_function_idx(pin_selector, selector, info->mscc_pins);
  83. if (f < 0)
  84. return -EINVAL;
  85. /*
  86. * f is encoded on two bits.
  87. * bit 0 of f goes in BIT(pin) of ALT0, bit 1 of f goes in BIT(pin) of
  88. * ALT1
  89. * This is racy because both registers can't be updated at the same time
  90. * but it doesn't matter much for now.
  91. */
  92. offset = pin->pin;
  93. regoff = info->mscc_gpios[MSCC_GPIO_ALT0];
  94. if (offset >= 32) {
  95. offset = offset % 32;
  96. regoff = info->mscc_gpios[MSCC_GPIO_ALT1];
  97. }
  98. if (f & BIT(0))
  99. mscc_setbits(offset, info->regs + regoff);
  100. else
  101. mscc_clrbits(offset, info->regs + regoff);
  102. if (f & BIT(1))
  103. mscc_setbits(offset, info->regs + regoff + 4);
  104. else
  105. mscc_clrbits(offset, info->regs + regoff + 4);
  106. return 0;
  107. }
  108. static int mscc_pctl_get_groups_count(struct udevice *dev)
  109. {
  110. struct mscc_pinctrl *info = dev_get_priv(dev);
  111. return info->num_pins;
  112. }
  113. static const char *mscc_pctl_get_group_name(struct udevice *dev,
  114. unsigned int group)
  115. {
  116. struct mscc_pinctrl *info = dev_get_priv(dev);
  117. return info->mscc_pins[group].name;
  118. }
  119. static int mscc_create_group_func_map(struct udevice *dev,
  120. struct mscc_pinctrl *info)
  121. {
  122. u16 pins[info->num_pins];
  123. int f, npins, i;
  124. for (f = 0; f < info->num_func; f++) {
  125. for (npins = 0, i = 0; i < info->num_pins; i++) {
  126. if (mscc_pin_function_idx(i, f, info->mscc_pins) >= 0)
  127. pins[npins++] = i;
  128. }
  129. info->func[f].ngroups = npins;
  130. info->func[f].groups = devm_kzalloc(dev, npins * sizeof(char *),
  131. GFP_KERNEL);
  132. if (!info->func[f].groups)
  133. return -ENOMEM;
  134. for (i = 0; i < npins; i++)
  135. info->func[f].groups[i] = info->mscc_pins[pins[i]].name;
  136. }
  137. return 0;
  138. }
  139. static int mscc_pinctrl_register(struct udevice *dev, struct mscc_pinctrl *info)
  140. {
  141. int ret;
  142. ret = mscc_create_group_func_map(dev, info);
  143. if (ret) {
  144. dev_err(dev, "Unable to create group func map.\n");
  145. return ret;
  146. }
  147. return 0;
  148. }
  149. static int mscc_gpio_get(struct udevice *dev, unsigned int offset)
  150. {
  151. struct mscc_pinctrl *info = dev_get_priv(dev->parent);
  152. unsigned int val;
  153. if (mscc_readl(offset, info->regs + info->mscc_gpios[MSCC_GPIO_OE]) &
  154. BIT(offset % 32))
  155. val = mscc_readl(offset,
  156. info->regs + info->mscc_gpios[MSCC_GPIO_OUT]);
  157. else
  158. val = mscc_readl(offset,
  159. info->regs + info->mscc_gpios[MSCC_GPIO_IN]);
  160. return !!(val & BIT(offset % 32));
  161. }
  162. static int mscc_gpio_set(struct udevice *dev, unsigned int offset, int value)
  163. {
  164. struct mscc_pinctrl *info = dev_get_priv(dev->parent);
  165. if (value)
  166. mscc_writel(offset,
  167. info->regs + info->mscc_gpios[MSCC_GPIO_OUT_SET]);
  168. else
  169. mscc_writel(offset,
  170. info->regs + info->mscc_gpios[MSCC_GPIO_OUT_CLR]);
  171. return 0;
  172. }
  173. static int mscc_gpio_get_direction(struct udevice *dev, unsigned int offset)
  174. {
  175. struct mscc_pinctrl *info = dev_get_priv(dev->parent);
  176. unsigned int val;
  177. val = mscc_readl(offset, info->regs + info->mscc_gpios[MSCC_GPIO_OE]);
  178. return (val & BIT(offset % 32)) ? GPIOF_OUTPUT : GPIOF_INPUT;
  179. }
  180. static int mscc_gpio_direction_input(struct udevice *dev, unsigned int offset)
  181. {
  182. struct mscc_pinctrl *info = dev_get_priv(dev->parent);
  183. mscc_clrbits(offset, info->regs + info->mscc_gpios[MSCC_GPIO_OE]);
  184. return 0;
  185. }
  186. static int mscc_gpio_direction_output(struct udevice *dev,
  187. unsigned int offset, int value)
  188. {
  189. struct mscc_pinctrl *info = dev_get_priv(dev->parent);
  190. mscc_setbits(offset, info->regs + info->mscc_gpios[MSCC_GPIO_OE]);
  191. return mscc_gpio_set(dev, offset, value);
  192. }
  193. const struct dm_gpio_ops mscc_gpio_ops = {
  194. .set_value = mscc_gpio_set,
  195. .get_value = mscc_gpio_get,
  196. .get_function = mscc_gpio_get_direction,
  197. .direction_input = mscc_gpio_direction_input,
  198. .direction_output = mscc_gpio_direction_output,
  199. };
  200. const struct pinctrl_ops mscc_pinctrl_ops = {
  201. .get_pins_count = mscc_pctl_get_groups_count,
  202. .get_pin_name = mscc_pctl_get_group_name,
  203. .get_functions_count = mscc_get_functions_count,
  204. .get_function_name = mscc_get_function_name,
  205. .pinmux_set = mscc_pinmux_set_mux,
  206. .set_state = pinctrl_generic_set_state,
  207. };
  208. int mscc_pinctrl_probe(struct udevice *dev, int num_func,
  209. const struct mscc_pin_data *mscc_pins, int num_pins,
  210. char * const *function_names,
  211. const unsigned long *mscc_gpios)
  212. {
  213. struct mscc_pinctrl *priv = dev_get_priv(dev);
  214. int ret;
  215. priv->regs = dev_remap_addr(dev);
  216. if (!priv->regs)
  217. return -EINVAL;
  218. priv->func = devm_kzalloc(dev, num_func * sizeof(struct mscc_pmx_func),
  219. GFP_KERNEL);
  220. priv->num_func = num_func;
  221. priv->mscc_pins = mscc_pins;
  222. priv->num_pins = num_pins;
  223. priv->function_names = function_names;
  224. priv->mscc_gpios = mscc_gpios;
  225. ret = mscc_pinctrl_register(dev, priv);
  226. return ret;
  227. }