pinctrl-mtk-common.h 4.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2018 MediaTek Inc.
  4. * Author: Ryder Lee <ryder.lee@mediatek.com>
  5. */
  6. #ifndef __PINCTRL_MEDIATEK_H__
  7. #define __PINCTRL_MEDIATEK_H__
  8. #define MTK_PINCTRL_V0 0x0
  9. #define MTK_PINCTRL_V1 0x1
  10. #define MTK_RANGE(_a) { .range = (_a), .nranges = ARRAY_SIZE(_a), }
  11. #define MTK_PIN(_number, _name, _drv_n) { \
  12. .number = _number, \
  13. .name = _name, \
  14. .drv_n = _drv_n, \
  15. }
  16. #define PINCTRL_PIN_GROUP(name, id) \
  17. { \
  18. name, \
  19. id##_pins, \
  20. ARRAY_SIZE(id##_pins), \
  21. id##_funcs, \
  22. }
  23. #define PIN_FIELD_CALC(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, \
  24. _x_bits, _sz_reg, _fixed) { \
  25. .s_pin = _s_pin, \
  26. .e_pin = _e_pin, \
  27. .s_addr = _s_addr, \
  28. .x_addrs = _x_addrs, \
  29. .s_bit = _s_bit, \
  30. .x_bits = _x_bits, \
  31. .sz_reg = _sz_reg, \
  32. .fixed = _fixed, \
  33. }
  34. /* List these attributes which could be modified for the pin */
  35. enum {
  36. PINCTRL_PIN_REG_MODE,
  37. PINCTRL_PIN_REG_DIR,
  38. PINCTRL_PIN_REG_DI,
  39. PINCTRL_PIN_REG_DO,
  40. PINCTRL_PIN_REG_SMT,
  41. PINCTRL_PIN_REG_PD,
  42. PINCTRL_PIN_REG_PU,
  43. PINCTRL_PIN_REG_E4,
  44. PINCTRL_PIN_REG_E8,
  45. PINCTRL_PIN_REG_IES,
  46. PINCTRL_PIN_REG_PULLEN,
  47. PINCTRL_PIN_REG_PULLSEL,
  48. PINCTRL_PIN_REG_DRV,
  49. PINCTRL_PIN_REG_PUPD,
  50. PINCTRL_PIN_REG_R0,
  51. PINCTRL_PIN_REG_R1,
  52. PINCTRL_PIN_REG_MAX,
  53. };
  54. /* Group the pins by the driving current */
  55. enum {
  56. DRV_FIXED,
  57. DRV_GRP0,
  58. DRV_GRP1,
  59. DRV_GRP2,
  60. DRV_GRP3,
  61. DRV_GRP4,
  62. };
  63. /**
  64. * struct mtk_pin_field - the structure that holds the information of the field
  65. * used to describe the attribute for the pin
  66. * @offset: the register offset relative to the base address
  67. * @mask: the mask used to filter out the field from the register
  68. * @bitpos: the start bit relative to the register
  69. * @next: the indication that the field would be extended to the
  70. next register
  71. */
  72. struct mtk_pin_field {
  73. u32 offset;
  74. u32 mask;
  75. u8 bitpos;
  76. u8 next;
  77. };
  78. /**
  79. * struct mtk_pin_field_calc - the structure that holds the range providing
  80. * the guide used to look up the relevant field
  81. * @s_pin: the start pin within the range
  82. * @e_pin: the end pin within the range
  83. * @s_addr: the start address for the range
  84. * @x_addrs: the address distance between two consecutive registers
  85. * within the range
  86. * @s_bit: the start bit for the first register within the range
  87. * @x_bits: the bit distance between two consecutive pins within
  88. * the range
  89. * @sz_reg: the size of bits in a register
  90. * @fixed: the consecutive pins share the same bits with the 1st
  91. * pin
  92. */
  93. struct mtk_pin_field_calc {
  94. u16 s_pin;
  95. u16 e_pin;
  96. u32 s_addr;
  97. u8 x_addrs;
  98. u8 s_bit;
  99. u8 x_bits;
  100. u8 sz_reg;
  101. u8 fixed;
  102. };
  103. /**
  104. * struct mtk_pin_reg_calc - the structure that holds all ranges used to
  105. * determine which register the pin would make use of
  106. * for certain pin attribute.
  107. * @range: the start address for the range
  108. * @nranges: the number of items in the range
  109. */
  110. struct mtk_pin_reg_calc {
  111. const struct mtk_pin_field_calc *range;
  112. unsigned int nranges;
  113. };
  114. /**
  115. * struct mtk_pin_desc - the structure that providing information
  116. * for each pin of chips
  117. * @number: unique pin number from the global pin number space
  118. * @name: name for this pin
  119. * @drv_n: the index with the driving group
  120. */
  121. struct mtk_pin_desc {
  122. unsigned int number;
  123. const char *name;
  124. u8 drv_n;
  125. };
  126. /**
  127. * struct mtk_group_desc - generic pin group descriptor
  128. * @name: name of the pin group
  129. * @pins: array of pins that belong to the group
  130. * @num_pins: number of pins in the group
  131. * @data: pin controller driver specific data
  132. */
  133. struct mtk_group_desc {
  134. const char *name;
  135. int *pins;
  136. int num_pins;
  137. void *data;
  138. };
  139. /**
  140. * struct mtk_function_desc - generic function descriptor
  141. * @name: name of the function
  142. * @group_names: array of pin group names
  143. * @num_group_names: number of pin group names
  144. */
  145. struct mtk_function_desc {
  146. const char *name;
  147. const char * const *group_names;
  148. int num_group_names;
  149. };
  150. /* struct mtk_pin_soc - the structure that holds SoC-specific data */
  151. struct mtk_pinctrl_soc {
  152. const char *name;
  153. const struct mtk_pin_reg_calc *reg_cal;
  154. const struct mtk_pin_desc *pins;
  155. int npins;
  156. const struct mtk_group_desc *grps;
  157. int ngrps;
  158. const struct mtk_function_desc *funcs;
  159. int nfuncs;
  160. int gpio_mode;
  161. int rev;
  162. };
  163. /**
  164. * struct mtk_pinctrl_priv - private data for MTK pinctrl driver
  165. *
  166. * @base: base address of the pinctrl device
  167. * @soc: SoC specific data
  168. */
  169. struct mtk_pinctrl_priv {
  170. void __iomem *base;
  171. struct mtk_pinctrl_soc *soc;
  172. };
  173. extern const struct pinctrl_ops mtk_pinctrl_ops;
  174. /* A common read-modify-write helper for MediaTek chips */
  175. void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set);
  176. int mtk_pinctrl_common_probe(struct udevice *dev,
  177. struct mtk_pinctrl_soc *soc);
  178. #endif /* __PINCTRL_MEDIATEK_H__ */