pinctrl-mt7623.c 57 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2018 MediaTek Inc.
  4. * Author: Ryder Lee <ryder.lee@mediatek.com>
  5. */
  6. #include <dm.h>
  7. #include "pinctrl-mtk-common.h"
  8. #define PIN_BOND_REG0 0xb10
  9. #define PIN_BOND_REG1 0xf20
  10. #define PIN_BOND_REG2 0xef0
  11. #define BOND_PCIE_CLR (0x77 << 3)
  12. #define BOND_I2S_CLR 0x3
  13. #define BOND_MSDC0E_CLR 0x1
  14. #define PIN_FIELD15(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits) \
  15. PIN_FIELD_CALC(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, \
  16. _x_bits, 15, false)
  17. #define PIN_FIELD16(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits) \
  18. PIN_FIELD_CALC(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, \
  19. _x_bits, 16, false)
  20. #define PINS_FIELD16(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits)\
  21. PIN_FIELD_CALC(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, \
  22. _x_bits, 16, true)
  23. static const struct mtk_pin_field_calc mt7623_pin_mode_range[] = {
  24. PIN_FIELD15(0, 278, 0x760, 0x10, 0, 3),
  25. };
  26. static const struct mtk_pin_field_calc mt7623_pin_dir_range[] = {
  27. PIN_FIELD16(0, 175, 0x0, 0x10, 0, 1),
  28. PIN_FIELD16(176, 278, 0xc0, 0x10, 0, 1),
  29. };
  30. static const struct mtk_pin_field_calc mt7623_pin_di_range[] = {
  31. PIN_FIELD16(0, 278, 0x630, 0x10, 0, 1),
  32. };
  33. static const struct mtk_pin_field_calc mt7623_pin_do_range[] = {
  34. PIN_FIELD16(0, 278, 0x500, 0x10, 0, 1),
  35. };
  36. static const struct mtk_pin_field_calc mt7623_pin_ies_range[] = {
  37. PINS_FIELD16(0, 6, 0xb20, 0x10, 0, 1),
  38. PINS_FIELD16(7, 9, 0xb20, 0x10, 1, 1),
  39. PINS_FIELD16(10, 13, 0xb30, 0x10, 3, 1),
  40. PINS_FIELD16(14, 15, 0xb30, 0x10, 13, 1),
  41. PINS_FIELD16(16, 17, 0xb40, 0x10, 7, 1),
  42. PINS_FIELD16(18, 29, 0xb40, 0x10, 13, 1),
  43. PINS_FIELD16(30, 32, 0xb40, 0x10, 7, 1),
  44. PINS_FIELD16(33, 37, 0xb40, 0x10, 13, 1),
  45. PIN_FIELD16(38, 38, 0xb20, 0x10, 13, 1),
  46. PINS_FIELD16(39, 42, 0xb40, 0x10, 13, 1),
  47. PINS_FIELD16(43, 45, 0xb20, 0x10, 10, 1),
  48. PINS_FIELD16(47, 48, 0xb20, 0x10, 11, 1),
  49. PIN_FIELD16(49, 49, 0xb20, 0x10, 12, 1),
  50. PINS_FIELD16(50, 52, 0xb20, 0x10, 13, 1),
  51. PINS_FIELD16(53, 56, 0xb20, 0x10, 14, 1),
  52. PINS_FIELD16(57, 58, 0xb20, 0x10, 15, 1),
  53. PIN_FIELD16(59, 59, 0xb30, 0x10, 10, 1),
  54. PINS_FIELD16(60, 62, 0xb30, 0x10, 0, 1),
  55. PINS_FIELD16(63, 65, 0xb30, 0x10, 1, 1),
  56. PINS_FIELD16(66, 71, 0xb30, 0x10, 2, 1),
  57. PINS_FIELD16(72, 74, 0xb20, 0x10, 12, 1),
  58. PINS_FIELD16(75, 76, 0xb30, 0x10, 3, 1),
  59. PINS_FIELD16(77, 78, 0xb30, 0x10, 4, 1),
  60. PINS_FIELD16(79, 82, 0xb30, 0x10, 5, 1),
  61. PINS_FIELD16(83, 84, 0xb30, 0x10, 2, 1),
  62. PIN_FIELD16(85, 85, 0xda0, 0x10, 4, 1),
  63. PIN_FIELD16(86, 86, 0xd90, 0x10, 4, 1),
  64. PINS_FIELD16(87, 90, 0xdb0, 0x10, 4, 1),
  65. PINS_FIELD16(101, 104, 0xb30, 0x10, 6, 1),
  66. PIN_FIELD16(105, 105, 0xd40, 0x10, 4, 1),
  67. PIN_FIELD16(106, 106, 0xd30, 0x10, 4, 1),
  68. PINS_FIELD16(107, 110, 0xd50, 0x10, 4, 1),
  69. PINS_FIELD16(111, 115, 0xce0, 0x10, 4, 1),
  70. PIN_FIELD16(116, 116, 0xcd0, 0x10, 4, 1),
  71. PIN_FIELD16(117, 117, 0xcc0, 0x10, 4, 1),
  72. PINS_FIELD16(118, 121, 0xce0, 0x10, 4, 1),
  73. PINS_FIELD16(122, 125, 0xb30, 0x10, 7, 1),
  74. PIN_FIELD16(126, 126, 0xb20, 0x10, 12, 1),
  75. PINS_FIELD16(127, 142, 0xb30, 0x10, 9, 1),
  76. PINS_FIELD16(143, 160, 0xb30, 0x10, 10, 1),
  77. PINS_FIELD16(161, 168, 0xb30, 0x10, 12, 1),
  78. PINS_FIELD16(169, 183, 0xb30, 0x10, 10, 1),
  79. PINS_FIELD16(184, 186, 0xb30, 0x10, 9, 1),
  80. PIN_FIELD16(187, 187, 0xb30, 0x10, 14, 1),
  81. PIN_FIELD16(188, 188, 0xb20, 0x10, 13, 1),
  82. PINS_FIELD16(189, 193, 0xb30, 0x10, 15, 1),
  83. PINS_FIELD16(194, 198, 0xb40, 0x10, 0, 1),
  84. PIN_FIELD16(199, 199, 0xb20, 0x10, 1, 1),
  85. PINS_FIELD16(200, 202, 0xb40, 0x10, 1, 1),
  86. PINS_FIELD16(203, 207, 0xb40, 0x10, 2, 1),
  87. PINS_FIELD16(208, 209, 0xb40, 0x10, 3, 1),
  88. PIN_FIELD16(210, 210, 0xb40, 0x10, 4, 1),
  89. PINS_FIELD16(211, 235, 0xb40, 0x10, 5, 1),
  90. PINS_FIELD16(236, 241, 0xb40, 0x10, 6, 1),
  91. PINS_FIELD16(242, 243, 0xb40, 0x10, 7, 1),
  92. PINS_FIELD16(244, 247, 0xb40, 0x10, 8, 1),
  93. PIN_FIELD16(248, 248, 0xb40, 0x10, 9, 1),
  94. PINS_FIELD16(249, 257, 0xfc0, 0x10, 4, 1),
  95. PIN_FIELD16(258, 258, 0xcb0, 0x10, 4, 1),
  96. PIN_FIELD16(259, 259, 0xc90, 0x10, 4, 1),
  97. PIN_FIELD16(260, 260, 0x3a0, 0x10, 4, 1),
  98. PIN_FIELD16(261, 261, 0xd50, 0x10, 4, 1),
  99. PINS_FIELD16(262, 277, 0xb40, 0x10, 12, 1),
  100. PIN_FIELD16(278, 278, 0xb40, 0x10, 13, 1),
  101. };
  102. static const struct mtk_pin_field_calc mt7623_pin_smt_range[] = {
  103. PINS_FIELD16(0, 6, 0xb50, 0x10, 0, 1),
  104. PINS_FIELD16(7, 9, 0xb50, 0x10, 1, 1),
  105. PINS_FIELD16(10, 13, 0xb60, 0x10, 3, 1),
  106. PINS_FIELD16(14, 15, 0xb60, 0x10, 13, 1),
  107. PINS_FIELD16(16, 17, 0xb70, 0x10, 7, 1),
  108. PINS_FIELD16(18, 29, 0xb70, 0x10, 13, 1),
  109. PINS_FIELD16(30, 32, 0xb70, 0x10, 7, 1),
  110. PINS_FIELD16(33, 37, 0xb70, 0x10, 13, 1),
  111. PIN_FIELD16(38, 38, 0xb50, 0x10, 13, 1),
  112. PINS_FIELD16(39, 42, 0xb70, 0x10, 13, 1),
  113. PINS_FIELD16(43, 45, 0xb50, 0x10, 10, 1),
  114. PINS_FIELD16(47, 48, 0xb50, 0x10, 11, 1),
  115. PIN_FIELD16(49, 49, 0xb50, 0x10, 12, 1),
  116. PINS_FIELD16(50, 52, 0xb50, 0x10, 13, 1),
  117. PINS_FIELD16(53, 56, 0xb50, 0x10, 14, 1),
  118. PINS_FIELD16(57, 58, 0xb50, 0x10, 15, 1),
  119. PIN_FIELD16(59, 59, 0xb60, 0x10, 10, 1),
  120. PINS_FIELD16(60, 62, 0xb60, 0x10, 0, 1),
  121. PINS_FIELD16(63, 65, 0xb60, 0x10, 1, 1),
  122. PINS_FIELD16(66, 71, 0xb60, 0x10, 2, 1),
  123. PINS_FIELD16(72, 74, 0xb50, 0x10, 12, 1),
  124. PINS_FIELD16(75, 76, 0xb60, 0x10, 3, 1),
  125. PINS_FIELD16(77, 78, 0xb60, 0x10, 4, 1),
  126. PINS_FIELD16(79, 82, 0xb60, 0x10, 5, 1),
  127. PINS_FIELD16(83, 84, 0xb60, 0x10, 2, 1),
  128. PIN_FIELD16(85, 85, 0xda0, 0x10, 11, 1),
  129. PIN_FIELD16(86, 86, 0xd90, 0x10, 11, 1),
  130. PIN_FIELD16(87, 87, 0xdc0, 0x10, 3, 1),
  131. PIN_FIELD16(88, 88, 0xdc0, 0x10, 7, 1),
  132. PIN_FIELD16(89, 89, 0xdc0, 0x10, 11, 1),
  133. PIN_FIELD16(90, 90, 0xdc0, 0x10, 15, 1),
  134. PINS_FIELD16(101, 104, 0xb60, 0x10, 6, 1),
  135. PIN_FIELD16(105, 105, 0xd40, 0x10, 11, 1),
  136. PIN_FIELD16(106, 106, 0xd30, 0x10, 11, 1),
  137. PIN_FIELD16(107, 107, 0xd60, 0x10, 3, 1),
  138. PIN_FIELD16(108, 108, 0xd60, 0x10, 7, 1),
  139. PIN_FIELD16(109, 109, 0xd60, 0x10, 11, 1),
  140. PIN_FIELD16(110, 110, 0xd60, 0x10, 15, 1),
  141. PIN_FIELD16(111, 111, 0xd00, 0x10, 15, 1),
  142. PIN_FIELD16(112, 112, 0xd00, 0x10, 11, 1),
  143. PIN_FIELD16(113, 113, 0xd00, 0x10, 7, 1),
  144. PIN_FIELD16(114, 114, 0xd00, 0x10, 3, 1),
  145. PIN_FIELD16(115, 115, 0xd10, 0x10, 3, 1),
  146. PIN_FIELD16(116, 116, 0xcd0, 0x10, 11, 1),
  147. PIN_FIELD16(117, 117, 0xcc0, 0x10, 11, 1),
  148. PIN_FIELD16(118, 118, 0xcf0, 0x10, 15, 1),
  149. PIN_FIELD16(119, 119, 0xcf0, 0x10, 7, 1),
  150. PIN_FIELD16(120, 120, 0xcf0, 0x10, 3, 1),
  151. PIN_FIELD16(121, 121, 0xcf0, 0x10, 7, 1),
  152. PINS_FIELD16(122, 125, 0xb60, 0x10, 7, 1),
  153. PIN_FIELD16(126, 126, 0xb50, 0x10, 12, 1),
  154. PINS_FIELD16(127, 142, 0xb60, 0x10, 9, 1),
  155. PINS_FIELD16(143, 160, 0xb60, 0x10, 10, 1),
  156. PINS_FIELD16(161, 168, 0xb60, 0x10, 12, 1),
  157. PINS_FIELD16(169, 183, 0xb60, 0x10, 10, 1),
  158. PINS_FIELD16(184, 186, 0xb60, 0x10, 9, 1),
  159. PIN_FIELD16(187, 187, 0xb60, 0x10, 14, 1),
  160. PIN_FIELD16(188, 188, 0xb50, 0x10, 13, 1),
  161. PINS_FIELD16(189, 193, 0xb60, 0x10, 15, 1),
  162. PINS_FIELD16(194, 198, 0xb70, 0x10, 0, 1),
  163. PIN_FIELD16(199, 199, 0xb50, 0x10, 1, 1),
  164. PINS_FIELD16(200, 202, 0xb70, 0x10, 1, 1),
  165. PINS_FIELD16(203, 207, 0xb70, 0x10, 2, 1),
  166. PINS_FIELD16(208, 209, 0xb70, 0x10, 3, 1),
  167. PIN_FIELD16(210, 210, 0xb70, 0x10, 4, 1),
  168. PINS_FIELD16(211, 235, 0xb70, 0x10, 5, 1),
  169. PINS_FIELD16(236, 241, 0xb70, 0x10, 6, 1),
  170. PINS_FIELD16(242, 243, 0xb70, 0x10, 7, 1),
  171. PINS_FIELD16(244, 247, 0xb70, 0x10, 8, 1),
  172. PIN_FIELD16(248, 248, 0xb70, 0x10, 9, 10),
  173. PIN_FIELD16(249, 249, 0x140, 0x10, 3, 1),
  174. PIN_FIELD16(250, 250, 0x130, 0x10, 15, 1),
  175. PIN_FIELD16(251, 251, 0x130, 0x10, 11, 1),
  176. PIN_FIELD16(252, 252, 0x130, 0x10, 7, 1),
  177. PIN_FIELD16(253, 253, 0x130, 0x10, 3, 1),
  178. PIN_FIELD16(254, 254, 0xf40, 0x10, 15, 1),
  179. PIN_FIELD16(255, 255, 0xf40, 0x10, 11, 1),
  180. PIN_FIELD16(256, 256, 0xf40, 0x10, 7, 1),
  181. PIN_FIELD16(257, 257, 0xf40, 0x10, 3, 1),
  182. PIN_FIELD16(258, 258, 0xcb0, 0x10, 11, 1),
  183. PIN_FIELD16(259, 259, 0xc90, 0x10, 11, 1),
  184. PIN_FIELD16(260, 260, 0x3a0, 0x10, 11, 1),
  185. PIN_FIELD16(261, 261, 0x0b0, 0x10, 3, 1),
  186. PINS_FIELD16(262, 277, 0xb70, 0x10, 12, 1),
  187. PIN_FIELD16(278, 278, 0xb70, 0x10, 13, 1),
  188. };
  189. static const struct mtk_pin_field_calc mt7623_pin_pullen_range[] = {
  190. PIN_FIELD16(0, 278, 0x150, 0x10, 0, 1),
  191. };
  192. static const struct mtk_pin_field_calc mt7623_pin_pullsel_range[] = {
  193. PIN_FIELD16(0, 278, 0x280, 0x10, 0, 1),
  194. };
  195. static const struct mtk_pin_field_calc mt7623_pin_drv_range[] = {
  196. PINS_FIELD16(0, 6, 0xf50, 0x10, 0, 4),
  197. PINS_FIELD16(7, 9, 0xf50, 0x10, 4, 4),
  198. PINS_FIELD16(10, 13, 0xf50, 0x10, 4, 4),
  199. PINS_FIELD16(14, 15, 0xf50, 0x10, 12, 4),
  200. PINS_FIELD16(16, 17, 0xf60, 0x10, 0, 4),
  201. PINS_FIELD16(18, 21, 0xf60, 0x10, 0, 4),
  202. PINS_FIELD16(22, 26, 0xf60, 0x10, 8, 4),
  203. PINS_FIELD16(27, 29, 0xf60, 0x10, 12, 4),
  204. PINS_FIELD16(30, 32, 0xf60, 0x10, 0, 4),
  205. PINS_FIELD16(33, 37, 0xf70, 0x10, 0, 4),
  206. PIN_FIELD16(38, 38, 0xf70, 0x10, 4, 4),
  207. PINS_FIELD16(39, 42, 0xf70, 0x10, 8, 4),
  208. PINS_FIELD16(43, 45, 0xf70, 0x10, 12, 4),
  209. PINS_FIELD16(47, 48, 0xf80, 0x10, 0, 4),
  210. PIN_FIELD16(49, 49, 0xf80, 0x10, 4, 4),
  211. PINS_FIELD16(50, 52, 0xf70, 0x10, 4, 4),
  212. PINS_FIELD16(53, 56, 0xf80, 0x10, 12, 4),
  213. PINS_FIELD16(60, 62, 0xf90, 0x10, 8, 4),
  214. PINS_FIELD16(63, 65, 0xf90, 0x10, 12, 4),
  215. PINS_FIELD16(66, 71, 0xfa0, 0x10, 0, 4),
  216. PINS_FIELD16(72, 74, 0xf80, 0x10, 4, 4),
  217. PIN_FIELD16(85, 85, 0xda0, 0x10, 0, 4),
  218. PIN_FIELD16(86, 86, 0xd90, 0x10, 0, 4),
  219. PINS_FIELD16(87, 90, 0xdb0, 0x10, 0, 4),
  220. PIN_FIELD16(105, 105, 0xd40, 0x10, 0, 4),
  221. PIN_FIELD16(106, 106, 0xd30, 0x10, 0, 4),
  222. PINS_FIELD16(107, 110, 0xd50, 0x10, 0, 4),
  223. PINS_FIELD16(111, 115, 0xce0, 0x10, 0, 4),
  224. PIN_FIELD16(116, 116, 0xcd0, 0x10, 0, 4),
  225. PIN_FIELD16(117, 117, 0xcc0, 0x10, 0, 4),
  226. PINS_FIELD16(118, 121, 0xce0, 0x10, 0, 4),
  227. PIN_FIELD16(126, 126, 0xf80, 0x10, 4, 4),
  228. PIN_FIELD16(188, 188, 0xf70, 0x10, 4, 4),
  229. PINS_FIELD16(189, 193, 0xfe0, 0x10, 8, 4),
  230. PINS_FIELD16(194, 198, 0xfe0, 0x10, 12, 4),
  231. PIN_FIELD16(199, 199, 0xf50, 0x10, 4, 4),
  232. PINS_FIELD16(200, 202, 0xfd0, 0x10, 0, 4),
  233. PINS_FIELD16(203, 207, 0xfd0, 0x10, 4, 4),
  234. PINS_FIELD16(208, 209, 0xfd0, 0x10, 8, 4),
  235. PIN_FIELD16(210, 210, 0xfd0, 0x10, 12, 4),
  236. PINS_FIELD16(211, 235, 0xff0, 0x10, 0, 4),
  237. PINS_FIELD16(236, 241, 0xff0, 0x10, 4, 4),
  238. PINS_FIELD16(242, 243, 0xff0, 0x10, 8, 4),
  239. PIN_FIELD16(248, 248, 0xf00, 0x10, 0, 4),
  240. PINS_FIELD16(249, 256, 0xfc0, 0x10, 0, 4),
  241. PIN_FIELD16(257, 257, 0xce0, 0x10, 0, 4),
  242. PIN_FIELD16(258, 258, 0xcb0, 0x10, 0, 4),
  243. PIN_FIELD16(259, 259, 0xc90, 0x10, 0, 4),
  244. PIN_FIELD16(260, 260, 0x3a0, 0x10, 0, 4),
  245. PIN_FIELD16(261, 261, 0xd50, 0x10, 0, 4),
  246. PINS_FIELD16(262, 277, 0xf00, 0x10, 8, 4),
  247. PIN_FIELD16(278, 278, 0xf70, 0x10, 8, 4),
  248. };
  249. static const struct mtk_pin_field_calc mt7623_pin_pupd_range[] = {
  250. /* MSDC0 */
  251. PIN_FIELD16(111, 111, 0xd00, 0x10, 12, 1),
  252. PIN_FIELD16(112, 112, 0xd00, 0x10, 8, 1),
  253. PIN_FIELD16(113, 113, 0xd00, 0x10, 4, 1),
  254. PIN_FIELD16(114, 114, 0xd00, 0x10, 0, 1),
  255. PIN_FIELD16(115, 115, 0xd10, 0x10, 0, 1),
  256. PIN_FIELD16(116, 116, 0xcd0, 0x10, 8, 1),
  257. PIN_FIELD16(117, 117, 0xcc0, 0x10, 8, 1),
  258. PIN_FIELD16(118, 118, 0xcf0, 0x10, 12, 1),
  259. PIN_FIELD16(119, 119, 0xcf0, 0x10, 8, 1),
  260. PIN_FIELD16(120, 120, 0xcf0, 0x10, 4, 1),
  261. PIN_FIELD16(121, 121, 0xcf0, 0x10, 0, 1),
  262. /* MSDC1 */
  263. PIN_FIELD16(105, 105, 0xd40, 0x10, 8, 1),
  264. PIN_FIELD16(106, 106, 0xd30, 0x10, 8, 1),
  265. PIN_FIELD16(107, 107, 0xd60, 0x10, 0, 1),
  266. PIN_FIELD16(108, 108, 0xd60, 0x10, 10, 1),
  267. PIN_FIELD16(109, 109, 0xd60, 0x10, 4, 1),
  268. PIN_FIELD16(110, 110, 0xc60, 0x10, 12, 1),
  269. /* MSDC1 */
  270. PIN_FIELD16(85, 85, 0xda0, 0x10, 8, 1),
  271. PIN_FIELD16(86, 86, 0xd90, 0x10, 8, 1),
  272. PIN_FIELD16(87, 87, 0xdc0, 0x10, 0, 1),
  273. PIN_FIELD16(88, 88, 0xdc0, 0x10, 10, 1),
  274. PIN_FIELD16(89, 89, 0xdc0, 0x10, 4, 1),
  275. PIN_FIELD16(90, 90, 0xdc0, 0x10, 12, 1),
  276. /* MSDC0E */
  277. PIN_FIELD16(249, 249, 0x140, 0x10, 0, 1),
  278. PIN_FIELD16(250, 250, 0x130, 0x10, 12, 1),
  279. PIN_FIELD16(251, 251, 0x130, 0x10, 8, 1),
  280. PIN_FIELD16(252, 252, 0x130, 0x10, 4, 1),
  281. PIN_FIELD16(253, 253, 0x130, 0x10, 0, 1),
  282. PIN_FIELD16(254, 254, 0xf40, 0x10, 12, 1),
  283. PIN_FIELD16(255, 255, 0xf40, 0x10, 8, 1),
  284. PIN_FIELD16(256, 256, 0xf40, 0x10, 4, 1),
  285. PIN_FIELD16(257, 257, 0xf40, 0x10, 0, 1),
  286. PIN_FIELD16(258, 258, 0xcb0, 0x10, 8, 1),
  287. PIN_FIELD16(259, 259, 0xc90, 0x10, 8, 1),
  288. PIN_FIELD16(261, 261, 0x140, 0x10, 8, 1),
  289. };
  290. static const struct mtk_pin_field_calc mt7623_pin_r1_range[] = {
  291. /* MSDC0 */
  292. PIN_FIELD16(111, 111, 0xd00, 0x10, 13, 1),
  293. PIN_FIELD16(112, 112, 0xd00, 0x10, 9, 1),
  294. PIN_FIELD16(113, 113, 0xd00, 0x10, 5, 1),
  295. PIN_FIELD16(114, 114, 0xd00, 0x10, 1, 1),
  296. PIN_FIELD16(115, 115, 0xd10, 0x10, 1, 1),
  297. PIN_FIELD16(116, 116, 0xcd0, 0x10, 9, 1),
  298. PIN_FIELD16(117, 117, 0xcc0, 0x10, 9, 1),
  299. PIN_FIELD16(118, 118, 0xcf0, 0x10, 13, 1),
  300. PIN_FIELD16(119, 119, 0xcf0, 0x10, 9, 1),
  301. PIN_FIELD16(120, 120, 0xcf0, 0x10, 5, 1),
  302. PIN_FIELD16(121, 121, 0xcf0, 0x10, 1, 1),
  303. /* MSDC1 */
  304. PIN_FIELD16(105, 105, 0xd40, 0x10, 9, 1),
  305. PIN_FIELD16(106, 106, 0xd30, 0x10, 9, 1),
  306. PIN_FIELD16(107, 107, 0xd60, 0x10, 1, 1),
  307. PIN_FIELD16(108, 108, 0xd60, 0x10, 9, 1),
  308. PIN_FIELD16(109, 109, 0xd60, 0x10, 5, 1),
  309. PIN_FIELD16(110, 110, 0xc60, 0x10, 13, 1),
  310. /* MSDC2 */
  311. PIN_FIELD16(85, 85, 0xda0, 0x10, 9, 1),
  312. PIN_FIELD16(86, 86, 0xd90, 0x10, 9, 1),
  313. PIN_FIELD16(87, 87, 0xdc0, 0x10, 1, 1),
  314. PIN_FIELD16(88, 88, 0xdc0, 0x10, 9, 1),
  315. PIN_FIELD16(89, 89, 0xdc0, 0x10, 5, 1),
  316. PIN_FIELD16(90, 90, 0xdc0, 0x10, 13, 1),
  317. /* MSDC0E */
  318. PIN_FIELD16(249, 249, 0x140, 0x10, 1, 1),
  319. PIN_FIELD16(250, 250, 0x130, 0x10, 13, 1),
  320. PIN_FIELD16(251, 251, 0x130, 0x10, 9, 1),
  321. PIN_FIELD16(252, 252, 0x130, 0x10, 5, 1),
  322. PIN_FIELD16(253, 253, 0x130, 0x10, 1, 1),
  323. PIN_FIELD16(254, 254, 0xf40, 0x10, 13, 1),
  324. PIN_FIELD16(255, 255, 0xf40, 0x10, 9, 1),
  325. PIN_FIELD16(256, 256, 0xf40, 0x10, 5, 1),
  326. PIN_FIELD16(257, 257, 0xf40, 0x10, 1, 1),
  327. PIN_FIELD16(258, 258, 0xcb0, 0x10, 9, 1),
  328. PIN_FIELD16(259, 259, 0xc90, 0x10, 9, 1),
  329. PIN_FIELD16(261, 261, 0x140, 0x10, 9, 1),
  330. };
  331. static const struct mtk_pin_field_calc mt7623_pin_r0_range[] = {
  332. /* MSDC0 */
  333. PIN_FIELD16(111, 111, 0xd00, 0x10, 14, 1),
  334. PIN_FIELD16(112, 112, 0xd00, 0x10, 10, 1),
  335. PIN_FIELD16(113, 113, 0xd00, 0x10, 6, 1),
  336. PIN_FIELD16(114, 114, 0xd00, 0x10, 2, 1),
  337. PIN_FIELD16(115, 115, 0xd10, 0x10, 2, 1),
  338. PIN_FIELD16(116, 116, 0xcd0, 0x10, 10, 1),
  339. PIN_FIELD16(117, 117, 0xcc0, 0x10, 10, 1),
  340. PIN_FIELD16(118, 118, 0xcf0, 0x10, 14, 1),
  341. PIN_FIELD16(119, 119, 0xcf0, 0x10, 10, 1),
  342. PIN_FIELD16(120, 120, 0xcf0, 0x10, 6, 1),
  343. PIN_FIELD16(121, 121, 0xcf0, 0x10, 2, 1),
  344. /* MSDC1 */
  345. PIN_FIELD16(105, 105, 0xd40, 0x10, 10, 1),
  346. PIN_FIELD16(106, 106, 0xd30, 0x10, 10, 1),
  347. PIN_FIELD16(107, 107, 0xd60, 0x10, 2, 1),
  348. PIN_FIELD16(108, 108, 0xd60, 0x10, 8, 1),
  349. PIN_FIELD16(109, 109, 0xd60, 0x10, 6, 1),
  350. PIN_FIELD16(110, 110, 0xc60, 0x10, 14, 1),
  351. /* MSDC2 */
  352. PIN_FIELD16(85, 85, 0xda0, 0x10, 10, 1),
  353. PIN_FIELD16(86, 86, 0xd90, 0x10, 10, 1),
  354. PIN_FIELD16(87, 87, 0xdc0, 0x10, 2, 1),
  355. PIN_FIELD16(88, 88, 0xdc0, 0x10, 8, 1),
  356. PIN_FIELD16(89, 89, 0xdc0, 0x10, 6, 1),
  357. PIN_FIELD16(90, 90, 0xdc0, 0x10, 14, 1),
  358. /* MSDC0E */
  359. PIN_FIELD16(249, 249, 0x140, 0x10, 2, 1),
  360. PIN_FIELD16(250, 250, 0x130, 0x10, 14, 1),
  361. PIN_FIELD16(251, 251, 0x130, 0x10, 10, 1),
  362. PIN_FIELD16(252, 252, 0x130, 0x10, 6, 1),
  363. PIN_FIELD16(253, 253, 0x130, 0x10, 2, 1),
  364. PIN_FIELD16(254, 254, 0xf40, 0x10, 14, 1),
  365. PIN_FIELD16(255, 255, 0xf40, 0x10, 10, 1),
  366. PIN_FIELD16(256, 256, 0xf40, 0x10, 6, 1),
  367. PIN_FIELD16(257, 257, 0xf40, 0x10, 5, 1),
  368. PIN_FIELD16(258, 258, 0xcb0, 0x10, 10, 1),
  369. PIN_FIELD16(259, 259, 0xc90, 0x10, 10, 1),
  370. PIN_FIELD16(261, 261, 0x140, 0x10, 10, 1),
  371. };
  372. static const struct mtk_pin_reg_calc mt7623_reg_cals[] = {
  373. [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt7623_pin_mode_range),
  374. [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt7623_pin_dir_range),
  375. [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt7623_pin_di_range),
  376. [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt7623_pin_do_range),
  377. [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt7623_pin_ies_range),
  378. [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt7623_pin_smt_range),
  379. [PINCTRL_PIN_REG_PULLSEL] = MTK_RANGE(mt7623_pin_pullsel_range),
  380. [PINCTRL_PIN_REG_PULLEN] = MTK_RANGE(mt7623_pin_pullen_range),
  381. [PINCTRL_PIN_REG_DRV] = MTK_RANGE(mt7623_pin_drv_range),
  382. [PINCTRL_PIN_REG_PUPD] = MTK_RANGE(mt7623_pin_pupd_range),
  383. [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt7623_pin_r0_range),
  384. [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt7623_pin_r1_range),
  385. };
  386. static const struct mtk_pin_desc mt7623_pins[] = {
  387. MTK_PIN(0, "PWRAP_SPI0_MI", DRV_GRP3),
  388. MTK_PIN(1, "PWRAP_SPI0_MO", DRV_GRP3),
  389. MTK_PIN(2, "PWRAP_INT", DRV_GRP3),
  390. MTK_PIN(3, "PWRAP_SPI0_CK", DRV_GRP3),
  391. MTK_PIN(4, "PWRAP_SPI0_CSN", DRV_GRP3),
  392. MTK_PIN(5, "PWRAP_SPI0_CK2", DRV_GRP3),
  393. MTK_PIN(6, "PWRAP_SPI0_CSN2", DRV_GRP3),
  394. MTK_PIN(7, "SPI1_CSN", DRV_GRP3),
  395. MTK_PIN(8, "SPI1_MI", DRV_GRP3),
  396. MTK_PIN(9, "SPI1_MO", DRV_GRP3),
  397. MTK_PIN(10, "RTC32K_CK", DRV_GRP3),
  398. MTK_PIN(11, "WATCHDOG", DRV_GRP3),
  399. MTK_PIN(12, "SRCLKENA", DRV_GRP3),
  400. MTK_PIN(13, "SRCLKENAI", DRV_GRP3),
  401. MTK_PIN(14, "URXD2", DRV_GRP1),
  402. MTK_PIN(15, "UTXD2", DRV_GRP1),
  403. MTK_PIN(16, "I2S5_DATA_IN", DRV_GRP1),
  404. MTK_PIN(17, "I2S5_BCK", DRV_GRP1),
  405. MTK_PIN(18, "PCM_CLK", DRV_GRP1),
  406. MTK_PIN(19, "PCM_SYNC", DRV_GRP1),
  407. MTK_PIN(20, "PCM_RX", DRV_GRP1),
  408. MTK_PIN(21, "PCM_TX", DRV_GRP1),
  409. MTK_PIN(22, "EINT0", DRV_GRP1),
  410. MTK_PIN(23, "EINT1", DRV_GRP1),
  411. MTK_PIN(24, "EINT2", DRV_GRP1),
  412. MTK_PIN(25, "EINT3", DRV_GRP1),
  413. MTK_PIN(26, "EINT4", DRV_GRP1),
  414. MTK_PIN(27, "EINT5", DRV_GRP1),
  415. MTK_PIN(28, "EINT6", DRV_GRP1),
  416. MTK_PIN(29, "EINT7", DRV_GRP1),
  417. MTK_PIN(30, "I2S5_LRCK", DRV_GRP1),
  418. MTK_PIN(31, "I2S5_MCLK", DRV_GRP1),
  419. MTK_PIN(32, "I2S5_DATA", DRV_GRP1),
  420. MTK_PIN(33, "I2S1_DATA", DRV_GRP1),
  421. MTK_PIN(34, "I2S1_DATA_IN", DRV_GRP1),
  422. MTK_PIN(35, "I2S1_BCK", DRV_GRP1),
  423. MTK_PIN(36, "I2S1_LRCK", DRV_GRP1),
  424. MTK_PIN(37, "I2S1_MCLK", DRV_GRP1),
  425. MTK_PIN(38, "I2S2_DATA", DRV_GRP1),
  426. MTK_PIN(39, "JTMS", DRV_GRP3),
  427. MTK_PIN(40, "JTCK", DRV_GRP3),
  428. MTK_PIN(41, "JTDI", DRV_GRP3),
  429. MTK_PIN(42, "JTDO", DRV_GRP3),
  430. MTK_PIN(43, "NCLE", DRV_GRP1),
  431. MTK_PIN(44, "NCEB1", DRV_GRP1),
  432. MTK_PIN(45, "NCEB0", DRV_GRP1),
  433. MTK_PIN(46, "IR", DRV_FIXED),
  434. MTK_PIN(47, "NREB", DRV_GRP1),
  435. MTK_PIN(48, "NRNB", DRV_GRP1),
  436. MTK_PIN(49, "I2S0_DATA", DRV_GRP1),
  437. MTK_PIN(50, "I2S2_BCK", DRV_GRP1),
  438. MTK_PIN(51, "I2S2_DATA_IN", DRV_GRP1),
  439. MTK_PIN(52, "I2S2_LRCK", DRV_GRP1),
  440. MTK_PIN(53, "SPI0_CSN", DRV_GRP1),
  441. MTK_PIN(54, "SPI0_CK", DRV_GRP1),
  442. MTK_PIN(55, "SPI0_MI", DRV_GRP1),
  443. MTK_PIN(56, "SPI0_MO", DRV_GRP1),
  444. MTK_PIN(57, "SDA1", DRV_FIXED),
  445. MTK_PIN(58, "SCL1", DRV_FIXED),
  446. MTK_PIN(59, "RAMBUF_I_CLK", DRV_FIXED),
  447. MTK_PIN(60, "WB_RSTB", DRV_GRP3),
  448. MTK_PIN(61, "F2W_DATA", DRV_GRP3),
  449. MTK_PIN(62, "F2W_CLK", DRV_GRP3),
  450. MTK_PIN(63, "WB_SCLK", DRV_GRP3),
  451. MTK_PIN(64, "WB_SDATA", DRV_GRP3),
  452. MTK_PIN(65, "WB_SEN", DRV_GRP3),
  453. MTK_PIN(66, "WB_CRTL0", DRV_GRP3),
  454. MTK_PIN(67, "WB_CRTL1", DRV_GRP3),
  455. MTK_PIN(68, "WB_CRTL2", DRV_GRP3),
  456. MTK_PIN(69, "WB_CRTL3", DRV_GRP3),
  457. MTK_PIN(70, "WB_CRTL4", DRV_GRP3),
  458. MTK_PIN(71, "WB_CRTL5", DRV_GRP3),
  459. MTK_PIN(72, "I2S0_DATA_IN", DRV_GRP1),
  460. MTK_PIN(73, "I2S0_LRCK", DRV_GRP1),
  461. MTK_PIN(74, "I2S0_BCK", DRV_GRP1),
  462. MTK_PIN(75, "SDA0", DRV_FIXED),
  463. MTK_PIN(76, "SCL0", DRV_FIXED),
  464. MTK_PIN(77, "SDA2", DRV_FIXED),
  465. MTK_PIN(78, "SCL2", DRV_FIXED),
  466. MTK_PIN(79, "URXD0", DRV_FIXED),
  467. MTK_PIN(80, "UTXD0", DRV_FIXED),
  468. MTK_PIN(81, "URXD1", DRV_FIXED),
  469. MTK_PIN(82, "UTXD1", DRV_FIXED),
  470. MTK_PIN(83, "LCM_RST", DRV_FIXED),
  471. MTK_PIN(84, "DSI_TE", DRV_FIXED),
  472. MTK_PIN(85, "MSDC2_CMD", DRV_GRP4),
  473. MTK_PIN(86, "MSDC2_CLK", DRV_GRP4),
  474. MTK_PIN(87, "MSDC2_DAT0", DRV_GRP4),
  475. MTK_PIN(88, "MSDC2_DAT1", DRV_GRP4),
  476. MTK_PIN(89, "MSDC2_DAT2", DRV_GRP4),
  477. MTK_PIN(90, "MSDC2_DAT3", DRV_GRP4),
  478. MTK_PIN(91, "TDN3", DRV_FIXED),
  479. MTK_PIN(92, "TDP3", DRV_FIXED),
  480. MTK_PIN(93, "TDN2", DRV_FIXED),
  481. MTK_PIN(94, "TDP2", DRV_FIXED),
  482. MTK_PIN(95, "TCN", DRV_FIXED),
  483. MTK_PIN(96, "TCP", DRV_FIXED),
  484. MTK_PIN(97, "TDN1", DRV_FIXED),
  485. MTK_PIN(98, "TDP1", DRV_FIXED),
  486. MTK_PIN(99, "TDN0", DRV_FIXED),
  487. MTK_PIN(100, "TDP0", DRV_FIXED),
  488. MTK_PIN(101, "SPI2_CSN", DRV_FIXED),
  489. MTK_PIN(102, "SPI2_MI", DRV_FIXED),
  490. MTK_PIN(103, "SPI2_MO", DRV_FIXED),
  491. MTK_PIN(104, "SPI2_CLK", DRV_FIXED),
  492. MTK_PIN(105, "MSDC1_CMD", DRV_GRP4),
  493. MTK_PIN(106, "MSDC1_CLK", DRV_GRP4),
  494. MTK_PIN(107, "MSDC1_DAT0", DRV_GRP4),
  495. MTK_PIN(108, "MSDC1_DAT1", DRV_GRP4),
  496. MTK_PIN(109, "MSDC1_DAT2", DRV_GRP4),
  497. MTK_PIN(110, "MSDC1_DAT3", DRV_GRP4),
  498. MTK_PIN(111, "MSDC0_DAT7", DRV_GRP4),
  499. MTK_PIN(112, "MSDC0_DAT6", DRV_GRP4),
  500. MTK_PIN(113, "MSDC0_DAT5", DRV_GRP4),
  501. MTK_PIN(114, "MSDC0_DAT4", DRV_GRP4),
  502. MTK_PIN(115, "MSDC0_RSTB", DRV_GRP4),
  503. MTK_PIN(116, "MSDC0_CMD", DRV_GRP4),
  504. MTK_PIN(117, "MSDC0_CLK", DRV_GRP4),
  505. MTK_PIN(118, "MSDC0_DAT3", DRV_GRP4),
  506. MTK_PIN(119, "MSDC0_DAT2", DRV_GRP4),
  507. MTK_PIN(120, "MSDC0_DAT1", DRV_GRP4),
  508. MTK_PIN(121, "MSDC0_DAT0", DRV_GRP4),
  509. MTK_PIN(122, "CEC", DRV_FIXED),
  510. MTK_PIN(123, "HTPLG", DRV_FIXED),
  511. MTK_PIN(124, "HDMISCK", DRV_FIXED),
  512. MTK_PIN(125, "HDMISD", DRV_FIXED),
  513. MTK_PIN(126, "I2S0_MCLK", DRV_GRP1),
  514. MTK_PIN(127, "RAMBUF_IDATA0", DRV_FIXED),
  515. MTK_PIN(128, "RAMBUF_IDATA1", DRV_FIXED),
  516. MTK_PIN(129, "RAMBUF_IDATA2", DRV_FIXED),
  517. MTK_PIN(130, "RAMBUF_IDATA3", DRV_FIXED),
  518. MTK_PIN(131, "RAMBUF_IDATA4", DRV_FIXED),
  519. MTK_PIN(132, "RAMBUF_IDATA5", DRV_FIXED),
  520. MTK_PIN(133, "RAMBUF_IDATA6", DRV_FIXED),
  521. MTK_PIN(134, "RAMBUF_IDATA7", DRV_FIXED),
  522. MTK_PIN(135, "RAMBUF_IDATA8", DRV_FIXED),
  523. MTK_PIN(136, "RAMBUF_IDATA9", DRV_FIXED),
  524. MTK_PIN(137, "RAMBUF_IDATA10", DRV_FIXED),
  525. MTK_PIN(138, "RAMBUF_IDATA11", DRV_FIXED),
  526. MTK_PIN(139, "RAMBUF_IDATA12", DRV_FIXED),
  527. MTK_PIN(140, "RAMBUF_IDATA13", DRV_FIXED),
  528. MTK_PIN(141, "RAMBUF_IDATA14", DRV_FIXED),
  529. MTK_PIN(142, "RAMBUF_IDATA15", DRV_FIXED),
  530. MTK_PIN(143, "RAMBUF_ODATA0", DRV_FIXED),
  531. MTK_PIN(144, "RAMBUF_ODATA1", DRV_FIXED),
  532. MTK_PIN(145, "RAMBUF_ODATA2", DRV_FIXED),
  533. MTK_PIN(146, "RAMBUF_ODATA3", DRV_FIXED),
  534. MTK_PIN(147, "RAMBUF_ODATA4", DRV_FIXED),
  535. MTK_PIN(148, "RAMBUF_ODATA5", DRV_FIXED),
  536. MTK_PIN(149, "RAMBUF_ODATA6", DRV_FIXED),
  537. MTK_PIN(150, "RAMBUF_ODATA7", DRV_FIXED),
  538. MTK_PIN(151, "RAMBUF_ODATA8", DRV_FIXED),
  539. MTK_PIN(152, "RAMBUF_ODATA9", DRV_FIXED),
  540. MTK_PIN(153, "RAMBUF_ODATA10", DRV_FIXED),
  541. MTK_PIN(154, "RAMBUF_ODATA11", DRV_FIXED),
  542. MTK_PIN(155, "RAMBUF_ODATA12", DRV_FIXED),
  543. MTK_PIN(156, "RAMBUF_ODATA13", DRV_FIXED),
  544. MTK_PIN(157, "RAMBUF_ODATA14", DRV_FIXED),
  545. MTK_PIN(158, "RAMBUF_ODATA15", DRV_FIXED),
  546. MTK_PIN(159, "RAMBUF_BE0", DRV_FIXED),
  547. MTK_PIN(160, "RAMBUF_BE1", DRV_FIXED),
  548. MTK_PIN(161, "AP2PT_INT", DRV_FIXED),
  549. MTK_PIN(162, "AP2PT_INT_CLR", DRV_FIXED),
  550. MTK_PIN(163, "PT2AP_INT", DRV_FIXED),
  551. MTK_PIN(164, "PT2AP_INT_CLR", DRV_FIXED),
  552. MTK_PIN(165, "AP2UP_INT", DRV_FIXED),
  553. MTK_PIN(166, "AP2UP_INT_CLR", DRV_FIXED),
  554. MTK_PIN(167, "UP2AP_INT", DRV_FIXED),
  555. MTK_PIN(168, "UP2AP_INT_CLR", DRV_FIXED),
  556. MTK_PIN(169, "RAMBUF_ADDR0", DRV_FIXED),
  557. MTK_PIN(170, "RAMBUF_ADDR1", DRV_FIXED),
  558. MTK_PIN(171, "RAMBUF_ADDR2", DRV_FIXED),
  559. MTK_PIN(172, "RAMBUF_ADDR3", DRV_FIXED),
  560. MTK_PIN(173, "RAMBUF_ADDR4", DRV_FIXED),
  561. MTK_PIN(174, "RAMBUF_ADDR5", DRV_FIXED),
  562. MTK_PIN(175, "RAMBUF_ADDR6", DRV_FIXED),
  563. MTK_PIN(176, "RAMBUF_ADDR7", DRV_FIXED),
  564. MTK_PIN(177, "RAMBUF_ADDR8", DRV_FIXED),
  565. MTK_PIN(178, "RAMBUF_ADDR9", DRV_FIXED),
  566. MTK_PIN(179, "RAMBUF_ADDR10", DRV_FIXED),
  567. MTK_PIN(180, "RAMBUF_RW", DRV_FIXED),
  568. MTK_PIN(181, "RAMBUF_LAST", DRV_FIXED),
  569. MTK_PIN(182, "RAMBUF_HP", DRV_FIXED),
  570. MTK_PIN(183, "RAMBUF_REQ", DRV_FIXED),
  571. MTK_PIN(184, "RAMBUF_ALE", DRV_FIXED),
  572. MTK_PIN(185, "RAMBUF_DLE", DRV_FIXED),
  573. MTK_PIN(186, "RAMBUF_WDLE", DRV_FIXED),
  574. MTK_PIN(187, "RAMBUF_O_CLK", DRV_FIXED),
  575. MTK_PIN(188, "I2S2_MCLK", DRV_GRP1),
  576. MTK_PIN(189, "I2S3_DATA", DRV_GRP1),
  577. MTK_PIN(190, "I2S3_DATA_IN", DRV_GRP1),
  578. MTK_PIN(191, "I2S3_BCK", DRV_GRP1),
  579. MTK_PIN(192, "I2S3_LRCK", DRV_GRP1),
  580. MTK_PIN(193, "I2S3_MCLK", DRV_GRP1),
  581. MTK_PIN(194, "I2S4_DATA", DRV_GRP1),
  582. MTK_PIN(195, "I2S4_DATA_IN", DRV_GRP1),
  583. MTK_PIN(196, "I2S4_BCK", DRV_GRP1),
  584. MTK_PIN(197, "I2S4_LRCK", DRV_GRP1),
  585. MTK_PIN(198, "I2S4_MCLK", DRV_GRP1),
  586. MTK_PIN(199, "SPI1_CLK", DRV_GRP3),
  587. MTK_PIN(200, "SPDIF_OUT", DRV_GRP1),
  588. MTK_PIN(201, "SPDIF_IN0", DRV_GRP1),
  589. MTK_PIN(202, "SPDIF_IN1", DRV_GRP1),
  590. MTK_PIN(203, "PWM0", DRV_GRP1),
  591. MTK_PIN(204, "PWM1", DRV_GRP1),
  592. MTK_PIN(205, "PWM2", DRV_GRP1),
  593. MTK_PIN(206, "PWM3", DRV_GRP1),
  594. MTK_PIN(207, "PWM4", DRV_GRP1),
  595. MTK_PIN(208, "AUD_EXT_CK1", DRV_GRP1),
  596. MTK_PIN(209, "AUD_EXT_CK2", DRV_GRP1),
  597. MTK_PIN(210, "AUD_CLOCK", DRV_GRP3),
  598. MTK_PIN(211, "DVP_RESET", DRV_GRP3),
  599. MTK_PIN(212, "DVP_CLOCK", DRV_GRP3),
  600. MTK_PIN(213, "DVP_CS", DRV_GRP3),
  601. MTK_PIN(214, "DVP_CK", DRV_GRP3),
  602. MTK_PIN(215, "DVP_DI", DRV_GRP3),
  603. MTK_PIN(216, "DVP_DO", DRV_GRP3),
  604. MTK_PIN(217, "AP_CS", DRV_GRP3),
  605. MTK_PIN(218, "AP_CK", DRV_GRP3),
  606. MTK_PIN(219, "AP_DI", DRV_GRP3),
  607. MTK_PIN(220, "AP_DO", DRV_GRP3),
  608. MTK_PIN(221, "DVD_BCLK", DRV_GRP3),
  609. MTK_PIN(222, "T8032_CLK", DRV_GRP3),
  610. MTK_PIN(223, "AP_BCLK", DRV_GRP3),
  611. MTK_PIN(224, "HOST_CS", DRV_GRP3),
  612. MTK_PIN(225, "HOST_CK", DRV_GRP3),
  613. MTK_PIN(226, "HOST_DO0", DRV_GRP3),
  614. MTK_PIN(227, "HOST_DO1", DRV_GRP3),
  615. MTK_PIN(228, "SLV_CS", DRV_GRP3),
  616. MTK_PIN(229, "SLV_CK", DRV_GRP3),
  617. MTK_PIN(230, "SLV_DI0", DRV_GRP3),
  618. MTK_PIN(231, "SLV_DI1", DRV_GRP3),
  619. MTK_PIN(232, "AP2DSP_INT", DRV_GRP3),
  620. MTK_PIN(233, "AP2DSP_INT_CLR", DRV_GRP3),
  621. MTK_PIN(234, "DSP2AP_INT", DRV_GRP3),
  622. MTK_PIN(235, "DSP2AP_INT_CLR", DRV_GRP3),
  623. MTK_PIN(236, "EXT_SDIO3", DRV_GRP1),
  624. MTK_PIN(237, "EXT_SDIO2", DRV_GRP1),
  625. MTK_PIN(238, "EXT_SDIO1", DRV_GRP1),
  626. MTK_PIN(239, "EXT_SDIO0", DRV_GRP1),
  627. MTK_PIN(240, "EXT_XCS", DRV_GRP1),
  628. MTK_PIN(241, "EXT_SCK", DRV_GRP1),
  629. MTK_PIN(242, "URTS2", DRV_GRP1),
  630. MTK_PIN(243, "UCTS2", DRV_GRP1),
  631. MTK_PIN(244, "HDMI_SDA_RX", DRV_FIXED),
  632. MTK_PIN(245, "HDMI_SCL_RX", DRV_FIXED),
  633. MTK_PIN(246, "MHL_SENCE", DRV_FIXED),
  634. MTK_PIN(247, "HDMI_HPD_CBUS_RX", DRV_FIXED),
  635. MTK_PIN(248, "HDMI_TESTOUTP_RX", DRV_GRP1),
  636. MTK_PIN(249, "MSDC0E_RSTB", DRV_GRP4),
  637. MTK_PIN(250, "MSDC0E_DAT7", DRV_GRP4),
  638. MTK_PIN(251, "MSDC0E_DAT6", DRV_GRP4),
  639. MTK_PIN(252, "MSDC0E_DAT5", DRV_GRP4),
  640. MTK_PIN(253, "MSDC0E_DAT4", DRV_GRP4),
  641. MTK_PIN(254, "MSDC0E_DAT3", DRV_GRP4),
  642. MTK_PIN(255, "MSDC0E_DAT2", DRV_GRP4),
  643. MTK_PIN(256, "MSDC0E_DAT1", DRV_GRP4),
  644. MTK_PIN(257, "MSDC0E_DAT0", DRV_GRP4),
  645. MTK_PIN(258, "MSDC0E_CMD", DRV_GRP4),
  646. MTK_PIN(259, "MSDC0E_CLK", DRV_GRP4),
  647. MTK_PIN(260, "MSDC0E_DSL", DRV_GRP4),
  648. MTK_PIN(261, "MSDC1_INS", DRV_GRP4),
  649. MTK_PIN(262, "G2_TXEN", DRV_GRP1),
  650. MTK_PIN(263, "G2_TXD3", DRV_GRP1),
  651. MTK_PIN(264, "G2_TXD2", DRV_GRP1),
  652. MTK_PIN(265, "G2_TXD1", DRV_GRP1),
  653. MTK_PIN(266, "G2_TXD0", DRV_GRP1),
  654. MTK_PIN(267, "G2_TXC", DRV_GRP1),
  655. MTK_PIN(268, "G2_RXC", DRV_GRP1),
  656. MTK_PIN(269, "G2_RXD0", DRV_GRP1),
  657. MTK_PIN(270, "G2_RXD1", DRV_GRP1),
  658. MTK_PIN(271, "G2_RXD2", DRV_GRP1),
  659. MTK_PIN(272, "G2_RXD3", DRV_GRP1),
  660. MTK_PIN(273, "ESW_INT", DRV_GRP1),
  661. MTK_PIN(274, "G2_RXDV", DRV_GRP1),
  662. MTK_PIN(275, "MDC", DRV_GRP1),
  663. MTK_PIN(276, "MDIO", DRV_GRP1),
  664. MTK_PIN(277, "ESW_RST", DRV_GRP1),
  665. MTK_PIN(278, "JTAG_RESET", DRV_GRP3),
  666. MTK_PIN(279, "USB3_RES_BOND", DRV_GRP1),
  667. };
  668. /* List all groups consisting of these pins dedicated to the enablement of
  669. * certain hardware block and the corresponding mode for all of the pins.
  670. * The hardware probably has multiple combinations of these pinouts.
  671. */
  672. /* AUDIO EXT CLK */
  673. static int mt7623_aud_ext_clk0_pins[] = { 208, };
  674. static int mt7623_aud_ext_clk0_funcs[] = { 1, };
  675. static int mt7623_aud_ext_clk1_pins[] = { 209, };
  676. static int mt7623_aud_ext_clk1_funcs[] = { 1, };
  677. /* DISP PWM */
  678. static int mt7623_disp_pwm_0_pins[] = { 72, };
  679. static int mt7623_disp_pwm_0_funcs[] = { 5, };
  680. static int mt7623_disp_pwm_1_pins[] = { 203, };
  681. static int mt7623_disp_pwm_1_funcs[] = { 2, };
  682. static int mt7623_disp_pwm_2_pins[] = { 208, };
  683. static int mt7623_disp_pwm_2_funcs[] = { 5, };
  684. /* ESW */
  685. static int mt7623_esw_int_pins[] = { 273, };
  686. static int mt7623_esw_int_funcs[] = { 1, };
  687. static int mt7623_esw_rst_pins[] = { 277, };
  688. static int mt7623_esw_rst_funcs[] = { 1, };
  689. /* EPHY */
  690. static int mt7623_ephy_pins[] = { 262, 263, 264, 265, 266, 267, 268,
  691. 269, 270, 271, 272, 274, };
  692. static int mt7623_ephy_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
  693. /* EXT_SDIO */
  694. static int mt7623_ext_sdio_pins[] = { 236, 237, 238, 239, 240, 241, };
  695. static int mt7623_ext_sdio_funcs[] = { 1, 1, 1, 1, 1, 1, };
  696. /* HDMI RX */
  697. static int mt7623_hdmi_rx_pins[] = { 247, 248, };
  698. static int mt7623_hdmi_rx_funcs[] = { 1, 1 };
  699. static int mt7623_hdmi_rx_i2c_pins[] = { 244, 245, };
  700. static int mt7623_hdmi_rx_i2c_funcs[] = { 1, 1 };
  701. /* HDMI TX */
  702. static int mt7623_hdmi_cec_pins[] = { 122, };
  703. static int mt7623_hdmi_cec_funcs[] = { 1, };
  704. static int mt7623_hdmi_htplg_pins[] = { 123, };
  705. static int mt7623_hdmi_htplg_funcs[] = { 1, };
  706. static int mt7623_hdmi_i2c_pins[] = { 124, 125, };
  707. static int mt7623_hdmi_i2c_funcs[] = { 1, 1 };
  708. /* I2C */
  709. static int mt7623_i2c0_pins[] = { 75, 76, };
  710. static int mt7623_i2c0_funcs[] = { 1, 1, };
  711. static int mt7623_i2c1_0_pins[] = { 57, 58, };
  712. static int mt7623_i2c1_0_funcs[] = { 1, 1, };
  713. static int mt7623_i2c1_1_pins[] = { 242, 243, };
  714. static int mt7623_i2c1_1_funcs[] = { 4, 4, };
  715. static int mt7623_i2c1_2_pins[] = { 85, 86, };
  716. static int mt7623_i2c1_2_funcs[] = { 3, 3, };
  717. static int mt7623_i2c1_3_pins[] = { 105, 106, };
  718. static int mt7623_i2c1_3_funcs[] = { 3, 3, };
  719. static int mt7623_i2c1_4_pins[] = { 124, 125, };
  720. static int mt7623_i2c1_4_funcs[] = { 4, 4, };
  721. static int mt7623_i2c2_0_pins[] = { 77, 78, };
  722. static int mt7623_i2c2_0_funcs[] = { 1, 1, };
  723. static int mt7623_i2c2_1_pins[] = { 89, 90, };
  724. static int mt7623_i2c2_1_funcs[] = { 3, 3, };
  725. static int mt7623_i2c2_2_pins[] = { 109, 110, };
  726. static int mt7623_i2c2_2_funcs[] = { 3, 3, };
  727. static int mt7623_i2c2_3_pins[] = { 122, 123, };
  728. static int mt7623_i2c2_3_funcs[] = { 4, 4, };
  729. /* I2S */
  730. static int mt7623_i2s0_pins[] = { 49, 72, 73, 74, 126, };
  731. static int mt7623_i2s0_funcs[] = { 1, 1, 1, 1, 1, };
  732. static int mt7623_i2s1_pins[] = { 33, 34, 35, 36, 37, };
  733. static int mt7623_i2s1_funcs[] = { 1, 1, 1, 1, 1, };
  734. static int mt7623_i2s2_bclk_lrclk_mclk_pins[] = { 50, 52, 188, };
  735. static int mt7623_i2s2_bclk_lrclk_mclk_funcs[] = { 1, 1, 1, };
  736. static int mt7623_i2s2_data_in_pins[] = { 51, };
  737. static int mt7623_i2s2_data_in_funcs[] = { 1, };
  738. static int mt7623_i2s2_data_0_pins[] = { 203, };
  739. static int mt7623_i2s2_data_0_funcs[] = { 9, };
  740. static int mt7623_i2s2_data_1_pins[] = { 38, };
  741. static int mt7623_i2s2_data_1_funcs[] = { 4, };
  742. static int mt7623_i2s3_bclk_lrclk_mclk_pins[] = { 191, 192, 193, };
  743. static int mt7623_i2s3_bclk_lrclk_mclk_funcs[] = { 1, 1, 1, };
  744. static int mt7623_i2s3_data_in_pins[] = { 190, };
  745. static int mt7623_i2s3_data_in_funcs[] = { 1, };
  746. static int mt7623_i2s3_data_0_pins[] = { 204, };
  747. static int mt7623_i2s3_data_0_funcs[] = { 9, };
  748. static int mt7623_i2s3_data_1_pins[] = { 2, };
  749. static int mt7623_i2s3_data_1_funcs[] = { 0, };
  750. static int mt7623_i2s4_pins[] = { 194, 195, 196, 197, 198, };
  751. static int mt7623_i2s4_funcs[] = { 1, 1, 1, 1, 1, };
  752. static int mt7623_i2s5_pins[] = { 16, 17, 30, 31, 32, };
  753. static int mt7623_i2s5_funcs[] = { 1, 1, 1, 1, 1, };
  754. /* IR */
  755. static int mt7623_ir_pins[] = { 46, };
  756. static int mt7623_ir_funcs[] = { 1, };
  757. /* LCD */
  758. static int mt7623_mipi_tx_pins[] = { 91, 92, 93, 94, 95, 96, 97, 98,
  759. 99, 100, };
  760. static int mt7623_mipi_tx_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
  761. static int mt7623_dsi_te_pins[] = { 84, };
  762. static int mt7623_dsi_te_funcs[] = { 1, };
  763. static int mt7623_lcm_rst_pins[] = { 83, };
  764. static int mt7623_lcm_rst_funcs[] = { 1, };
  765. /* MDC/MDIO */
  766. static int mt7623_mdc_mdio_pins[] = { 275, 276, };
  767. static int mt7623_mdc_mdio_funcs[] = { 1, 1, };
  768. /* MSDC */
  769. static int mt7623_msdc0_pins[] = { 111, 112, 113, 114, 115, 116, 117, 118,
  770. 119, 120, 121, };
  771. static int mt7623_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
  772. static int mt7623_msdc1_pins[] = { 105, 106, 107, 108, 109, 110, };
  773. static int mt7623_msdc1_funcs[] = { 1, 1, 1, 1, 1, 1, };
  774. static int mt7623_msdc1_ins_pins[] = { 261, };
  775. static int mt7623_msdc1_ins_funcs[] = { 1, };
  776. static int mt7623_msdc1_wp_0_pins[] = { 29, };
  777. static int mt7623_msdc1_wp_0_funcs[] = { 1, };
  778. static int mt7623_msdc1_wp_1_pins[] = { 55, };
  779. static int mt7623_msdc1_wp_1_funcs[] = { 3, };
  780. static int mt7623_msdc1_wp_2_pins[] = { 209, };
  781. static int mt7623_msdc1_wp_2_funcs[] = { 2, };
  782. static int mt7623_msdc2_pins[] = { 85, 86, 87, 88, 89, 90, };
  783. static int mt7623_msdc2_funcs[] = { 1, 1, 1, 1, 1, 1, };
  784. static int mt7623_msdc3_pins[] = { 249, 250, 251, 252, 253, 254, 255, 256,
  785. 257, 258, 259, 260, };
  786. static int mt7623_msdc3_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
  787. /* NAND */
  788. static int mt7623_nandc_pins[] = { 43, 47, 48, 111, 112, 113, 114, 115,
  789. 116, 117, 118, 119, 120, 121, };
  790. static int mt7623_nandc_funcs[] = { 1, 1, 1, 4, 4, 4, 4, 4, 4, 4, 4, 4,
  791. 4, 4, };
  792. static int mt7623_nandc_ceb0_pins[] = { 45, };
  793. static int mt7623_nandc_ceb0_funcs[] = { 1, };
  794. static int mt7623_nandc_ceb1_pins[] = { 44, };
  795. static int mt7623_nandc_ceb1_funcs[] = { 1, };
  796. /* RTC */
  797. static int mt7623_rtc_pins[] = { 10, };
  798. static int mt7623_rtc_funcs[] = { 1, };
  799. /* OTG */
  800. static int mt7623_otg_iddig0_0_pins[] = { 29, };
  801. static int mt7623_otg_iddig0_0_funcs[] = { 1, };
  802. static int mt7623_otg_iddig0_1_pins[] = { 44, };
  803. static int mt7623_otg_iddig0_1_funcs[] = { 2, };
  804. static int mt7623_otg_iddig0_2_pins[] = { 236, };
  805. static int mt7623_otg_iddig0_2_funcs[] = { 2, };
  806. static int mt7623_otg_iddig1_0_pins[] = { 27, };
  807. static int mt7623_otg_iddig1_0_funcs[] = { 2, };
  808. static int mt7623_otg_iddig1_1_pins[] = { 47, };
  809. static int mt7623_otg_iddig1_1_funcs[] = { 2, };
  810. static int mt7623_otg_iddig1_2_pins[] = { 238, };
  811. static int mt7623_otg_iddig1_2_funcs[] = { 2, };
  812. static int mt7623_otg_drv_vbus0_0_pins[] = { 28, };
  813. static int mt7623_otg_drv_vbus0_0_funcs[] = { 1, };
  814. static int mt7623_otg_drv_vbus0_1_pins[] = { 45, };
  815. static int mt7623_otg_drv_vbus0_1_funcs[] = { 2, };
  816. static int mt7623_otg_drv_vbus0_2_pins[] = { 237, };
  817. static int mt7623_otg_drv_vbus0_2_funcs[] = { 2, };
  818. static int mt7623_otg_drv_vbus1_0_pins[] = { 26, };
  819. static int mt7623_otg_drv_vbus1_0_funcs[] = { 2, };
  820. static int mt7623_otg_drv_vbus1_1_pins[] = { 48, };
  821. static int mt7623_otg_drv_vbus1_1_funcs[] = { 2, };
  822. static int mt7623_otg_drv_vbus1_2_pins[] = { 239, };
  823. static int mt7623_otg_drv_vbus1_2_funcs[] = { 2, };
  824. /* PCIE */
  825. static int mt7623_pcie0_0_perst_pins[] = { 208, };
  826. static int mt7623_pcie0_0_perst_funcs[] = { 3, };
  827. static int mt7623_pcie0_1_perst_pins[] = { 22, };
  828. static int mt7623_pcie0_1_perst_funcs[] = { 2, };
  829. static int mt7623_pcie1_0_perst_pins[] = { 209, };
  830. static int mt7623_pcie1_0_perst_funcs[] = { 3, };
  831. static int mt7623_pcie1_1_perst_pins[] = { 23, };
  832. static int mt7623_pcie1_1_perst_funcs[] = { 2, };
  833. static int mt7623_pcie2_0_perst_pins[] = { 24, };
  834. static int mt7623_pcie2_0_perst_funcs[] = { 2, };
  835. static int mt7623_pcie2_1_perst_pins[] = { 29, };
  836. static int mt7623_pcie2_1_perst_funcs[] = { 6, };
  837. static int mt7623_pcie0_0_wake_pins[] = { 28, };
  838. static int mt7623_pcie0_0_wake_funcs[] = { 6, };
  839. static int mt7623_pcie0_1_wake_pins[] = { 251, };
  840. static int mt7623_pcie0_1_wake_funcs[] = { 6, };
  841. static int mt7623_pcie1_0_wake_pins[] = { 27, };
  842. static int mt7623_pcie1_0_wake_funcs[] = { 6, };
  843. static int mt7623_pcie1_1_wake_pins[] = { 253, };
  844. static int mt7623_pcie1_1_wake_funcs[] = { 6, };
  845. static int mt7623_pcie2_0_wake_pins[] = { 26, };
  846. static int mt7623_pcie2_0_wake_funcs[] = { 6, };
  847. static int mt7623_pcie2_1_wake_pins[] = { 255, };
  848. static int mt7623_pcie2_1_wake_funcs[] = { 6, };
  849. static int mt7623_pcie0_clkreq_pins[] = { 250, };
  850. static int mt7623_pcie0_clkreq_funcs[] = { 6, };
  851. static int mt7623_pcie1_clkreq_pins[] = { 252, };
  852. static int mt7623_pcie1_clkreq_funcs[] = { 6, };
  853. static int mt7623_pcie2_clkreq_pins[] = { 254, };
  854. static int mt7623_pcie2_clkreq_funcs[] = { 6, };
  855. /* the pcie_*_rev are only used for MT7623 */
  856. static int mt7623_pcie0_0_rev_perst_pins[] = { 208, };
  857. static int mt7623_pcie0_0_rev_perst_funcs[] = { 11, };
  858. static int mt7623_pcie0_1_rev_perst_pins[] = { 22, };
  859. static int mt7623_pcie0_1_rev_perst_funcs[] = { 10, };
  860. static int mt7623_pcie1_0_rev_perst_pins[] = { 209, };
  861. static int mt7623_pcie1_0_rev_perst_funcs[] = { 11, };
  862. static int mt7623_pcie1_1_rev_perst_pins[] = { 23, };
  863. static int mt7623_pcie1_1_rev_perst_funcs[] = { 10, };
  864. static int mt7623_pcie2_0_rev_perst_pins[] = { 24, };
  865. static int mt7623_pcie2_0_rev_perst_funcs[] = { 11, };
  866. static int mt7623_pcie2_1_rev_perst_pins[] = { 29, };
  867. static int mt7623_pcie2_1_rev_perst_funcs[] = { 14, };
  868. /* PCM */
  869. static int mt7623_pcm_clk_0_pins[] = { 18, };
  870. static int mt7623_pcm_clk_0_funcs[] = { 1, };
  871. static int mt7623_pcm_clk_1_pins[] = { 17, };
  872. static int mt7623_pcm_clk_1_funcs[] = { 3, };
  873. static int mt7623_pcm_clk_2_pins[] = { 35, };
  874. static int mt7623_pcm_clk_2_funcs[] = { 3, };
  875. static int mt7623_pcm_clk_3_pins[] = { 50, };
  876. static int mt7623_pcm_clk_3_funcs[] = { 3, };
  877. static int mt7623_pcm_clk_4_pins[] = { 74, };
  878. static int mt7623_pcm_clk_4_funcs[] = { 3, };
  879. static int mt7623_pcm_clk_5_pins[] = { 191, };
  880. static int mt7623_pcm_clk_5_funcs[] = { 3, };
  881. static int mt7623_pcm_clk_6_pins[] = { 196, };
  882. static int mt7623_pcm_clk_6_funcs[] = { 3, };
  883. static int mt7623_pcm_sync_0_pins[] = { 19, };
  884. static int mt7623_pcm_sync_0_funcs[] = { 1, };
  885. static int mt7623_pcm_sync_1_pins[] = { 30, };
  886. static int mt7623_pcm_sync_1_funcs[] = { 3, };
  887. static int mt7623_pcm_sync_2_pins[] = { 36, };
  888. static int mt7623_pcm_sync_2_funcs[] = { 3, };
  889. static int mt7623_pcm_sync_3_pins[] = { 52, };
  890. static int mt7623_pcm_sync_3_funcs[] = { 31, };
  891. static int mt7623_pcm_sync_4_pins[] = { 73, };
  892. static int mt7623_pcm_sync_4_funcs[] = { 3, };
  893. static int mt7623_pcm_sync_5_pins[] = { 192, };
  894. static int mt7623_pcm_sync_5_funcs[] = { 3, };
  895. static int mt7623_pcm_sync_6_pins[] = { 197, };
  896. static int mt7623_pcm_sync_6_funcs[] = { 3, };
  897. static int mt7623_pcm_rx_0_pins[] = { 20, };
  898. static int mt7623_pcm_rx_0_funcs[] = { 1, };
  899. static int mt7623_pcm_rx_1_pins[] = { 16, };
  900. static int mt7623_pcm_rx_1_funcs[] = { 3, };
  901. static int mt7623_pcm_rx_2_pins[] = { 34, };
  902. static int mt7623_pcm_rx_2_funcs[] = { 3, };
  903. static int mt7623_pcm_rx_3_pins[] = { 51, };
  904. static int mt7623_pcm_rx_3_funcs[] = { 3, };
  905. static int mt7623_pcm_rx_4_pins[] = { 72, };
  906. static int mt7623_pcm_rx_4_funcs[] = { 3, };
  907. static int mt7623_pcm_rx_5_pins[] = { 190, };
  908. static int mt7623_pcm_rx_5_funcs[] = { 3, };
  909. static int mt7623_pcm_rx_6_pins[] = { 195, };
  910. static int mt7623_pcm_rx_6_funcs[] = { 3, };
  911. static int mt7623_pcm_tx_0_pins[] = { 21, };
  912. static int mt7623_pcm_tx_0_funcs[] = { 1, };
  913. static int mt7623_pcm_tx_1_pins[] = { 32, };
  914. static int mt7623_pcm_tx_1_funcs[] = { 3, };
  915. static int mt7623_pcm_tx_2_pins[] = { 33, };
  916. static int mt7623_pcm_tx_2_funcs[] = { 3, };
  917. static int mt7623_pcm_tx_3_pins[] = { 38, };
  918. static int mt7623_pcm_tx_3_funcs[] = { 3, };
  919. static int mt7623_pcm_tx_4_pins[] = { 49, };
  920. static int mt7623_pcm_tx_4_funcs[] = { 3, };
  921. static int mt7623_pcm_tx_5_pins[] = { 189, };
  922. static int mt7623_pcm_tx_5_funcs[] = { 3, };
  923. static int mt7623_pcm_tx_6_pins[] = { 194, };
  924. static int mt7623_pcm_tx_6_funcs[] = { 3, };
  925. /* PWM */
  926. static int mt7623_pwm_ch1_0_pins[] = { 203, };
  927. static int mt7623_pwm_ch1_0_funcs[] = { 1, };
  928. static int mt7623_pwm_ch1_1_pins[] = { 208, };
  929. static int mt7623_pwm_ch1_1_funcs[] = { 2, };
  930. static int mt7623_pwm_ch1_2_pins[] = { 72, };
  931. static int mt7623_pwm_ch1_2_funcs[] = { 4, };
  932. static int mt7623_pwm_ch1_3_pins[] = { 88, };
  933. static int mt7623_pwm_ch1_3_funcs[] = { 3, };
  934. static int mt7623_pwm_ch1_4_pins[] = { 108, };
  935. static int mt7623_pwm_ch1_4_funcs[] = { 3, };
  936. static int mt7623_pwm_ch2_0_pins[] = { 204, };
  937. static int mt7623_pwm_ch2_0_funcs[] = { 1, };
  938. static int mt7623_pwm_ch2_1_pins[] = { 53, };
  939. static int mt7623_pwm_ch2_1_funcs[] = { 5, };
  940. static int mt7623_pwm_ch2_2_pins[] = { 88, };
  941. static int mt7623_pwm_ch2_2_funcs[] = { 6, };
  942. static int mt7623_pwm_ch2_3_pins[] = { 108, };
  943. static int mt7623_pwm_ch2_3_funcs[] = { 6, };
  944. static int mt7623_pwm_ch2_4_pins[] = { 209, };
  945. static int mt7623_pwm_ch2_4_funcs[] = { 5, };
  946. static int mt7623_pwm_ch3_0_pins[] = { 205, };
  947. static int mt7623_pwm_ch3_0_funcs[] = { 1, };
  948. static int mt7623_pwm_ch3_1_pins[] = { 55, };
  949. static int mt7623_pwm_ch3_1_funcs[] = { 5, };
  950. static int mt7623_pwm_ch3_2_pins[] = { 89, };
  951. static int mt7623_pwm_ch3_2_funcs[] = { 6, };
  952. static int mt7623_pwm_ch3_3_pins[] = { 109, };
  953. static int mt7623_pwm_ch3_3_funcs[] = { 6, };
  954. static int mt7623_pwm_ch4_0_pins[] = { 206, };
  955. static int mt7623_pwm_ch4_0_funcs[] = { 1, };
  956. static int mt7623_pwm_ch4_1_pins[] = { 90, };
  957. static int mt7623_pwm_ch4_1_funcs[] = { 6, };
  958. static int mt7623_pwm_ch4_2_pins[] = { 110, };
  959. static int mt7623_pwm_ch4_2_funcs[] = { 6, };
  960. static int mt7623_pwm_ch4_3_pins[] = { 124, };
  961. static int mt7623_pwm_ch4_3_funcs[] = { 5, };
  962. static int mt7623_pwm_ch5_0_pins[] = { 207, };
  963. static int mt7623_pwm_ch5_0_funcs[] = { 1, };
  964. static int mt7623_pwm_ch5_1_pins[] = { 125, };
  965. static int mt7623_pwm_ch5_1_funcs[] = { 5, };
  966. /* PWRAP */
  967. static int mt7623_pwrap_pins[] = { 0, 1, 2, 3, 4, 5, 6, };
  968. static int mt7623_pwrap_funcs[] = { 1, 1, 1, 1, 1, 1, 1, };
  969. /* SPDIF */
  970. static int mt7623_spdif_in0_0_pins[] = { 56, };
  971. static int mt7623_spdif_in0_0_funcs[] = { 3, };
  972. static int mt7623_spdif_in0_1_pins[] = { 201, };
  973. static int mt7623_spdif_in0_1_funcs[] = { 1, };
  974. static int mt7623_spdif_in1_0_pins[] = { 54, };
  975. static int mt7623_spdif_in1_0_funcs[] = { 3, };
  976. static int mt7623_spdif_in1_1_pins[] = { 202, };
  977. static int mt7623_spdif_in1_1_funcs[] = { 1, };
  978. static int mt7623_spdif_out_pins[] = { 202, };
  979. static int mt7623_spdif_out_funcs[] = { 1, };
  980. /* SPI */
  981. static int mt7623_spi0_pins[] = { 53, 54, 55, 56, };
  982. static int mt7623_spi0_funcs[] = { 1, 1, 1, 1, };
  983. static int mt7623_spi1_pins[] = { 7, 199, 8, 9, };
  984. static int mt7623_spi1_funcs[] = { 1, 1, 1, 1, };
  985. static int mt7623_spi2_pins[] = { 101, 104, 102, 103, };
  986. static int mt7623_spi2_funcs[] = { 1, 1, 1, 1, };
  987. /* UART */
  988. static int mt7623_uart0_0_txd_rxd_pins[] = { 79, 80, };
  989. static int mt7623_uart0_0_txd_rxd_funcs[] = { 1, 1, };
  990. static int mt7623_uart0_1_txd_rxd_pins[] = { 87, 88, };
  991. static int mt7623_uart0_1_txd_rxd_funcs[] = { 5, 5, };
  992. static int mt7623_uart0_2_txd_rxd_pins[] = { 107, 108, };
  993. static int mt7623_uart0_2_txd_rxd_funcs[] = { 5, 5, };
  994. static int mt7623_uart0_3_txd_rxd_pins[] = { 123, 122, };
  995. static int mt7623_uart0_3_txd_rxd_funcs[] = { 5, 5, };
  996. static int mt7623_uart0_rts_cts_pins[] = { 22, 23, };
  997. static int mt7623_uart0_rts_cts_funcs[] = { 1, 1, };
  998. static int mt7623_uart1_0_txd_rxd_pins[] = { 81, 82, };
  999. static int mt7623_uart1_0_txd_rxd_funcs[] = { 1, 1, };
  1000. static int mt7623_uart1_1_txd_rxd_pins[] = { 89, 90, };
  1001. static int mt7623_uart1_1_txd_rxd_funcs[] = { 5, 5, };
  1002. static int mt7623_uart1_2_txd_rxd_pins[] = { 109, 110, };
  1003. static int mt7623_uart1_2_txd_rxd_funcs[] = { 5, 5, };
  1004. static int mt7623_uart1_rts_cts_pins[] = { 24, 25, };
  1005. static int mt7623_uart1_rts_cts_funcs[] = { 1, 1, };
  1006. static int mt7623_uart2_0_txd_rxd_pins[] = { 14, 15, };
  1007. static int mt7623_uart2_0_txd_rxd_funcs[] = { 1, 1, };
  1008. static int mt7623_uart2_1_txd_rxd_pins[] = { 200, 201, };
  1009. static int mt7623_uart2_1_txd_rxd_funcs[] = { 6, 6, };
  1010. static int mt7623_uart2_rts_cts_pins[] = { 242, 243, };
  1011. static int mt7623_uart2_rts_cts_funcs[] = { 1, 1, };
  1012. static int mt7623_uart3_txd_rxd_pins[] = { 242, 243, };
  1013. static int mt7623_uart3_txd_rxd_funcs[] = { 2, 2, };
  1014. static int mt7623_uart3_rts_cts_pins[] = { 26, 27, };
  1015. static int mt7623_uart3_rts_cts_funcs[] = { 1, 1, };
  1016. /* Watchdog */
  1017. static int mt7623_watchdog_0_pins[] = { 11, };
  1018. static int mt7623_watchdog_0_funcs[] = { 1, };
  1019. static int mt7623_watchdog_1_pins[] = { 121, };
  1020. static int mt7623_watchdog_1_funcs[] = { 5, };
  1021. static const struct mtk_group_desc mt7623_groups[] = {
  1022. PINCTRL_PIN_GROUP("aud_ext_clk0", mt7623_aud_ext_clk0),
  1023. PINCTRL_PIN_GROUP("aud_ext_clk1", mt7623_aud_ext_clk1),
  1024. PINCTRL_PIN_GROUP("dsi_te", mt7623_dsi_te),
  1025. PINCTRL_PIN_GROUP("disp_pwm_0", mt7623_disp_pwm_0),
  1026. PINCTRL_PIN_GROUP("disp_pwm_1", mt7623_disp_pwm_1),
  1027. PINCTRL_PIN_GROUP("disp_pwm_2", mt7623_disp_pwm_2),
  1028. PINCTRL_PIN_GROUP("ephy", mt7623_ephy),
  1029. PINCTRL_PIN_GROUP("esw_int", mt7623_esw_int),
  1030. PINCTRL_PIN_GROUP("esw_rst", mt7623_esw_rst),
  1031. PINCTRL_PIN_GROUP("ext_sdio", mt7623_ext_sdio),
  1032. PINCTRL_PIN_GROUP("hdmi_cec", mt7623_hdmi_cec),
  1033. PINCTRL_PIN_GROUP("hdmi_htplg", mt7623_hdmi_htplg),
  1034. PINCTRL_PIN_GROUP("hdmi_i2c", mt7623_hdmi_i2c),
  1035. PINCTRL_PIN_GROUP("hdmi_rx", mt7623_hdmi_rx),
  1036. PINCTRL_PIN_GROUP("hdmi_rx_i2c", mt7623_hdmi_rx_i2c),
  1037. PINCTRL_PIN_GROUP("i2c0", mt7623_i2c0),
  1038. PINCTRL_PIN_GROUP("i2c1_0", mt7623_i2c1_0),
  1039. PINCTRL_PIN_GROUP("i2c1_1", mt7623_i2c1_1),
  1040. PINCTRL_PIN_GROUP("i2c1_2", mt7623_i2c1_2),
  1041. PINCTRL_PIN_GROUP("i2c1_3", mt7623_i2c1_3),
  1042. PINCTRL_PIN_GROUP("i2c1_4", mt7623_i2c1_4),
  1043. PINCTRL_PIN_GROUP("i2c2_0", mt7623_i2c2_0),
  1044. PINCTRL_PIN_GROUP("i2c2_1", mt7623_i2c2_1),
  1045. PINCTRL_PIN_GROUP("i2c2_2", mt7623_i2c2_2),
  1046. PINCTRL_PIN_GROUP("i2c2_3", mt7623_i2c2_3),
  1047. PINCTRL_PIN_GROUP("i2s0", mt7623_i2s0),
  1048. PINCTRL_PIN_GROUP("i2s1", mt7623_i2s1),
  1049. PINCTRL_PIN_GROUP("i2s4", mt7623_i2s4),
  1050. PINCTRL_PIN_GROUP("i2s5", mt7623_i2s5),
  1051. PINCTRL_PIN_GROUP("i2s2_bclk_lrclk_mclk", mt7623_i2s2_bclk_lrclk_mclk),
  1052. PINCTRL_PIN_GROUP("i2s3_bclk_lrclk_mclk", mt7623_i2s3_bclk_lrclk_mclk),
  1053. PINCTRL_PIN_GROUP("i2s2_data_in", mt7623_i2s2_data_in),
  1054. PINCTRL_PIN_GROUP("i2s3_data_in", mt7623_i2s3_data_in),
  1055. PINCTRL_PIN_GROUP("i2s2_data_0", mt7623_i2s2_data_0),
  1056. PINCTRL_PIN_GROUP("i2s2_data_1", mt7623_i2s2_data_1),
  1057. PINCTRL_PIN_GROUP("i2s3_data_0", mt7623_i2s3_data_0),
  1058. PINCTRL_PIN_GROUP("i2s3_data_1", mt7623_i2s3_data_1),
  1059. PINCTRL_PIN_GROUP("ir", mt7623_ir),
  1060. PINCTRL_PIN_GROUP("lcm_rst", mt7623_lcm_rst),
  1061. PINCTRL_PIN_GROUP("mdc_mdio", mt7623_mdc_mdio),
  1062. PINCTRL_PIN_GROUP("mipi_tx", mt7623_mipi_tx),
  1063. PINCTRL_PIN_GROUP("msdc0", mt7623_msdc0),
  1064. PINCTRL_PIN_GROUP("msdc1", mt7623_msdc1),
  1065. PINCTRL_PIN_GROUP("msdc1_ins", mt7623_msdc1_ins),
  1066. PINCTRL_PIN_GROUP("msdc1_wp_0", mt7623_msdc1_wp_0),
  1067. PINCTRL_PIN_GROUP("msdc1_wp_1", mt7623_msdc1_wp_1),
  1068. PINCTRL_PIN_GROUP("msdc1_wp_2", mt7623_msdc1_wp_2),
  1069. PINCTRL_PIN_GROUP("msdc2", mt7623_msdc2),
  1070. PINCTRL_PIN_GROUP("msdc3", mt7623_msdc3),
  1071. PINCTRL_PIN_GROUP("nandc", mt7623_nandc),
  1072. PINCTRL_PIN_GROUP("nandc_ceb0", mt7623_nandc_ceb0),
  1073. PINCTRL_PIN_GROUP("nandc_ceb1", mt7623_nandc_ceb1),
  1074. PINCTRL_PIN_GROUP("otg_iddig0_0", mt7623_otg_iddig0_0),
  1075. PINCTRL_PIN_GROUP("otg_iddig0_1", mt7623_otg_iddig0_1),
  1076. PINCTRL_PIN_GROUP("otg_iddig0_2", mt7623_otg_iddig0_2),
  1077. PINCTRL_PIN_GROUP("otg_iddig1_0", mt7623_otg_iddig1_0),
  1078. PINCTRL_PIN_GROUP("otg_iddig1_1", mt7623_otg_iddig1_1),
  1079. PINCTRL_PIN_GROUP("otg_iddig1_2", mt7623_otg_iddig1_2),
  1080. PINCTRL_PIN_GROUP("otg_drv_vbus0_0", mt7623_otg_drv_vbus0_0),
  1081. PINCTRL_PIN_GROUP("otg_drv_vbus0_1", mt7623_otg_drv_vbus0_1),
  1082. PINCTRL_PIN_GROUP("otg_drv_vbus0_2", mt7623_otg_drv_vbus0_2),
  1083. PINCTRL_PIN_GROUP("otg_drv_vbus1_0", mt7623_otg_drv_vbus1_0),
  1084. PINCTRL_PIN_GROUP("otg_drv_vbus1_1", mt7623_otg_drv_vbus1_1),
  1085. PINCTRL_PIN_GROUP("otg_drv_vbus1_2", mt7623_otg_drv_vbus1_2),
  1086. PINCTRL_PIN_GROUP("pcie0_0_perst", mt7623_pcie0_0_perst),
  1087. PINCTRL_PIN_GROUP("pcie0_1_perst", mt7623_pcie0_1_perst),
  1088. PINCTRL_PIN_GROUP("pcie1_0_perst", mt7623_pcie1_0_perst),
  1089. PINCTRL_PIN_GROUP("pcie1_1_perst", mt7623_pcie1_1_perst),
  1090. PINCTRL_PIN_GROUP("pcie1_1_perst", mt7623_pcie1_1_perst),
  1091. PINCTRL_PIN_GROUP("pcie0_0_rev_perst", mt7623_pcie0_0_rev_perst),
  1092. PINCTRL_PIN_GROUP("pcie0_1_rev_perst", mt7623_pcie0_1_rev_perst),
  1093. PINCTRL_PIN_GROUP("pcie1_0_rev_perst", mt7623_pcie1_0_rev_perst),
  1094. PINCTRL_PIN_GROUP("pcie1_1_rev_perst", mt7623_pcie1_1_rev_perst),
  1095. PINCTRL_PIN_GROUP("pcie2_0_rev_perst", mt7623_pcie2_0_rev_perst),
  1096. PINCTRL_PIN_GROUP("pcie2_1_rev_perst", mt7623_pcie2_1_rev_perst),
  1097. PINCTRL_PIN_GROUP("pcie2_0_perst", mt7623_pcie2_0_perst),
  1098. PINCTRL_PIN_GROUP("pcie2_1_perst", mt7623_pcie2_1_perst),
  1099. PINCTRL_PIN_GROUP("pcie0_0_wake", mt7623_pcie0_0_wake),
  1100. PINCTRL_PIN_GROUP("pcie0_1_wake", mt7623_pcie0_1_wake),
  1101. PINCTRL_PIN_GROUP("pcie1_0_wake", mt7623_pcie1_0_wake),
  1102. PINCTRL_PIN_GROUP("pcie1_1_wake", mt7623_pcie1_1_wake),
  1103. PINCTRL_PIN_GROUP("pcie2_0_wake", mt7623_pcie2_0_wake),
  1104. PINCTRL_PIN_GROUP("pcie2_1_wake", mt7623_pcie2_1_wake),
  1105. PINCTRL_PIN_GROUP("pcie0_clkreq", mt7623_pcie0_clkreq),
  1106. PINCTRL_PIN_GROUP("pcie1_clkreq", mt7623_pcie1_clkreq),
  1107. PINCTRL_PIN_GROUP("pcie2_clkreq", mt7623_pcie2_clkreq),
  1108. PINCTRL_PIN_GROUP("pcm_clk_0", mt7623_pcm_clk_0),
  1109. PINCTRL_PIN_GROUP("pcm_clk_1", mt7623_pcm_clk_1),
  1110. PINCTRL_PIN_GROUP("pcm_clk_2", mt7623_pcm_clk_2),
  1111. PINCTRL_PIN_GROUP("pcm_clk_3", mt7623_pcm_clk_3),
  1112. PINCTRL_PIN_GROUP("pcm_clk_4", mt7623_pcm_clk_4),
  1113. PINCTRL_PIN_GROUP("pcm_clk_5", mt7623_pcm_clk_5),
  1114. PINCTRL_PIN_GROUP("pcm_clk_6", mt7623_pcm_clk_6),
  1115. PINCTRL_PIN_GROUP("pcm_sync_0", mt7623_pcm_sync_0),
  1116. PINCTRL_PIN_GROUP("pcm_sync_1", mt7623_pcm_sync_1),
  1117. PINCTRL_PIN_GROUP("pcm_sync_2", mt7623_pcm_sync_2),
  1118. PINCTRL_PIN_GROUP("pcm_sync_3", mt7623_pcm_sync_3),
  1119. PINCTRL_PIN_GROUP("pcm_sync_4", mt7623_pcm_sync_4),
  1120. PINCTRL_PIN_GROUP("pcm_sync_5", mt7623_pcm_sync_5),
  1121. PINCTRL_PIN_GROUP("pcm_sync_6", mt7623_pcm_sync_6),
  1122. PINCTRL_PIN_GROUP("pcm_rx_0", mt7623_pcm_rx_0),
  1123. PINCTRL_PIN_GROUP("pcm_rx_1", mt7623_pcm_rx_1),
  1124. PINCTRL_PIN_GROUP("pcm_rx_2", mt7623_pcm_rx_2),
  1125. PINCTRL_PIN_GROUP("pcm_rx_3", mt7623_pcm_rx_3),
  1126. PINCTRL_PIN_GROUP("pcm_rx_4", mt7623_pcm_rx_4),
  1127. PINCTRL_PIN_GROUP("pcm_rx_5", mt7623_pcm_rx_5),
  1128. PINCTRL_PIN_GROUP("pcm_rx_6", mt7623_pcm_rx_6),
  1129. PINCTRL_PIN_GROUP("pcm_tx_0", mt7623_pcm_tx_0),
  1130. PINCTRL_PIN_GROUP("pcm_tx_1", mt7623_pcm_tx_1),
  1131. PINCTRL_PIN_GROUP("pcm_tx_2", mt7623_pcm_tx_2),
  1132. PINCTRL_PIN_GROUP("pcm_tx_3", mt7623_pcm_tx_3),
  1133. PINCTRL_PIN_GROUP("pcm_tx_4", mt7623_pcm_tx_4),
  1134. PINCTRL_PIN_GROUP("pcm_tx_5", mt7623_pcm_tx_5),
  1135. PINCTRL_PIN_GROUP("pcm_tx_6", mt7623_pcm_tx_6),
  1136. PINCTRL_PIN_GROUP("pwm_ch1_0", mt7623_pwm_ch1_0),
  1137. PINCTRL_PIN_GROUP("pwm_ch1_1", mt7623_pwm_ch1_1),
  1138. PINCTRL_PIN_GROUP("pwm_ch1_2", mt7623_pwm_ch1_2),
  1139. PINCTRL_PIN_GROUP("pwm_ch1_3", mt7623_pwm_ch1_3),
  1140. PINCTRL_PIN_GROUP("pwm_ch1_4", mt7623_pwm_ch1_4),
  1141. PINCTRL_PIN_GROUP("pwm_ch2_0", mt7623_pwm_ch2_0),
  1142. PINCTRL_PIN_GROUP("pwm_ch2_1", mt7623_pwm_ch2_1),
  1143. PINCTRL_PIN_GROUP("pwm_ch2_2", mt7623_pwm_ch2_2),
  1144. PINCTRL_PIN_GROUP("pwm_ch2_3", mt7623_pwm_ch2_3),
  1145. PINCTRL_PIN_GROUP("pwm_ch2_4", mt7623_pwm_ch2_4),
  1146. PINCTRL_PIN_GROUP("pwm_ch3_0", mt7623_pwm_ch3_0),
  1147. PINCTRL_PIN_GROUP("pwm_ch3_1", mt7623_pwm_ch3_1),
  1148. PINCTRL_PIN_GROUP("pwm_ch3_2", mt7623_pwm_ch3_2),
  1149. PINCTRL_PIN_GROUP("pwm_ch3_3", mt7623_pwm_ch3_3),
  1150. PINCTRL_PIN_GROUP("pwm_ch4_0", mt7623_pwm_ch4_0),
  1151. PINCTRL_PIN_GROUP("pwm_ch4_1", mt7623_pwm_ch4_1),
  1152. PINCTRL_PIN_GROUP("pwm_ch4_2", mt7623_pwm_ch4_2),
  1153. PINCTRL_PIN_GROUP("pwm_ch4_3", mt7623_pwm_ch4_3),
  1154. PINCTRL_PIN_GROUP("pwm_ch5_0", mt7623_pwm_ch5_0),
  1155. PINCTRL_PIN_GROUP("pwm_ch5_1", mt7623_pwm_ch5_1),
  1156. PINCTRL_PIN_GROUP("pwrap", mt7623_pwrap),
  1157. PINCTRL_PIN_GROUP("rtc", mt7623_rtc),
  1158. PINCTRL_PIN_GROUP("spdif_in0_0", mt7623_spdif_in0_0),
  1159. PINCTRL_PIN_GROUP("spdif_in0_1", mt7623_spdif_in0_1),
  1160. PINCTRL_PIN_GROUP("spdif_in1_0", mt7623_spdif_in1_0),
  1161. PINCTRL_PIN_GROUP("spdif_in1_1", mt7623_spdif_in1_1),
  1162. PINCTRL_PIN_GROUP("spdif_out", mt7623_spdif_out),
  1163. PINCTRL_PIN_GROUP("spi0", mt7623_spi0),
  1164. PINCTRL_PIN_GROUP("spi1", mt7623_spi1),
  1165. PINCTRL_PIN_GROUP("spi2", mt7623_spi2),
  1166. PINCTRL_PIN_GROUP("uart0_0_txd_rxd", mt7623_uart0_0_txd_rxd),
  1167. PINCTRL_PIN_GROUP("uart0_1_txd_rxd", mt7623_uart0_1_txd_rxd),
  1168. PINCTRL_PIN_GROUP("uart0_2_txd_rxd", mt7623_uart0_2_txd_rxd),
  1169. PINCTRL_PIN_GROUP("uart0_3_txd_rxd", mt7623_uart0_3_txd_rxd),
  1170. PINCTRL_PIN_GROUP("uart1_0_txd_rxd", mt7623_uart1_0_txd_rxd),
  1171. PINCTRL_PIN_GROUP("uart1_1_txd_rxd", mt7623_uart1_1_txd_rxd),
  1172. PINCTRL_PIN_GROUP("uart1_2_txd_rxd", mt7623_uart1_2_txd_rxd),
  1173. PINCTRL_PIN_GROUP("uart2_0_txd_rxd", mt7623_uart2_0_txd_rxd),
  1174. PINCTRL_PIN_GROUP("uart2_1_txd_rxd", mt7623_uart2_1_txd_rxd),
  1175. PINCTRL_PIN_GROUP("uart3_txd_rxd", mt7623_uart3_txd_rxd),
  1176. PINCTRL_PIN_GROUP("uart0_rts_cts", mt7623_uart0_rts_cts),
  1177. PINCTRL_PIN_GROUP("uart1_rts_cts", mt7623_uart1_rts_cts),
  1178. PINCTRL_PIN_GROUP("uart2_rts_cts", mt7623_uart2_rts_cts),
  1179. PINCTRL_PIN_GROUP("uart3_rts_cts", mt7623_uart3_rts_cts),
  1180. PINCTRL_PIN_GROUP("watchdog_0", mt7623_watchdog_0),
  1181. PINCTRL_PIN_GROUP("watchdog_1", mt7623_watchdog_1),
  1182. };
  1183. /* Joint those groups owning the same capability in user point of view which
  1184. * allows that people tend to use through the device tree.
  1185. */
  1186. static const char *const mt7623_aud_clk_groups[] = { "aud_ext_clk0",
  1187. "aud_ext_clk1", };
  1188. static const char *const mt7623_disp_pwm_groups[] = { "disp_pwm_0",
  1189. "disp_pwm_1",
  1190. "disp_pwm_2", };
  1191. static const char *const mt7623_ethernet_groups[] = { "esw_int", "esw_rst",
  1192. "ephy", "mdc_mdio", };
  1193. static const char *const mt7623_ext_sdio_groups[] = { "ext_sdio", };
  1194. static const char *const mt7623_hdmi_groups[] = { "hdmi_cec", "hdmi_htplg",
  1195. "hdmi_i2c", "hdmi_rx",
  1196. "hdmi_rx_i2c", };
  1197. static const char *const mt7623_i2c_groups[] = { "i2c0", "i2c1_0", "i2c1_1",
  1198. "i2c1_2", "i2c1_3", "i2c1_4",
  1199. "i2c2_0", "i2c2_1", "i2c2_2",
  1200. "i2c2_3", };
  1201. static const char *const mt7623_i2s_groups[] = { "i2s0", "i2s1",
  1202. "i2s2_bclk_lrclk_mclk",
  1203. "i2s3_bclk_lrclk_mclk",
  1204. "i2s4", "i2s5",
  1205. "i2s2_data_in", "i2s3_data_in",
  1206. "i2s2_data_0", "i2s2_data_1",
  1207. "i2s3_data_0", "i2s3_data_1",};
  1208. static const char *const mt7623_ir_groups[] = { "ir", };
  1209. static const char *const mt7623_lcd_groups[] = { "dsi_te", "lcm_rst",
  1210. "mipi_tx", };
  1211. static const char *const mt7623_msdc_groups[] = { "msdc0", "msdc1",
  1212. "msdc1_ins", "msdc1_wp_0",
  1213. "msdc1_wp_1", "msdc1_wp_2",
  1214. "msdc2", "msdc3", };
  1215. static const char *const mt7623_nandc_groups[] = { "nandc", "nandc_ceb0",
  1216. "nandc_ceb1", };
  1217. static const char *const mt7623_otg_groups[] = { "otg_iddig0_0",
  1218. "otg_iddig0_1",
  1219. "otg_iddig0_2",
  1220. "otg_iddig1_0",
  1221. "otg_iddig1_1",
  1222. "otg_iddig1_2",
  1223. "otg_drv_vbus0_0",
  1224. "otg_drv_vbus0_1",
  1225. "otg_drv_vbus0_2",
  1226. "otg_drv_vbus1_0",
  1227. "otg_drv_vbus1_1",
  1228. "otg_drv_vbus1_2", };
  1229. static const char *const mt7623_pcie_groups[] = { "pcie0_0_perst",
  1230. "pcie0_1_perst",
  1231. "pcie1_0_perst",
  1232. "pcie1_1_perst",
  1233. "pcie2_0_perst",
  1234. "pcie2_1_perst",
  1235. "pcie0_0_rev_perst",
  1236. "pcie0_1_rev_perst",
  1237. "pcie1_0_rev_perst",
  1238. "pcie1_1_rev_perst",
  1239. "pcie2_0_rev_perst",
  1240. "pcie2_1_rev_perst",
  1241. "pcie0_0_wake", "pcie0_1_wake",
  1242. "pcie2_0_wake", "pcie2_1_wake",
  1243. "pcie0_clkreq", "pcie1_clkreq",
  1244. "pcie2_clkreq", };
  1245. static const char *const mt7623_pcm_groups[] = { "pcm_clk_0", "pcm_clk_1",
  1246. "pcm_clk_2", "pcm_clk_3",
  1247. "pcm_clk_4", "pcm_clk_5",
  1248. "pcm_clk_6", "pcm_sync_0",
  1249. "pcm_sync_1", "pcm_sync_2",
  1250. "pcm_sync_3", "pcm_sync_4",
  1251. "pcm_sync_5", "pcm_sync_6",
  1252. "pcm_rx_0", "pcm_rx_1",
  1253. "pcm_rx_2", "pcm_rx_3",
  1254. "pcm_rx_4", "pcm_rx_5",
  1255. "pcm_rx_6", "pcm_tx_0",
  1256. "pcm_tx_1", "pcm_tx_2",
  1257. "pcm_tx_3", "pcm_tx_4",
  1258. "pcm_tx_5", "pcm_tx_6", };
  1259. static const char *const mt7623_pwm_groups[] = { "pwm_ch1_0", "pwm_ch1_1",
  1260. "pwm_ch1_2", "pwm_ch2_0",
  1261. "pwm_ch2_1", "pwm_ch2_2",
  1262. "pwm_ch3_0", "pwm_ch3_1",
  1263. "pwm_ch3_2", "pwm_ch4_0",
  1264. "pwm_ch4_1", "pwm_ch4_2",
  1265. "pwm_ch4_3", "pwm_ch5_0",
  1266. "pwm_ch5_1", "pwm_ch5_2",
  1267. "pwm_ch6_0", "pwm_ch6_1",
  1268. "pwm_ch6_2", "pwm_ch6_3",
  1269. "pwm_ch7_0", "pwm_ch7_1",
  1270. "pwm_ch7_2", };
  1271. static const char *const mt7623_pwrap_groups[] = { "pwrap", };
  1272. static const char *const mt7623_rtc_groups[] = { "rtc", };
  1273. static const char *const mt7623_spi_groups[] = { "spi0", "spi2", "spi2", };
  1274. static const char *const mt7623_spdif_groups[] = { "spdif_in0_0",
  1275. "spdif_in0_1", "spdif_in1_0",
  1276. "spdif_in1_1", "spdif_out", };
  1277. static const char *const mt7623_uart_groups[] = { "uart0_0_txd_rxd",
  1278. "uart0_1_txd_rxd",
  1279. "uart0_2_txd_rxd",
  1280. "uart0_3_txd_rxd",
  1281. "uart1_0_txd_rxd",
  1282. "uart1_1_txd_rxd",
  1283. "uart1_2_txd_rxd",
  1284. "uart2_0_txd_rxd",
  1285. "uart2_1_txd_rxd",
  1286. "uart3_txd_rxd",
  1287. "uart0_rts_cts",
  1288. "uart1_rts_cts",
  1289. "uart2_rts_cts",
  1290. "uart3_rts_cts", };
  1291. static const char *const mt7623_wdt_groups[] = { "watchdog_0", "watchdog_1", };
  1292. static const struct mtk_function_desc mt7623_functions[] = {
  1293. {"audck", mt7623_aud_clk_groups, ARRAY_SIZE(mt7623_aud_clk_groups)},
  1294. {"disp", mt7623_disp_pwm_groups, ARRAY_SIZE(mt7623_disp_pwm_groups)},
  1295. {"eth", mt7623_ethernet_groups, ARRAY_SIZE(mt7623_ethernet_groups)},
  1296. {"sdio", mt7623_ext_sdio_groups, ARRAY_SIZE(mt7623_ext_sdio_groups)},
  1297. {"hdmi", mt7623_hdmi_groups, ARRAY_SIZE(mt7623_hdmi_groups)},
  1298. {"i2c", mt7623_i2c_groups, ARRAY_SIZE(mt7623_i2c_groups)},
  1299. {"i2s", mt7623_i2s_groups, ARRAY_SIZE(mt7623_i2s_groups)},
  1300. {"ir", mt7623_ir_groups, ARRAY_SIZE(mt7623_ir_groups)},
  1301. {"lcd", mt7623_lcd_groups, ARRAY_SIZE(mt7623_lcd_groups)},
  1302. {"msdc", mt7623_msdc_groups, ARRAY_SIZE(mt7623_msdc_groups)},
  1303. {"nand", mt7623_nandc_groups, ARRAY_SIZE(mt7623_nandc_groups)},
  1304. {"otg", mt7623_otg_groups, ARRAY_SIZE(mt7623_otg_groups)},
  1305. {"pcie", mt7623_pcie_groups, ARRAY_SIZE(mt7623_pcie_groups)},
  1306. {"pcm", mt7623_pcm_groups, ARRAY_SIZE(mt7623_pcm_groups)},
  1307. {"pwm", mt7623_pwm_groups, ARRAY_SIZE(mt7623_pwm_groups)},
  1308. {"pwrap", mt7623_pwrap_groups, ARRAY_SIZE(mt7623_pwrap_groups)},
  1309. {"rtc", mt7623_rtc_groups, ARRAY_SIZE(mt7623_rtc_groups)},
  1310. {"spi", mt7623_spi_groups, ARRAY_SIZE(mt7623_spi_groups)},
  1311. {"spdif", mt7623_spdif_groups, ARRAY_SIZE(mt7623_spdif_groups)},
  1312. {"uart", mt7623_uart_groups, ARRAY_SIZE(mt7623_uart_groups)},
  1313. {"watchdog", mt7623_wdt_groups, ARRAY_SIZE(mt7623_wdt_groups)},
  1314. };
  1315. static struct mtk_pinctrl_soc mt7623_data = {
  1316. .name = "mt7623_pinctrl",
  1317. .reg_cal = mt7623_reg_cals,
  1318. .pins = mt7623_pins,
  1319. .npins = ARRAY_SIZE(mt7623_pins),
  1320. .grps = mt7623_groups,
  1321. .ngrps = ARRAY_SIZE(mt7623_groups),
  1322. .funcs = mt7623_functions,
  1323. .nfuncs = ARRAY_SIZE(mt7623_functions),
  1324. .gpio_mode = 0,
  1325. .rev = MTK_PINCTRL_V1,
  1326. };
  1327. /*
  1328. * There are some specific pins have mux functions greater than 8,
  1329. * and if we want to switch thees high modes we need to disable
  1330. * bonding constraints firstly.
  1331. */
  1332. static void mt7623_bonding_disable(struct udevice *dev)
  1333. {
  1334. mtk_rmw(dev, PIN_BOND_REG0, BOND_PCIE_CLR, BOND_PCIE_CLR);
  1335. mtk_rmw(dev, PIN_BOND_REG1, BOND_I2S_CLR, BOND_I2S_CLR);
  1336. mtk_rmw(dev, PIN_BOND_REG2, BOND_MSDC0E_CLR, BOND_MSDC0E_CLR);
  1337. }
  1338. static int mtk_pinctrl_mt7623_probe(struct udevice *dev)
  1339. {
  1340. int err;
  1341. err = mtk_pinctrl_common_probe(dev, &mt7623_data);
  1342. if (err)
  1343. return err;
  1344. mt7623_bonding_disable(dev);
  1345. return 0;
  1346. }
  1347. static const struct udevice_id mt7623_pctrl_match[] = {
  1348. { .compatible = "mediatek,mt7623-pinctrl", },
  1349. { /* sentinel */ }
  1350. };
  1351. U_BOOT_DRIVER(mt7623_pinctrl) = {
  1352. .name = "mt7623_pinctrl",
  1353. .id = UCLASS_PINCTRL,
  1354. .of_match = mt7623_pctrl_match,
  1355. .ops = &mtk_pinctrl_ops,
  1356. .probe = mtk_pinctrl_mt7623_probe,
  1357. .priv_auto_alloc_size = sizeof(struct mtk_pinctrl_priv),
  1358. };