bcm6368-usbh-phy.c 4.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
  4. *
  5. * Derived from linux/arch/mips/bcm63xx/usb-common.c:
  6. * Copyright 2008 Maxime Bizon <mbizon@freebox.fr>
  7. * Copyright 2013 Florian Fainelli <florian@openwrt.org>
  8. */
  9. #include <common.h>
  10. #include <clk.h>
  11. #include <dm.h>
  12. #include <generic-phy.h>
  13. #include <log.h>
  14. #include <malloc.h>
  15. #include <power-domain.h>
  16. #include <reset.h>
  17. #include <asm/io.h>
  18. #include <dm/device.h>
  19. #include <linux/bitops.h>
  20. #include <linux/delay.h>
  21. /* USBH PLL Control register */
  22. #define USBH_PLL_REG 0x18
  23. #define USBH_PLL_IDDQ_PWRDN BIT(9)
  24. #define USBH_PLL_PWRDN_DELAY BIT(10)
  25. /* USBH Swap Control register */
  26. #define USBH_SWAP_REG 0x1c
  27. #define USBH_SWAP_OHCI_DATA BIT(0)
  28. #define USBH_SWAP_OHCI_ENDIAN BIT(1)
  29. #define USBH_SWAP_EHCI_DATA BIT(3)
  30. #define USBH_SWAP_EHCI_ENDIAN BIT(4)
  31. /* USBH Setup register */
  32. #define USBH_SETUP_REG 0x28
  33. #define USBH_SETUP_IOC BIT(4)
  34. #define USBH_SETUP_IPP BIT(5)
  35. struct bcm6368_usbh_hw {
  36. uint32_t setup_clr;
  37. uint32_t pll_clr;
  38. };
  39. struct bcm6368_usbh_priv {
  40. const struct bcm6368_usbh_hw *hw;
  41. void __iomem *regs;
  42. };
  43. static int bcm6368_usbh_init(struct phy *phy)
  44. {
  45. struct bcm6368_usbh_priv *priv = dev_get_priv(phy->dev);
  46. const struct bcm6368_usbh_hw *hw = priv->hw;
  47. /* configure to work in native cpu endian */
  48. clrsetbits_be32(priv->regs + USBH_SWAP_REG,
  49. USBH_SWAP_EHCI_ENDIAN | USBH_SWAP_OHCI_ENDIAN,
  50. USBH_SWAP_EHCI_DATA | USBH_SWAP_OHCI_DATA);
  51. /* setup config */
  52. if (hw->setup_clr)
  53. clrbits_be32(priv->regs + USBH_SETUP_REG, hw->setup_clr);
  54. setbits_be32(priv->regs + USBH_SETUP_REG, USBH_SETUP_IOC);
  55. /* enable pll control */
  56. if (hw->pll_clr)
  57. clrbits_be32(priv->regs + USBH_PLL_REG, hw->pll_clr);
  58. return 0;
  59. }
  60. static struct phy_ops bcm6368_usbh_ops = {
  61. .init = bcm6368_usbh_init,
  62. };
  63. static const struct bcm6368_usbh_hw bcm6328_hw = {
  64. .pll_clr = USBH_PLL_IDDQ_PWRDN | USBH_PLL_PWRDN_DELAY,
  65. .setup_clr = 0,
  66. };
  67. static const struct bcm6368_usbh_hw bcm6362_hw = {
  68. .pll_clr = 0,
  69. .setup_clr = 0,
  70. };
  71. static const struct bcm6368_usbh_hw bcm6368_hw = {
  72. .pll_clr = 0,
  73. .setup_clr = 0,
  74. };
  75. static const struct bcm6368_usbh_hw bcm63268_hw = {
  76. .pll_clr = USBH_PLL_IDDQ_PWRDN | USBH_PLL_PWRDN_DELAY,
  77. .setup_clr = USBH_SETUP_IPP,
  78. };
  79. static const struct udevice_id bcm6368_usbh_ids[] = {
  80. {
  81. .compatible = "brcm,bcm6328-usbh",
  82. .data = (ulong)&bcm6328_hw,
  83. }, {
  84. .compatible = "brcm,bcm6362-usbh",
  85. .data = (ulong)&bcm6362_hw,
  86. }, {
  87. .compatible = "brcm,bcm6368-usbh",
  88. .data = (ulong)&bcm6368_hw,
  89. }, {
  90. .compatible = "brcm,bcm63268-usbh",
  91. .data = (ulong)&bcm63268_hw,
  92. }, { /* sentinel */ }
  93. };
  94. static int bcm6368_usbh_probe(struct udevice *dev)
  95. {
  96. struct bcm6368_usbh_priv *priv = dev_get_priv(dev);
  97. const struct bcm6368_usbh_hw *hw =
  98. (const struct bcm6368_usbh_hw *)dev_get_driver_data(dev);
  99. #if defined(CONFIG_POWER_DOMAIN)
  100. struct power_domain pwr_dom;
  101. #endif
  102. struct reset_ctl rst_ctl;
  103. struct clk clk;
  104. int ret;
  105. priv->regs = dev_remap_addr(dev);
  106. if (!priv->regs)
  107. return -EINVAL;
  108. priv->hw = hw;
  109. /* enable usbh clock */
  110. ret = clk_get_by_name(dev, "usbh", &clk);
  111. if (ret < 0)
  112. return ret;
  113. ret = clk_enable(&clk);
  114. if (ret < 0)
  115. return ret;
  116. ret = clk_free(&clk);
  117. if (ret < 0)
  118. return ret;
  119. #if defined(CONFIG_POWER_DOMAIN)
  120. /* enable power domain */
  121. ret = power_domain_get(dev, &pwr_dom);
  122. if (ret < 0)
  123. return ret;
  124. ret = power_domain_on(&pwr_dom);
  125. if (ret < 0)
  126. return ret;
  127. ret = power_domain_free(&pwr_dom);
  128. if (ret < 0)
  129. return ret;
  130. #endif
  131. /* perform reset */
  132. ret = reset_get_by_index(dev, 0, &rst_ctl);
  133. if (ret < 0)
  134. return ret;
  135. ret = reset_deassert(&rst_ctl);
  136. if (ret < 0)
  137. return ret;
  138. ret = reset_free(&rst_ctl);
  139. if (ret < 0)
  140. return ret;
  141. /* enable usb_ref clock */
  142. ret = clk_get_by_name(dev, "usb_ref", &clk);
  143. if (!ret) {
  144. ret = clk_enable(&clk);
  145. if (ret < 0)
  146. return ret;
  147. ret = clk_free(&clk);
  148. if (ret < 0)
  149. return ret;
  150. }
  151. mdelay(100);
  152. return 0;
  153. }
  154. U_BOOT_DRIVER(bcm6368_usbh) = {
  155. .name = "bcm6368-usbh",
  156. .id = UCLASS_PHY,
  157. .of_match = bcm6368_usbh_ids,
  158. .ops = &bcm6368_usbh_ops,
  159. .priv_auto_alloc_size = sizeof(struct bcm6368_usbh_priv),
  160. .probe = bcm6368_usbh_probe,
  161. };