snps_dw_mmc.c 4.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Synopsys DesignWare Multimedia Card Interface driver
  4. * extensions used in various Synopsys ARC devboards.
  5. *
  6. * Copyright (C) 2019 Synopsys
  7. * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
  8. */
  9. #include <common.h>
  10. #include <clk.h>
  11. #include <dm.h>
  12. #include <dwmmc.h>
  13. #include <errno.h>
  14. #include <fdtdec.h>
  15. #include <dm/device_compat.h>
  16. #include <linux/libfdt.h>
  17. #include <linux/err.h>
  18. #include <malloc.h>
  19. #define CLOCK_MIN 400000 /* 400 kHz */
  20. #define FIFO_MIN 8
  21. #define FIFO_MAX 4096
  22. struct snps_dwmci_plat {
  23. struct mmc_config cfg;
  24. struct mmc mmc;
  25. };
  26. struct snps_dwmci_priv_data {
  27. struct dwmci_host host;
  28. u32 f_max;
  29. };
  30. static int snps_dwmmc_clk_setup(struct udevice *dev)
  31. {
  32. struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
  33. struct dwmci_host *host = &priv->host;
  34. struct clk clk_ciu, clk_biu;
  35. int ret;
  36. ret = clk_get_by_name(dev, "ciu", &clk_ciu);
  37. if (ret)
  38. goto clk_err;
  39. ret = clk_enable(&clk_ciu);
  40. if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
  41. goto clk_err_ciu;
  42. host->bus_hz = clk_get_rate(&clk_ciu);
  43. if (host->bus_hz < CLOCK_MIN) {
  44. ret = -EINVAL;
  45. goto clk_err_ciu_dis;
  46. }
  47. ret = clk_get_by_name(dev, "biu", &clk_biu);
  48. if (ret)
  49. goto clk_err_ciu_dis;
  50. ret = clk_enable(&clk_biu);
  51. if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
  52. goto clk_err_biu;
  53. return 0;
  54. clk_err_biu:
  55. clk_free(&clk_biu);
  56. clk_err_ciu_dis:
  57. clk_disable(&clk_ciu);
  58. clk_err_ciu:
  59. clk_free(&clk_ciu);
  60. clk_err:
  61. dev_err(dev, "failed to setup clocks, ret %d\n", ret);
  62. return ret;
  63. }
  64. static int snps_dwmmc_ofdata_to_platdata(struct udevice *dev)
  65. {
  66. struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
  67. struct dwmci_host *host = &priv->host;
  68. u32 fifo_depth;
  69. int ret;
  70. host->ioaddr = dev_read_addr_ptr(dev);
  71. /*
  72. * If fifo-depth is unset don't set fifoth_val - we will try to
  73. * auto detect it.
  74. */
  75. ret = dev_read_u32(dev, "fifo-depth", &fifo_depth);
  76. if (!ret) {
  77. if (fifo_depth < FIFO_MIN || fifo_depth > FIFO_MAX)
  78. return -EINVAL;
  79. host->fifoth_val = MSIZE(0x2) |
  80. RX_WMARK(fifo_depth / 2 - 1) |
  81. TX_WMARK(fifo_depth / 2);
  82. }
  83. host->buswidth = dev_read_u32_default(dev, "bus-width", 4);
  84. if (host->buswidth != 1 && host->buswidth != 4 && host->buswidth != 8)
  85. return -EINVAL;
  86. /*
  87. * If max-frequency is unset don't set priv->f_max - we will use
  88. * host->bus_hz in probe() instead.
  89. */
  90. ret = dev_read_u32(dev, "max-frequency", &priv->f_max);
  91. if (!ret && priv->f_max < CLOCK_MIN)
  92. return -EINVAL;
  93. host->fifo_mode = dev_read_bool(dev, "fifo-mode");
  94. host->name = dev->name;
  95. host->dev_index = 0;
  96. host->priv = priv;
  97. return 0;
  98. }
  99. int snps_dwmmc_getcd(struct udevice *dev)
  100. {
  101. struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
  102. struct dwmci_host *host = &priv->host;
  103. return !(dwmci_readl(host, DWMCI_CDETECT) & 1);
  104. }
  105. struct dm_mmc_ops snps_dwmci_dm_ops;
  106. static int snps_dwmmc_probe(struct udevice *dev)
  107. {
  108. #ifdef CONFIG_BLK
  109. struct snps_dwmci_plat *plat = dev_get_platdata(dev);
  110. #endif
  111. struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
  112. struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
  113. struct dwmci_host *host = &priv->host;
  114. unsigned int clock_max;
  115. int ret;
  116. /* Extend generic 'dm_dwmci_ops' with our 'getcd' implementation */
  117. memcpy(&snps_dwmci_dm_ops, &dm_dwmci_ops, sizeof(struct dm_mmc_ops));
  118. snps_dwmci_dm_ops.get_cd = snps_dwmmc_getcd;
  119. ret = snps_dwmmc_clk_setup(dev);
  120. if (ret)
  121. return ret;
  122. if (!priv->f_max)
  123. clock_max = host->bus_hz;
  124. else
  125. clock_max = min_t(unsigned int, host->bus_hz, priv->f_max);
  126. #ifdef CONFIG_BLK
  127. dwmci_setup_cfg(&plat->cfg, host, clock_max, CLOCK_MIN);
  128. host->mmc = &plat->mmc;
  129. #else
  130. ret = add_dwmci(host, clock_max, CLOCK_MIN);
  131. if (ret)
  132. return ret;
  133. #endif
  134. host->mmc->priv = &priv->host;
  135. upriv->mmc = host->mmc;
  136. host->mmc->dev = dev;
  137. return dwmci_probe(dev);
  138. }
  139. static int snps_dwmmc_bind(struct udevice *dev)
  140. {
  141. #ifdef CONFIG_BLK
  142. struct snps_dwmci_plat *plat = dev_get_platdata(dev);
  143. int ret;
  144. ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
  145. if (ret)
  146. return ret;
  147. #endif
  148. return 0;
  149. }
  150. static const struct udevice_id snps_dwmmc_ids[] = {
  151. { .compatible = "snps,dw-mshc" },
  152. { }
  153. };
  154. U_BOOT_DRIVER(snps_dwmmc_drv) = {
  155. .name = "snps_dw_mmc",
  156. .id = UCLASS_MMC,
  157. .of_match = snps_dwmmc_ids,
  158. .ofdata_to_platdata = snps_dwmmc_ofdata_to_platdata,
  159. .ops = &snps_dwmci_dm_ops,
  160. .bind = snps_dwmmc_bind,
  161. .probe = snps_dwmmc_probe,
  162. .priv_auto_alloc_size = sizeof(struct snps_dwmci_priv_data),
  163. .platdata_auto_alloc_size = sizeof(struct snps_dwmci_plat),
  164. };