tegra186_bpmp.c 5.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2016, NVIDIA CORPORATION.
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <log.h>
  8. #include <malloc.h>
  9. #include <time.h>
  10. #include <dm/lists.h>
  11. #include <dm/root.h>
  12. #include <mailbox.h>
  13. #include <misc.h>
  14. #include <asm/arch-tegra/bpmp_abi.h>
  15. #include <asm/arch-tegra/ivc.h>
  16. #include <linux/bitops.h>
  17. #include <linux/err.h>
  18. #define BPMP_IVC_FRAME_COUNT 1
  19. #define BPMP_IVC_FRAME_SIZE 128
  20. #define BPMP_FLAG_DO_ACK BIT(0)
  21. #define BPMP_FLAG_RING_DOORBELL BIT(1)
  22. DECLARE_GLOBAL_DATA_PTR;
  23. struct tegra186_bpmp {
  24. struct mbox_chan mbox;
  25. struct tegra_ivc ivc;
  26. };
  27. static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,
  28. int tx_size, void *rx_msg, int rx_size)
  29. {
  30. struct tegra186_bpmp *priv = dev_get_priv(dev);
  31. int ret, err;
  32. void *ivc_frame;
  33. struct mrq_request *req;
  34. struct mrq_response *resp;
  35. ulong start_time;
  36. debug("%s(dev=%p, mrq=%u, tx_msg=%p, tx_size=%d, rx_msg=%p, rx_size=%d) (priv=%p)\n",
  37. __func__, dev, mrq, tx_msg, tx_size, rx_msg, rx_size, priv);
  38. if ((tx_size > BPMP_IVC_FRAME_SIZE) || (rx_size > BPMP_IVC_FRAME_SIZE))
  39. return -EINVAL;
  40. ret = tegra_ivc_write_get_next_frame(&priv->ivc, &ivc_frame);
  41. if (ret) {
  42. pr_err("tegra_ivc_write_get_next_frame() failed: %d\n", ret);
  43. return ret;
  44. }
  45. req = ivc_frame;
  46. req->mrq = mrq;
  47. req->flags = BPMP_FLAG_DO_ACK | BPMP_FLAG_RING_DOORBELL;
  48. memcpy(req + 1, tx_msg, tx_size);
  49. ret = tegra_ivc_write_advance(&priv->ivc);
  50. if (ret) {
  51. pr_err("tegra_ivc_write_advance() failed: %d\n", ret);
  52. return ret;
  53. }
  54. start_time = timer_get_us();
  55. for (;;) {
  56. ret = tegra_ivc_channel_notified(&priv->ivc);
  57. if (ret) {
  58. pr_err("tegra_ivc_channel_notified() failed: %d\n", ret);
  59. return ret;
  60. }
  61. ret = tegra_ivc_read_get_next_frame(&priv->ivc, &ivc_frame);
  62. if (!ret)
  63. break;
  64. /* Timeout 20ms; roughly 10x current max observed duration */
  65. if ((timer_get_us() - start_time) > 20 * 1000) {
  66. pr_err("tegra_ivc_read_get_next_frame() timed out (%d)\n",
  67. ret);
  68. return -ETIMEDOUT;
  69. }
  70. }
  71. resp = ivc_frame;
  72. err = resp->err;
  73. if (!err && rx_msg && rx_size)
  74. memcpy(rx_msg, resp + 1, rx_size);
  75. ret = tegra_ivc_read_advance(&priv->ivc);
  76. if (ret) {
  77. pr_err("tegra_ivc_write_advance() failed: %d\n", ret);
  78. return ret;
  79. }
  80. if (err) {
  81. pr_err("BPMP responded with error %d\n", err);
  82. /* err isn't a U-Boot error code, so don't that */
  83. return -EIO;
  84. }
  85. return rx_size;
  86. }
  87. /**
  88. * The BPMP exposes multiple different services. We create a sub-device for
  89. * each separate type of service, since each device must be of the appropriate
  90. * UCLASS.
  91. */
  92. static int tegra186_bpmp_bind(struct udevice *dev)
  93. {
  94. int ret;
  95. struct udevice *child;
  96. debug("%s(dev=%p)\n", __func__, dev);
  97. ret = device_bind_driver_to_node(dev, "tegra186_clk", "tegra186_clk",
  98. dev_ofnode(dev), &child);
  99. if (ret)
  100. return ret;
  101. ret = device_bind_driver_to_node(dev, "tegra186_reset",
  102. "tegra186_reset", dev_ofnode(dev),
  103. &child);
  104. if (ret)
  105. return ret;
  106. ret = device_bind_driver_to_node(dev, "tegra186_power_domain",
  107. "tegra186_power_domain",
  108. dev_ofnode(dev), &child);
  109. if (ret)
  110. return ret;
  111. ret = dm_scan_fdt_dev(dev);
  112. if (ret)
  113. return ret;
  114. return 0;
  115. }
  116. static ulong tegra186_bpmp_get_shmem(struct udevice *dev, int index)
  117. {
  118. int ret;
  119. struct fdtdec_phandle_args args;
  120. fdt_addr_t reg;
  121. ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
  122. "shmem", NULL, 0, index, &args);
  123. if (ret < 0) {
  124. pr_err("fdtdec_parse_phandle_with_args() failed: %d\n", ret);
  125. return ret;
  126. }
  127. reg = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, args.node,
  128. "reg", 0, NULL, true);
  129. if (reg == FDT_ADDR_T_NONE) {
  130. pr_err("fdtdec_get_addr_size_auto_noparent() failed\n");
  131. return -ENODEV;
  132. }
  133. return reg;
  134. }
  135. static void tegra186_bpmp_ivc_notify(struct tegra_ivc *ivc)
  136. {
  137. struct tegra186_bpmp *priv =
  138. container_of(ivc, struct tegra186_bpmp, ivc);
  139. int ret;
  140. ret = mbox_send(&priv->mbox, NULL);
  141. if (ret)
  142. pr_err("mbox_send() failed: %d\n", ret);
  143. }
  144. static int tegra186_bpmp_probe(struct udevice *dev)
  145. {
  146. struct tegra186_bpmp *priv = dev_get_priv(dev);
  147. int ret;
  148. ulong tx_base, rx_base, start_time;
  149. debug("%s(dev=%p) (priv=%p)\n", __func__, dev, priv);
  150. ret = mbox_get_by_index(dev, 0, &priv->mbox);
  151. if (ret) {
  152. pr_err("mbox_get_by_index() failed: %d\n", ret);
  153. return ret;
  154. }
  155. tx_base = tegra186_bpmp_get_shmem(dev, 0);
  156. if (IS_ERR_VALUE(tx_base)) {
  157. pr_err("tegra186_bpmp_get_shmem failed for tx_base\n");
  158. return tx_base;
  159. }
  160. rx_base = tegra186_bpmp_get_shmem(dev, 1);
  161. if (IS_ERR_VALUE(rx_base)) {
  162. pr_err("tegra186_bpmp_get_shmem failed for rx_base\n");
  163. return rx_base;
  164. }
  165. debug("shmem: rx=%lx, tx=%lx\n", rx_base, tx_base);
  166. ret = tegra_ivc_init(&priv->ivc, rx_base, tx_base, BPMP_IVC_FRAME_COUNT,
  167. BPMP_IVC_FRAME_SIZE, tegra186_bpmp_ivc_notify);
  168. if (ret) {
  169. pr_err("tegra_ivc_init() failed: %d\n", ret);
  170. return ret;
  171. }
  172. tegra_ivc_channel_reset(&priv->ivc);
  173. start_time = timer_get_us();
  174. for (;;) {
  175. ret = tegra_ivc_channel_notified(&priv->ivc);
  176. if (!ret)
  177. break;
  178. /* Timeout 100ms */
  179. if ((timer_get_us() - start_time) > 100 * 1000) {
  180. pr_err("Initial IVC reset timed out (%d)\n", ret);
  181. ret = -ETIMEDOUT;
  182. goto err_free_mbox;
  183. }
  184. }
  185. return 0;
  186. err_free_mbox:
  187. mbox_free(&priv->mbox);
  188. return ret;
  189. }
  190. static int tegra186_bpmp_remove(struct udevice *dev)
  191. {
  192. struct tegra186_bpmp *priv = dev_get_priv(dev);
  193. debug("%s(dev=%p) (priv=%p)\n", __func__, dev, priv);
  194. mbox_free(&priv->mbox);
  195. return 0;
  196. }
  197. static struct misc_ops tegra186_bpmp_ops = {
  198. .call = tegra186_bpmp_call,
  199. };
  200. static const struct udevice_id tegra186_bpmp_ids[] = {
  201. { .compatible = "nvidia,tegra186-bpmp" },
  202. { }
  203. };
  204. U_BOOT_DRIVER(tegra186_bpmp) = {
  205. .name = "tegra186_bpmp",
  206. .id = UCLASS_MISC,
  207. .of_match = tegra186_bpmp_ids,
  208. .bind = tegra186_bpmp_bind,
  209. .probe = tegra186_bpmp_probe,
  210. .remove = tegra186_bpmp_remove,
  211. .ops = &tegra186_bpmp_ops,
  212. .priv_auto_alloc_size = sizeof(struct tegra186_bpmp),
  213. };