ds4510.c 8.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2008 Extreme Engineering Solutions, Inc.
  4. */
  5. /*
  6. * Driver for DS4510, a CPU supervisor with integrated EEPROM, SRAM,
  7. * and 4 programmable non-volatile GPIO pins.
  8. */
  9. #include <common.h>
  10. #include <i2c.h>
  11. #include <command.h>
  12. #include <linux/delay.h>
  13. #include "ds4510.h"
  14. enum {
  15. DS4510_CMD_INFO,
  16. DS4510_CMD_DEVICE,
  17. DS4510_CMD_NV,
  18. DS4510_CMD_RSTDELAY,
  19. DS4510_CMD_OUTPUT,
  20. DS4510_CMD_INPUT,
  21. DS4510_CMD_PULLUP,
  22. DS4510_CMD_EEPROM,
  23. DS4510_CMD_SEEPROM,
  24. DS4510_CMD_SRAM,
  25. };
  26. /*
  27. * Write to DS4510, taking page boundaries into account
  28. */
  29. static int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)
  30. {
  31. int wrlen;
  32. int i = 0;
  33. do {
  34. wrlen = DS4510_EEPROM_PAGE_SIZE -
  35. DS4510_EEPROM_PAGE_OFFSET(offset);
  36. if (count < wrlen)
  37. wrlen = count;
  38. if (i2c_write(chip, offset, 1, &buf[i], wrlen))
  39. return -1;
  40. /*
  41. * This delay isn't needed for SRAM writes but shouldn't delay
  42. * things too much, so do it unconditionally for simplicity
  43. */
  44. udelay(DS4510_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
  45. count -= wrlen;
  46. offset += wrlen;
  47. i += wrlen;
  48. } while (count > 0);
  49. return 0;
  50. }
  51. /*
  52. * General read from DS4510
  53. */
  54. static int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count)
  55. {
  56. return i2c_read(chip, offset, 1, buf, count);
  57. }
  58. /*
  59. * Write SEE bit in config register.
  60. * nv = 0 - Writes to SEEPROM registers behave like EEPROM
  61. * nv = 1 - Writes to SEEPROM registers behave like SRAM
  62. */
  63. static int ds4510_see_write(uint8_t chip, uint8_t nv)
  64. {
  65. uint8_t data;
  66. if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
  67. return -1;
  68. if (nv) /* Treat SEEPROM bits as EEPROM */
  69. data &= ~DS4510_CFG_SEE;
  70. else /* Treat SEEPROM bits as SRAM */
  71. data |= DS4510_CFG_SEE;
  72. return ds4510_mem_write(chip, DS4510_CFG, &data, 1);
  73. }
  74. /*
  75. * Write de-assertion of reset signal delay
  76. */
  77. static int ds4510_rstdelay_write(uint8_t chip, uint8_t delay)
  78. {
  79. uint8_t data;
  80. if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1))
  81. return -1;
  82. data &= ~DS4510_RSTDELAY_MASK;
  83. data |= delay & DS4510_RSTDELAY_MASK;
  84. return ds4510_mem_write(chip, DS4510_RSTDELAY, &data, 1);
  85. }
  86. /*
  87. * Write pullup characteristics of IO pins
  88. */
  89. static int ds4510_pullup_write(uint8_t chip, uint8_t val)
  90. {
  91. val &= DS4510_IO_MASK;
  92. return ds4510_mem_write(chip, DS4510_PULLUP, (uint8_t *)&val, 1);
  93. }
  94. /*
  95. * Read pullup characteristics of IO pins
  96. */
  97. static int ds4510_pullup_read(uint8_t chip)
  98. {
  99. uint8_t val;
  100. if (i2c_read(chip, DS4510_PULLUP, 1, &val, 1))
  101. return -1;
  102. return val & DS4510_IO_MASK;
  103. }
  104. /*
  105. * Write drive level of IO pins
  106. */
  107. static int ds4510_gpio_write(uint8_t chip, uint8_t val)
  108. {
  109. uint8_t data;
  110. int i;
  111. for (i = 0; i < DS4510_NUM_IO; i++) {
  112. if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1))
  113. return -1;
  114. if (val & (0x1 << i))
  115. data |= 0x1;
  116. else
  117. data &= ~0x1;
  118. if (ds4510_mem_write(chip, DS4510_IO0 - i, &data, 1))
  119. return -1;
  120. }
  121. return 0;
  122. }
  123. /*
  124. * Read drive level of IO pins
  125. */
  126. static int ds4510_gpio_read(uint8_t chip)
  127. {
  128. uint8_t data;
  129. int val = 0;
  130. int i;
  131. for (i = 0; i < DS4510_NUM_IO; i++) {
  132. if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1))
  133. return -1;
  134. if (data & 1)
  135. val |= (1 << i);
  136. }
  137. return val;
  138. }
  139. /*
  140. * Read physical level of IO pins
  141. */
  142. static int ds4510_gpio_read_val(uint8_t chip)
  143. {
  144. uint8_t val;
  145. if (i2c_read(chip, DS4510_IO_STATUS, 1, &val, 1))
  146. return -1;
  147. return val & DS4510_IO_MASK;
  148. }
  149. /*
  150. * Display DS4510 information
  151. */
  152. static int ds4510_info(uint8_t chip)
  153. {
  154. int i;
  155. int tmp;
  156. uint8_t data;
  157. printf("DS4510 @ 0x%x:\n\n", chip);
  158. if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1))
  159. return -1;
  160. printf("rstdelay = 0x%x\n\n", data & DS4510_RSTDELAY_MASK);
  161. if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
  162. return -1;
  163. printf("config = 0x%x\n", data);
  164. printf(" /ready = %d\n", data & DS4510_CFG_READY ? 1 : 0);
  165. printf(" trip pt = %d\n", data & DS4510_CFG_TRIP_POINT ? 1 : 0);
  166. printf(" rst sts = %d\n", data & DS4510_CFG_RESET ? 1 : 0);
  167. printf(" /see = %d\n", data & DS4510_CFG_SEE ? 1 : 0);
  168. printf(" swrst = %d\n\n", data & DS4510_CFG_SWRST ? 1 : 0);
  169. printf("gpio pins: 3210\n");
  170. printf("---------------\n");
  171. printf("pullup ");
  172. tmp = ds4510_pullup_read(chip);
  173. if (tmp == -1)
  174. return tmp;
  175. for (i = DS4510_NUM_IO - 1; i >= 0; i--)
  176. printf("%d", (tmp & (1 << i)) ? 1 : 0);
  177. printf("\n");
  178. printf("driven ");
  179. tmp = ds4510_gpio_read(chip);
  180. if (tmp == -1)
  181. return -1;
  182. for (i = DS4510_NUM_IO - 1; i >= 0; i--)
  183. printf("%d", (tmp & (1 << i)) ? 1 : 0);
  184. printf("\n");
  185. printf("read ");
  186. tmp = ds4510_gpio_read_val(chip);
  187. if (tmp == -1)
  188. return -1;
  189. for (i = DS4510_NUM_IO - 1; i >= 0; i--)
  190. printf("%d", (tmp & (1 << i)) ? 1 : 0);
  191. printf("\n");
  192. return 0;
  193. }
  194. struct cmd_tbl cmd_ds4510[] = {
  195. U_BOOT_CMD_MKENT(device, 3, 0, (void *)DS4510_CMD_DEVICE, "", ""),
  196. U_BOOT_CMD_MKENT(nv, 3, 0, (void *)DS4510_CMD_NV, "", ""),
  197. U_BOOT_CMD_MKENT(output, 4, 0, (void *)DS4510_CMD_OUTPUT, "", ""),
  198. U_BOOT_CMD_MKENT(input, 3, 0, (void *)DS4510_CMD_INPUT, "", ""),
  199. U_BOOT_CMD_MKENT(pullup, 4, 0, (void *)DS4510_CMD_PULLUP, "", ""),
  200. U_BOOT_CMD_MKENT(info, 2, 0, (void *)DS4510_CMD_INFO, "", ""),
  201. U_BOOT_CMD_MKENT(rstdelay, 3, 0, (void *)DS4510_CMD_RSTDELAY, "", ""),
  202. U_BOOT_CMD_MKENT(eeprom, 6, 0, (void *)DS4510_CMD_EEPROM, "", ""),
  203. U_BOOT_CMD_MKENT(seeprom, 6, 0, (void *)DS4510_CMD_SEEPROM, "", ""),
  204. U_BOOT_CMD_MKENT(sram, 6, 0, (void *)DS4510_CMD_SRAM, "", ""),
  205. };
  206. int do_ds4510(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
  207. {
  208. static uint8_t chip = 0x51;
  209. struct cmd_tbl *c;
  210. ulong ul_arg2 = 0;
  211. ulong ul_arg3 = 0;
  212. int tmp;
  213. ulong addr;
  214. ulong off;
  215. ulong cnt;
  216. int end;
  217. int (*rw_func)(uint8_t, int, uint8_t *, int);
  218. c = find_cmd_tbl(argv[1], cmd_ds4510, ARRAY_SIZE(cmd_ds4510));
  219. /* All commands but "device" require 'maxargs' arguments */
  220. if (!c || !((argc == (c->maxargs)) ||
  221. (((int)c->cmd == DS4510_CMD_DEVICE) &&
  222. (argc == (c->maxargs - 1))))) {
  223. return cmd_usage(cmdtp);
  224. }
  225. /* arg2 used as chip addr and pin number */
  226. if (argc > 2)
  227. ul_arg2 = simple_strtoul(argv[2], NULL, 16);
  228. /* arg3 used as output/pullup value */
  229. if (argc > 3)
  230. ul_arg3 = simple_strtoul(argv[3], NULL, 16);
  231. switch ((int)c->cmd) {
  232. case DS4510_CMD_DEVICE:
  233. if (argc == 3)
  234. chip = ul_arg2;
  235. printf("Current device address: 0x%x\n", chip);
  236. return 0;
  237. case DS4510_CMD_NV:
  238. return ds4510_see_write(chip, ul_arg2);
  239. case DS4510_CMD_OUTPUT:
  240. tmp = ds4510_gpio_read(chip);
  241. if (tmp == -1)
  242. return -1;
  243. if (ul_arg3)
  244. tmp |= (1 << ul_arg2);
  245. else
  246. tmp &= ~(1 << ul_arg2);
  247. return ds4510_gpio_write(chip, tmp);
  248. case DS4510_CMD_INPUT:
  249. tmp = ds4510_gpio_read_val(chip);
  250. if (tmp == -1)
  251. return -1;
  252. return (tmp & (1 << ul_arg2)) != 0;
  253. case DS4510_CMD_PULLUP:
  254. tmp = ds4510_pullup_read(chip);
  255. if (tmp == -1)
  256. return -1;
  257. if (ul_arg3)
  258. tmp |= (1 << ul_arg2);
  259. else
  260. tmp &= ~(1 << ul_arg2);
  261. return ds4510_pullup_write(chip, tmp);
  262. case DS4510_CMD_INFO:
  263. return ds4510_info(chip);
  264. case DS4510_CMD_RSTDELAY:
  265. return ds4510_rstdelay_write(chip, ul_arg2);
  266. case DS4510_CMD_EEPROM:
  267. end = DS4510_EEPROM + DS4510_EEPROM_SIZE;
  268. off = DS4510_EEPROM;
  269. break;
  270. case DS4510_CMD_SEEPROM:
  271. end = DS4510_SEEPROM + DS4510_SEEPROM_SIZE;
  272. off = DS4510_SEEPROM;
  273. break;
  274. case DS4510_CMD_SRAM:
  275. end = DS4510_SRAM + DS4510_SRAM_SIZE;
  276. off = DS4510_SRAM;
  277. break;
  278. default:
  279. /* We should never get here... */
  280. return 1;
  281. }
  282. /* Only eeprom, seeprom, and sram commands should make it here */
  283. if (strcmp(argv[2], "read") == 0)
  284. rw_func = ds4510_mem_read;
  285. else if (strcmp(argv[2], "write") == 0)
  286. rw_func = ds4510_mem_write;
  287. else
  288. return cmd_usage(cmdtp);
  289. addr = simple_strtoul(argv[3], NULL, 16);
  290. off += simple_strtoul(argv[4], NULL, 16);
  291. cnt = simple_strtoul(argv[5], NULL, 16);
  292. if ((off + cnt) > end) {
  293. printf("ERROR: invalid len\n");
  294. return -1;
  295. }
  296. return rw_func(chip, off, (uint8_t *)addr, cnt);
  297. }
  298. U_BOOT_CMD(
  299. ds4510, 6, 1, do_ds4510,
  300. "ds4510 eeprom/seeprom/sram/gpio access",
  301. "device [dev]\n"
  302. " - show or set current device address\n"
  303. "ds4510 info\n"
  304. " - display ds4510 info\n"
  305. "ds4510 output pin 0|1\n"
  306. " - set pin low or high-Z\n"
  307. "ds4510 input pin\n"
  308. " - read value of pin\n"
  309. "ds4510 pullup pin 0|1\n"
  310. " - disable/enable pullup on specified pin\n"
  311. "ds4510 nv 0|1\n"
  312. " - make gpio and seeprom writes volatile/non-volatile"
  313. "\n"
  314. "ds4510 rstdelay 0-3\n"
  315. " - set reset output delay"
  316. "\n"
  317. "ds4510 eeprom read addr off cnt\n"
  318. "ds4510 eeprom write addr off cnt\n"
  319. " - read/write 'cnt' bytes at EEPROM offset 'off'\n"
  320. "ds4510 seeprom read addr off cnt\n"
  321. "ds4510 seeprom write addr off cnt\n"
  322. " - read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n"
  323. "ds4510 sram read addr off cnt\n"
  324. "ds4510 sram write addr off cnt\n"
  325. " - read/write 'cnt' bytes at SRAM offset 'off'"
  326. );