at91_i2c.h 1.8 KB

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  1. #ifndef _AT91_I2C_H
  2. #define _AT91_I2C_H
  3. #include <linux/bitops.h>
  4. #define TWI_CR_START BIT(0) /* Send a Start Condition */
  5. #define TWI_CR_MSEN BIT(2) /* Master Transfer Enable */
  6. #define TWI_CR_STOP BIT(1) /* Send a Stop Condition */
  7. #define TWI_CR_SVDIS BIT(5) /* Slave Transfer Disable */
  8. #define TWI_CR_SWRST BIT(7) /* Software Reset */
  9. #define TWI_CR_ACMEN BIT(16) /* Alternative Command Mode Enable */
  10. #define TWI_CR_ACMDIS BIT(17) /* Alternative Command Mode Disable */
  11. #define TWI_CR_LOCKCLR BIT(26) /* Lock Clear */
  12. #define TWI_MMR_MREAD BIT(12) /* Master Read Direction */
  13. #define TWI_MMR_IADRSZ_1 BIT(8) /* Internal Device Address Size */
  14. #define TWI_SR_TXCOMP BIT(0) /* Transmission Complete */
  15. #define TWI_SR_RXRDY BIT(1) /* Receive Holding Register Ready */
  16. #define TWI_SR_TXRDY BIT(2) /* Transmit Holding Register Ready */
  17. #define TWI_SR_OVRE BIT(6) /* Overrun Error */
  18. #define TWI_SR_UNRE BIT(7) /* Underrun Error */
  19. #define TWI_SR_NACK BIT(8) /* Not Acknowledged */
  20. #define TWI_SR_LOCK BIT(23) /* TWI Lock due to Frame Errors */
  21. #define TWI_ACR_DATAL(len) ((len) & 0xff)
  22. #define TWI_ACR_DIR_READ BIT(8)
  23. #define TWI_CWGR_HOLD_MAX 0x1f
  24. #define TWI_CWGR_HOLD(x) (((x) & TWI_CWGR_HOLD_MAX) << 24)
  25. struct at91_i2c_regs {
  26. u32 cr;
  27. u32 mmr;
  28. u32 smr;
  29. u32 iadr;
  30. u32 cwgr;
  31. u32 rev_0[3];
  32. u32 sr;
  33. u32 ier;
  34. u32 idr;
  35. u32 imr;
  36. u32 rhr;
  37. u32 thr;
  38. u32 smbtr;
  39. u32 rev_1;
  40. u32 acr;
  41. u32 filtr;
  42. u32 rev_2;
  43. u32 swmr;
  44. u32 fmr;
  45. u32 flr;
  46. u32 rev_3;
  47. u32 fsr;
  48. u32 fier;
  49. u32 fidr;
  50. u32 fimr;
  51. u32 rev_4[29];
  52. u32 wpmr;
  53. u32 wpsr;
  54. u32 rev_5[6];
  55. };
  56. struct at91_i2c_pdata {
  57. unsigned clk_max_div;
  58. unsigned clk_offset;
  59. };
  60. struct at91_i2c_bus {
  61. struct at91_i2c_regs *regs;
  62. u32 status;
  63. ulong bus_clk_rate;
  64. u32 clock_frequency;
  65. u32 speed;
  66. u32 cwgr_val;
  67. const struct at91_i2c_pdata *pdata;
  68. };
  69. #endif