msm_gpio.c 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Qualcomm GPIO driver
  4. *
  5. * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
  6. */
  7. #include <common.h>
  8. #include <dm.h>
  9. #include <errno.h>
  10. #include <asm/gpio.h>
  11. #include <asm/io.h>
  12. DECLARE_GLOBAL_DATA_PTR;
  13. /* Register offsets */
  14. #define GPIO_CONFIG_OFF(no) ((no) * 0x1000)
  15. #define GPIO_IN_OUT_OFF(no) ((no) * 0x1000 + 0x4)
  16. /* OE */
  17. #define GPIO_OE_DISABLE (0x0 << 9)
  18. #define GPIO_OE_ENABLE (0x1 << 9)
  19. #define GPIO_OE_MASK (0x1 << 9)
  20. /* GPIO_IN_OUT register shifts. */
  21. #define GPIO_IN 0
  22. #define GPIO_OUT 1
  23. struct msm_gpio_bank {
  24. phys_addr_t base;
  25. };
  26. static int msm_gpio_direction_input(struct udevice *dev, unsigned int gpio)
  27. {
  28. struct msm_gpio_bank *priv = dev_get_priv(dev);
  29. phys_addr_t reg = priv->base + GPIO_CONFIG_OFF(gpio);
  30. /* Disable OE bit */
  31. clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_DISABLE);
  32. return 0;
  33. }
  34. static int msm_gpio_set_value(struct udevice *dev, unsigned gpio, int value)
  35. {
  36. struct msm_gpio_bank *priv = dev_get_priv(dev);
  37. value = !!value;
  38. /* set value */
  39. writel(value << GPIO_OUT, priv->base + GPIO_IN_OUT_OFF(gpio));
  40. return 0;
  41. }
  42. static int msm_gpio_direction_output(struct udevice *dev, unsigned gpio,
  43. int value)
  44. {
  45. struct msm_gpio_bank *priv = dev_get_priv(dev);
  46. phys_addr_t reg = priv->base + GPIO_CONFIG_OFF(gpio);
  47. value = !!value;
  48. /* set value */
  49. writel(value << GPIO_OUT, priv->base + GPIO_IN_OUT_OFF(gpio));
  50. /* switch direction */
  51. clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE);
  52. return 0;
  53. }
  54. static int msm_gpio_get_value(struct udevice *dev, unsigned gpio)
  55. {
  56. struct msm_gpio_bank *priv = dev_get_priv(dev);
  57. return !!(readl(priv->base + GPIO_IN_OUT_OFF(gpio)) >> GPIO_IN);
  58. }
  59. static int msm_gpio_get_function(struct udevice *dev, unsigned offset)
  60. {
  61. struct msm_gpio_bank *priv = dev_get_priv(dev);
  62. if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE)
  63. return GPIOF_OUTPUT;
  64. return GPIOF_INPUT;
  65. }
  66. static const struct dm_gpio_ops gpio_msm_ops = {
  67. .direction_input = msm_gpio_direction_input,
  68. .direction_output = msm_gpio_direction_output,
  69. .get_value = msm_gpio_get_value,
  70. .set_value = msm_gpio_set_value,
  71. .get_function = msm_gpio_get_function,
  72. };
  73. static int msm_gpio_probe(struct udevice *dev)
  74. {
  75. struct msm_gpio_bank *priv = dev_get_priv(dev);
  76. priv->base = dev_read_addr(dev);
  77. return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0;
  78. }
  79. static int msm_gpio_ofdata_to_platdata(struct udevice *dev)
  80. {
  81. struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  82. uc_priv->gpio_count = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
  83. "gpio-count", 0);
  84. uc_priv->bank_name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
  85. "gpio-bank-name", NULL);
  86. if (uc_priv->bank_name == NULL)
  87. uc_priv->bank_name = "soc";
  88. return 0;
  89. }
  90. static const struct udevice_id msm_gpio_ids[] = {
  91. { .compatible = "qcom,msm8916-pinctrl" },
  92. { .compatible = "qcom,apq8016-pinctrl" },
  93. { .compatible = "qcom,ipq4019-pinctrl" },
  94. { }
  95. };
  96. U_BOOT_DRIVER(gpio_msm) = {
  97. .name = "gpio_msm",
  98. .id = UCLASS_GPIO,
  99. .of_match = msm_gpio_ids,
  100. .ofdata_to_platdata = msm_gpio_ofdata_to_platdata,
  101. .probe = msm_gpio_probe,
  102. .ops = &gpio_msm_ops,
  103. .priv_auto_alloc_size = sizeof(struct msm_gpio_bank),
  104. };