kona_gpio.c 3.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2013 Broadcom Corporation.
  4. */
  5. #include <common.h>
  6. #include <malloc.h>
  7. #include <asm/io.h>
  8. #include <asm/arch/sysmap.h>
  9. #define GPIO_BASE (void *)GPIO2_BASE_ADDR
  10. #define GPIO_PASSWD 0x00a5a501
  11. #define GPIO_PER_BANK 32
  12. #define GPIO_MAX_BANK_NUM 8
  13. #define GPIO_BANK(gpio) ((gpio) >> 5)
  14. #define GPIO_BITMASK(gpio) \
  15. (1UL << ((gpio) & (GPIO_PER_BANK - 1)))
  16. #define GPIO_OUT_STATUS(bank) (0x00000000 + ((bank) << 2))
  17. #define GPIO_IN_STATUS(bank) (0x00000020 + ((bank) << 2))
  18. #define GPIO_OUT_SET(bank) (0x00000040 + ((bank) << 2))
  19. #define GPIO_OUT_CLEAR(bank) (0x00000060 + ((bank) << 2))
  20. #define GPIO_INT_STATUS(bank) (0x00000080 + ((bank) << 2))
  21. #define GPIO_INT_MASK(bank) (0x000000a0 + ((bank) << 2))
  22. #define GPIO_INT_MSKCLR(bank) (0x000000c0 + ((bank) << 2))
  23. #define GPIO_CONTROL(bank) (0x00000100 + ((bank) << 2))
  24. #define GPIO_PWD_STATUS(bank) (0x00000500 + ((bank) << 2))
  25. #define GPIO_GPPWR_OFFSET 0x00000520
  26. #define GPIO_GPCTR0_DBR_SHIFT 5
  27. #define GPIO_GPCTR0_DBR_MASK 0x000001e0
  28. #define GPIO_GPCTR0_ITR_SHIFT 3
  29. #define GPIO_GPCTR0_ITR_MASK 0x00000018
  30. #define GPIO_GPCTR0_ITR_CMD_RISING_EDGE 0x00000001
  31. #define GPIO_GPCTR0_ITR_CMD_FALLING_EDGE 0x00000002
  32. #define GPIO_GPCTR0_ITR_CMD_BOTH_EDGE 0x00000003
  33. #define GPIO_GPCTR0_IOTR_MASK 0x00000001
  34. #define GPIO_GPCTR0_IOTR_CMD_0UTPUT 0x00000000
  35. #define GPIO_GPCTR0_IOTR_CMD_INPUT 0x00000001
  36. int gpio_request(unsigned gpio, const char *label)
  37. {
  38. unsigned int value, off;
  39. writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
  40. off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
  41. value = readl(GPIO_BASE + off) & ~GPIO_BITMASK(gpio);
  42. writel(value, GPIO_BASE + off);
  43. return 0;
  44. }
  45. int gpio_free(unsigned gpio)
  46. {
  47. unsigned int value, off;
  48. writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
  49. off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
  50. value = readl(GPIO_BASE + off) | GPIO_BITMASK(gpio);
  51. writel(value, GPIO_BASE + off);
  52. return 0;
  53. }
  54. int gpio_direction_input(unsigned gpio)
  55. {
  56. u32 val;
  57. val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
  58. val &= ~GPIO_GPCTR0_IOTR_MASK;
  59. val |= GPIO_GPCTR0_IOTR_CMD_INPUT;
  60. writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
  61. return 0;
  62. }
  63. int gpio_direction_output(unsigned gpio, int value)
  64. {
  65. int bank_id = GPIO_BANK(gpio);
  66. int bitmask = GPIO_BITMASK(gpio);
  67. u32 val, off;
  68. val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
  69. val &= ~GPIO_GPCTR0_IOTR_MASK;
  70. val |= GPIO_GPCTR0_IOTR_CMD_0UTPUT;
  71. writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
  72. off = value ? GPIO_OUT_SET(bank_id) : GPIO_OUT_CLEAR(bank_id);
  73. val = readl(GPIO_BASE + off);
  74. val |= bitmask;
  75. writel(val, GPIO_BASE + off);
  76. return 0;
  77. }
  78. int gpio_get_value(unsigned gpio)
  79. {
  80. int bank_id = GPIO_BANK(gpio);
  81. int bitmask = GPIO_BITMASK(gpio);
  82. u32 val, off;
  83. /* determine the GPIO pin direction */
  84. val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
  85. val &= GPIO_GPCTR0_IOTR_MASK;
  86. /* read the GPIO bank status */
  87. off = (GPIO_GPCTR0_IOTR_CMD_INPUT == val) ?
  88. GPIO_IN_STATUS(bank_id) : GPIO_OUT_STATUS(bank_id);
  89. val = readl(GPIO_BASE + off);
  90. /* return the specified bit status */
  91. return !!(val & bitmask);
  92. }
  93. void gpio_set_value(unsigned gpio, int value)
  94. {
  95. int bank_id = GPIO_BANK(gpio);
  96. int bitmask = GPIO_BITMASK(gpio);
  97. u32 val, off;
  98. /* determine the GPIO pin direction */
  99. val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
  100. val &= GPIO_GPCTR0_IOTR_MASK;
  101. /* this function only applies to output pin */
  102. if (GPIO_GPCTR0_IOTR_CMD_INPUT == val) {
  103. printf("%s: Cannot set an input pin %d\n", __func__, gpio);
  104. return;
  105. }
  106. off = value ? GPIO_OUT_SET(bank_id) : GPIO_OUT_CLEAR(bank_id);
  107. val = readl(GPIO_BASE + off);
  108. val |= bitmask;
  109. writel(val, GPIO_BASE + off);
  110. }