imx_rgpio2p.c 5.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2016 Freescale Semiconductor, Inc.
  4. *
  5. * RGPIO2P driver for the Freescale i.MX7ULP.
  6. */
  7. #include <common.h>
  8. #include <dm.h>
  9. #include <errno.h>
  10. #include <fdtdec.h>
  11. #include <asm/gpio.h>
  12. #include <asm/io.h>
  13. #include <malloc.h>
  14. enum imx_rgpio2p_direction {
  15. IMX_RGPIO2P_DIRECTION_IN,
  16. IMX_RGPIO2P_DIRECTION_OUT,
  17. };
  18. #define GPIO_PER_BANK 32
  19. struct imx_rgpio2p_data {
  20. struct gpio_regs *regs;
  21. };
  22. struct imx_rgpio2p_plat {
  23. int bank_index;
  24. struct gpio_regs *regs;
  25. };
  26. static int imx_rgpio2p_is_output(struct gpio_regs *regs, int offset)
  27. {
  28. u32 val;
  29. val = readl(&regs->gpio_pddr);
  30. return val & (1 << offset) ? 1 : 0;
  31. }
  32. static void imx_rgpio2p_bank_direction(struct gpio_regs *regs, int offset,
  33. enum imx_rgpio2p_direction direction)
  34. {
  35. u32 l;
  36. l = readl(&regs->gpio_pddr);
  37. switch (direction) {
  38. case IMX_RGPIO2P_DIRECTION_OUT:
  39. l |= 1 << offset;
  40. break;
  41. case IMX_RGPIO2P_DIRECTION_IN:
  42. l &= ~(1 << offset);
  43. }
  44. writel(l, &regs->gpio_pddr);
  45. }
  46. static void imx_rgpio2p_bank_set_value(struct gpio_regs *regs, int offset,
  47. int value)
  48. {
  49. if (value)
  50. writel((1 << offset), &regs->gpio_psor);
  51. else
  52. writel((1 << offset), &regs->gpio_pcor);
  53. }
  54. static int imx_rgpio2p_bank_get_value(struct gpio_regs *regs, int offset)
  55. {
  56. return (readl(&regs->gpio_pdir) >> offset) & 0x01;
  57. }
  58. static int imx_rgpio2p_direction_input(struct udevice *dev, unsigned offset)
  59. {
  60. struct imx_rgpio2p_data *bank = dev_get_priv(dev);
  61. /* Configure GPIO direction as input. */
  62. imx_rgpio2p_bank_direction(bank->regs, offset, IMX_RGPIO2P_DIRECTION_IN);
  63. return 0;
  64. }
  65. static int imx_rgpio2p_direction_output(struct udevice *dev, unsigned offset,
  66. int value)
  67. {
  68. struct imx_rgpio2p_data *bank = dev_get_priv(dev);
  69. /* Configure GPIO output value. */
  70. imx_rgpio2p_bank_set_value(bank->regs, offset, value);
  71. /* Configure GPIO direction as output. */
  72. imx_rgpio2p_bank_direction(bank->regs, offset, IMX_RGPIO2P_DIRECTION_OUT);
  73. return 0;
  74. }
  75. static int imx_rgpio2p_get_value(struct udevice *dev, unsigned offset)
  76. {
  77. struct imx_rgpio2p_data *bank = dev_get_priv(dev);
  78. return imx_rgpio2p_bank_get_value(bank->regs, offset);
  79. }
  80. static int imx_rgpio2p_set_value(struct udevice *dev, unsigned offset,
  81. int value)
  82. {
  83. struct imx_rgpio2p_data *bank = dev_get_priv(dev);
  84. imx_rgpio2p_bank_set_value(bank->regs, offset, value);
  85. return 0;
  86. }
  87. static int imx_rgpio2p_get_function(struct udevice *dev, unsigned offset)
  88. {
  89. struct imx_rgpio2p_data *bank = dev_get_priv(dev);
  90. /* GPIOF_FUNC is not implemented yet */
  91. if (imx_rgpio2p_is_output(bank->regs, offset))
  92. return GPIOF_OUTPUT;
  93. else
  94. return GPIOF_INPUT;
  95. }
  96. static const struct dm_gpio_ops imx_rgpio2p_ops = {
  97. .direction_input = imx_rgpio2p_direction_input,
  98. .direction_output = imx_rgpio2p_direction_output,
  99. .get_value = imx_rgpio2p_get_value,
  100. .set_value = imx_rgpio2p_set_value,
  101. .get_function = imx_rgpio2p_get_function,
  102. };
  103. static int imx_rgpio2p_probe(struct udevice *dev)
  104. {
  105. struct imx_rgpio2p_data *bank = dev_get_priv(dev);
  106. struct imx_rgpio2p_plat *plat = dev_get_platdata(dev);
  107. struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  108. int banknum;
  109. char name[18], *str;
  110. banknum = plat->bank_index;
  111. sprintf(name, "GPIO%d_", banknum + 1);
  112. str = strdup(name);
  113. if (!str)
  114. return -ENOMEM;
  115. uc_priv->bank_name = str;
  116. uc_priv->gpio_count = GPIO_PER_BANK;
  117. bank->regs = plat->regs;
  118. return 0;
  119. }
  120. static int imx_rgpio2p_bind(struct udevice *dev)
  121. {
  122. struct imx_rgpio2p_plat *plat = dev->platdata;
  123. fdt_addr_t addr;
  124. /*
  125. * If platdata already exsits, directly return.
  126. * Actually only when DT is not supported, platdata
  127. * is statically initialized in U_BOOT_DEVICES.Here
  128. * will return.
  129. */
  130. if (plat)
  131. return 0;
  132. addr = devfdt_get_addr_index(dev, 1);
  133. if (addr == FDT_ADDR_T_NONE)
  134. return -EINVAL;
  135. /*
  136. * TODO:
  137. * When every board is converted to driver model and DT is supported,
  138. * this can be done by auto-alloc feature, but not using calloc
  139. * to alloc memory for platdata.
  140. *
  141. * For example imx_rgpio2p_plat uses platform data rather than device
  142. * tree.
  143. *
  144. * NOTE: DO NOT COPY this code if you are using device tree.
  145. */
  146. plat = calloc(1, sizeof(*plat));
  147. if (!plat)
  148. return -ENOMEM;
  149. plat->regs = (struct gpio_regs *)addr;
  150. plat->bank_index = dev->req_seq;
  151. dev->platdata = plat;
  152. return 0;
  153. }
  154. static const struct udevice_id imx_rgpio2p_ids[] = {
  155. { .compatible = "fsl,imx7ulp-gpio" },
  156. { }
  157. };
  158. U_BOOT_DRIVER(imx_rgpio2p) = {
  159. .name = "imx_rgpio2p",
  160. .id = UCLASS_GPIO,
  161. .ops = &imx_rgpio2p_ops,
  162. .probe = imx_rgpio2p_probe,
  163. .priv_auto_alloc_size = sizeof(struct imx_rgpio2p_plat),
  164. .of_match = imx_rgpio2p_ids,
  165. .bind = imx_rgpio2p_bind,
  166. };
  167. #if !CONFIG_IS_ENABLED(OF_CONTROL)
  168. static const struct imx_rgpio2p_plat imx_plat[] = {
  169. { 0, (struct gpio_regs *)RGPIO2P_GPIO1_BASE_ADDR },
  170. { 1, (struct gpio_regs *)RGPIO2P_GPIO2_BASE_ADDR },
  171. { 2, (struct gpio_regs *)RGPIO2P_GPIO3_BASE_ADDR },
  172. { 3, (struct gpio_regs *)RGPIO2P_GPIO4_BASE_ADDR },
  173. { 4, (struct gpio_regs *)RGPIO2P_GPIO5_BASE_ADDR },
  174. { 5, (struct gpio_regs *)RGPIO2P_GPIO6_BASE_ADDR },
  175. };
  176. U_BOOT_DEVICES(imx_rgpio2ps) = {
  177. { "imx_rgpio2p", &imx_plat[0] },
  178. { "imx_rgpio2p", &imx_plat[1] },
  179. { "imx_rgpio2p", &imx_plat[2] },
  180. { "imx_rgpio2p", &imx_plat[3] },
  181. { "imx_rgpio2p", &imx_plat[4] },
  182. { "imx_rgpio2p", &imx_plat[5] },
  183. };
  184. #endif