socfpga.c 1.7 KB

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  1. // SPDX-License-Identifier: BSD-3-Clause
  2. /*
  3. * Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
  4. * All rights reserved.
  5. */
  6. #include <common.h>
  7. #include <asm/io.h>
  8. #include <linux/errno.h>
  9. #include <asm/arch/fpga_manager.h>
  10. #include <asm/arch/reset_manager.h>
  11. #include <asm/arch/system_manager.h>
  12. /* Timeout count */
  13. #define FPGA_TIMEOUT_CNT 0x1000000
  14. static struct socfpga_fpga_manager *fpgamgr_regs =
  15. (struct socfpga_fpga_manager *)SOCFPGA_FPGAMGRREGS_ADDRESS;
  16. int fpgamgr_dclkcnt_set(unsigned long cnt)
  17. {
  18. unsigned long i;
  19. /* Clear any existing done status */
  20. if (readl(&fpgamgr_regs->dclkstat))
  21. writel(0x1, &fpgamgr_regs->dclkstat);
  22. /* Write the dclkcnt */
  23. writel(cnt, &fpgamgr_regs->dclkcnt);
  24. /* Wait till the dclkcnt done */
  25. for (i = 0; i < FPGA_TIMEOUT_CNT; i++) {
  26. if (!readl(&fpgamgr_regs->dclkstat))
  27. continue;
  28. writel(0x1, &fpgamgr_regs->dclkstat);
  29. return 0;
  30. }
  31. return -ETIMEDOUT;
  32. }
  33. /* Write the RBF data to FPGA Manager */
  34. void fpgamgr_program_write(const void *rbf_data, size_t rbf_size)
  35. {
  36. uint32_t src = (uint32_t)rbf_data;
  37. uint32_t dst = SOCFPGA_FPGAMGRDATA_ADDRESS;
  38. /* Number of loops for 32-byte long copying. */
  39. uint32_t loops32 = rbf_size / 32;
  40. /* Number of loops for 4-byte long copying + trailing bytes */
  41. uint32_t loops4 = DIV_ROUND_UP(rbf_size % 32, 4);
  42. asm volatile(
  43. " cmp %2, #0\n"
  44. " beq 2f\n"
  45. "1: ldmia %0!, {r0-r7}\n"
  46. " stmia %1!, {r0-r7}\n"
  47. " sub %1, #32\n"
  48. " subs %2, #1\n"
  49. " bne 1b\n"
  50. "2: cmp %3, #0\n"
  51. " beq 4f\n"
  52. "3: ldr %2, [%0], #4\n"
  53. " str %2, [%1]\n"
  54. " subs %3, #1\n"
  55. " bne 3b\n"
  56. "4: nop\n"
  57. : "+r"(src), "+r"(dst), "+r"(loops32), "+r"(loops4) :
  58. : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "cc");
  59. }