cyclon2.c 5.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2006
  4. * Heiko Schocher, hs@denx.de
  5. * Based on ACE1XK.c
  6. */
  7. #include <common.h> /* core U-Boot definitions */
  8. #include <altera.h>
  9. #include <ACEX1K.h> /* ACEX device family */
  10. #include <linux/delay.h>
  11. /* Define FPGA_DEBUG to get debug printf's */
  12. #ifdef FPGA_DEBUG
  13. #define PRINTF(fmt, args...) printf(fmt, ##args)
  14. #else
  15. #define PRINTF(fmt, args...)
  16. #endif
  17. /* Note: The assumption is that we cannot possibly run fast enough to
  18. * overrun the device (the Slave Parallel mode can free run at 50MHz).
  19. * If there is a need to operate slower, define CONFIG_FPGA_DELAY in
  20. * the board config file to slow things down.
  21. */
  22. #ifndef CONFIG_FPGA_DELAY
  23. #define CONFIG_FPGA_DELAY()
  24. #endif
  25. #ifndef CONFIG_SYS_FPGA_WAIT
  26. #define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ / 10 /* 100 ms */
  27. #endif
  28. static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize);
  29. static int CYC2_ps_dump(Altera_desc *desc, const void *buf, size_t bsize);
  30. /* static int CYC2_ps_info( Altera_desc *desc ); */
  31. /* ------------------------------------------------------------------------- */
  32. /* CYCLON2 Generic Implementation */
  33. int CYC2_load(Altera_desc *desc, const void *buf, size_t bsize)
  34. {
  35. int ret_val = FPGA_FAIL;
  36. switch (desc->iface) {
  37. case passive_serial:
  38. PRINTF("%s: Launching Passive Serial Loader\n", __func__);
  39. ret_val = CYC2_ps_load(desc, buf, bsize);
  40. break;
  41. case fast_passive_parallel:
  42. /* Fast Passive Parallel (FPP) and PS only differ in what is
  43. * done in the write() callback. Use the existing PS load
  44. * function for FPP, too.
  45. */
  46. PRINTF("%s: Launching Fast Passive Parallel Loader\n",
  47. __func__);
  48. ret_val = CYC2_ps_load(desc, buf, bsize);
  49. break;
  50. /* Add new interface types here */
  51. default:
  52. printf("%s: Unsupported interface type, %d\n",
  53. __func__, desc->iface);
  54. }
  55. return ret_val;
  56. }
  57. int CYC2_dump(Altera_desc *desc, const void *buf, size_t bsize)
  58. {
  59. int ret_val = FPGA_FAIL;
  60. switch (desc->iface) {
  61. case passive_serial:
  62. PRINTF("%s: Launching Passive Serial Dump\n", __func__);
  63. ret_val = CYC2_ps_dump(desc, buf, bsize);
  64. break;
  65. /* Add new interface types here */
  66. default:
  67. printf("%s: Unsupported interface type, %d\n",
  68. __func__, desc->iface);
  69. }
  70. return ret_val;
  71. }
  72. int CYC2_info(Altera_desc *desc)
  73. {
  74. return FPGA_SUCCESS;
  75. }
  76. /* ------------------------------------------------------------------------- */
  77. /* CYCLON2 Passive Serial Generic Implementation */
  78. static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize)
  79. {
  80. int ret_val = FPGA_FAIL; /* assume the worst */
  81. Altera_CYC2_Passive_Serial_fns *fn = desc->iface_fns;
  82. int ret = 0;
  83. PRINTF("%s: start with interface functions @ 0x%p\n",
  84. __func__, fn);
  85. if (fn) {
  86. int cookie = desc->cookie; /* make a local copy */
  87. unsigned long ts; /* timestamp */
  88. PRINTF("%s: Function Table:\n"
  89. "ptr:\t0x%p\n"
  90. "struct: 0x%p\n"
  91. "config:\t0x%p\n"
  92. "status:\t0x%p\n"
  93. "write:\t0x%p\n"
  94. "done:\t0x%p\n\n",
  95. __func__, &fn, fn, fn->config, fn->status,
  96. fn->write, fn->done);
  97. #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
  98. printf("Loading FPGA Device %d...", cookie);
  99. #endif
  100. /*
  101. * Run the pre configuration function if there is one.
  102. */
  103. if (*fn->pre)
  104. (*fn->pre) (cookie);
  105. /* Establish the initial state */
  106. (*fn->config) (false, true, cookie); /* De-assert nCONFIG */
  107. udelay(100);
  108. (*fn->config) (true, true, cookie); /* Assert nCONFIG */
  109. udelay(2); /* T_cfg > 2us */
  110. /* Wait for nSTATUS to be asserted */
  111. ts = get_timer(0); /* get current time */
  112. do {
  113. CONFIG_FPGA_DELAY();
  114. if (get_timer(ts) > CONFIG_SYS_FPGA_WAIT) {
  115. /* check the time */
  116. puts("** Timeout waiting for STATUS to go high.\n");
  117. (*fn->abort) (cookie);
  118. return FPGA_FAIL;
  119. }
  120. } while (!(*fn->status) (cookie));
  121. /* Get ready for the burn */
  122. CONFIG_FPGA_DELAY();
  123. ret = (*fn->write) (buf, bsize, true, cookie);
  124. if (ret) {
  125. puts("** Write failed.\n");
  126. (*fn->abort) (cookie);
  127. return FPGA_FAIL;
  128. }
  129. #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
  130. puts(" OK? ...");
  131. #endif
  132. CONFIG_FPGA_DELAY();
  133. #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
  134. putc(' '); /* terminate the dotted line */
  135. #endif
  136. /*
  137. * Checking FPGA's CONF_DONE signal - correctly booted ?
  138. */
  139. if (!(*fn->done) (cookie)) {
  140. puts("** Booting failed! CONF_DONE is still deasserted.\n");
  141. (*fn->abort) (cookie);
  142. return FPGA_FAIL;
  143. }
  144. #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
  145. puts(" OK\n");
  146. #endif
  147. ret_val = FPGA_SUCCESS;
  148. #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
  149. if (ret_val == FPGA_SUCCESS)
  150. puts("Done.\n");
  151. else
  152. puts("Fail.\n");
  153. #endif
  154. /*
  155. * Run the post configuration function if there is one.
  156. */
  157. if (*fn->post)
  158. (*fn->post) (cookie);
  159. } else {
  160. printf("%s: NULL Interface function table!\n", __func__);
  161. }
  162. return ret_val;
  163. }
  164. static int CYC2_ps_dump(Altera_desc *desc, const void *buf, size_t bsize)
  165. {
  166. /* Readback is only available through the Slave Parallel and */
  167. /* boundary-scan interfaces. */
  168. printf("%s: Passive Serial Dumping is unavailable\n", __func__);
  169. return FPGA_FAIL;
  170. }