altera.c 4.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2003
  4. * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de
  5. *
  6. * (C) Copyright 2002
  7. * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  8. */
  9. /*
  10. * Altera FPGA support
  11. */
  12. #include <common.h>
  13. #include <errno.h>
  14. #include <ACEX1K.h>
  15. #include <log.h>
  16. #include <stratixII.h>
  17. /* Define FPGA_DEBUG to 1 to get debug printf's */
  18. #define FPGA_DEBUG 0
  19. static const struct altera_fpga {
  20. enum altera_family family;
  21. const char *name;
  22. int (*load)(Altera_desc *, const void *, size_t);
  23. int (*dump)(Altera_desc *, const void *, size_t);
  24. int (*info)(Altera_desc *);
  25. } altera_fpga[] = {
  26. #if defined(CONFIG_FPGA_ACEX1K)
  27. { Altera_ACEX1K, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info },
  28. { Altera_CYC2, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info },
  29. #elif defined(CONFIG_FPGA_CYCLON2)
  30. { Altera_ACEX1K, "CycloneII", CYC2_load, CYC2_dump, CYC2_info },
  31. { Altera_CYC2, "CycloneII", CYC2_load, CYC2_dump, CYC2_info },
  32. #endif
  33. #if defined(CONFIG_FPGA_STRATIX_II)
  34. { Altera_StratixII, "StratixII", StratixII_load,
  35. StratixII_dump, StratixII_info },
  36. #endif
  37. #if defined(CONFIG_FPGA_STRATIX_V)
  38. { Altera_StratixV, "StratixV", stratixv_load, NULL, NULL },
  39. #endif
  40. #if defined(CONFIG_FPGA_SOCFPGA)
  41. { Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL },
  42. #endif
  43. #if defined(CONFIG_FPGA_INTEL_SDM_MAILBOX)
  44. { Intel_FPGA_SDM_Mailbox, "Intel SDM Mailbox", intel_sdm_mb_load, NULL,
  45. NULL },
  46. #endif
  47. };
  48. static int altera_validate(Altera_desc *desc, const char *fn)
  49. {
  50. if (!desc) {
  51. printf("%s: NULL descriptor!\n", fn);
  52. return -EINVAL;
  53. }
  54. if ((desc->family < min_altera_type) ||
  55. (desc->family > max_altera_type)) {
  56. printf("%s: Invalid family type, %d\n", fn, desc->family);
  57. return -EINVAL;
  58. }
  59. if ((desc->iface < min_altera_iface_type) ||
  60. (desc->iface > max_altera_iface_type)) {
  61. printf("%s: Invalid Interface type, %d\n", fn, desc->iface);
  62. return -EINVAL;
  63. }
  64. if (!desc->size) {
  65. printf("%s: NULL part size\n", fn);
  66. return -EINVAL;
  67. }
  68. return 0;
  69. }
  70. static const struct altera_fpga *
  71. altera_desc_to_fpga(Altera_desc *desc, const char *fn)
  72. {
  73. int i;
  74. if (altera_validate(desc, fn)) {
  75. printf("%s: Invalid device descriptor\n", fn);
  76. return NULL;
  77. }
  78. for (i = 0; i < ARRAY_SIZE(altera_fpga); i++) {
  79. if (desc->family == altera_fpga[i].family)
  80. break;
  81. }
  82. if (i == ARRAY_SIZE(altera_fpga)) {
  83. printf("%s: Unsupported family type, %d\n", fn, desc->family);
  84. return NULL;
  85. }
  86. return &altera_fpga[i];
  87. }
  88. int altera_load(Altera_desc *desc, const void *buf, size_t bsize)
  89. {
  90. const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
  91. if (!fpga)
  92. return FPGA_FAIL;
  93. debug_cond(FPGA_DEBUG, "%s: Launching the %s Loader...\n",
  94. __func__, fpga->name);
  95. if (fpga->load)
  96. return fpga->load(desc, buf, bsize);
  97. return 0;
  98. }
  99. int altera_dump(Altera_desc *desc, const void *buf, size_t bsize)
  100. {
  101. const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
  102. if (!fpga)
  103. return FPGA_FAIL;
  104. debug_cond(FPGA_DEBUG, "%s: Launching the %s Reader...\n",
  105. __func__, fpga->name);
  106. if (fpga->dump)
  107. return fpga->dump(desc, buf, bsize);
  108. return 0;
  109. }
  110. int altera_info(Altera_desc *desc)
  111. {
  112. const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
  113. if (!fpga)
  114. return FPGA_FAIL;
  115. printf("Family: \t%s\n", fpga->name);
  116. printf("Interface type:\t");
  117. switch (desc->iface) {
  118. case passive_serial:
  119. printf("Passive Serial (PS)\n");
  120. break;
  121. case passive_parallel_synchronous:
  122. printf("Passive Parallel Synchronous (PPS)\n");
  123. break;
  124. case passive_parallel_asynchronous:
  125. printf("Passive Parallel Asynchronous (PPA)\n");
  126. break;
  127. case passive_serial_asynchronous:
  128. printf("Passive Serial Asynchronous (PSA)\n");
  129. break;
  130. case altera_jtag_mode: /* Not used */
  131. printf("JTAG Mode\n");
  132. break;
  133. case fast_passive_parallel:
  134. printf("Fast Passive Parallel (FPP)\n");
  135. break;
  136. case fast_passive_parallel_security:
  137. printf("Fast Passive Parallel with Security (FPPS)\n");
  138. break;
  139. case secure_device_manager_mailbox:
  140. puts("Secure Device Manager (SDM) Mailbox\n");
  141. break;
  142. /* Add new interface types here */
  143. default:
  144. printf("Unsupported interface type, %d\n", desc->iface);
  145. }
  146. printf("Device Size: \t%zd bytes\n"
  147. "Cookie: \t0x%x (%d)\n",
  148. desc->size, desc->cookie, desc->cookie);
  149. if (desc->iface_fns) {
  150. printf("Device Function Table @ 0x%p\n", desc->iface_fns);
  151. if (fpga->info)
  152. fpga->info(desc);
  153. } else {
  154. printf("No Device Function Table.\n");
  155. }
  156. return FPGA_SUCCESS;
  157. }