clk-imx8qm.c 7.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2018 NXP
  4. * Peng Fan <peng.fan@nxp.com>
  5. */
  6. #include <common.h>
  7. #include <clk-uclass.h>
  8. #include <dm.h>
  9. #include <log.h>
  10. #include <asm/arch/sci/sci.h>
  11. #include <asm/arch/clock.h>
  12. #include <dt-bindings/clock/imx8qm-clock.h>
  13. #include <dt-bindings/soc/imx_rsrc.h>
  14. #include <misc.h>
  15. #include "clk-imx8.h"
  16. #if CONFIG_IS_ENABLED(CMD_CLK)
  17. struct imx8_clks imx8_clk_names[] = {
  18. { IMX8QM_A53_DIV, "A53_DIV" },
  19. { IMX8QM_UART0_CLK, "UART0" },
  20. { IMX8QM_UART1_CLK, "UART1" },
  21. { IMX8QM_UART2_CLK, "UART2" },
  22. { IMX8QM_UART3_CLK, "UART3" },
  23. { IMX8QM_SDHC0_CLK, "SDHC0" },
  24. { IMX8QM_SDHC1_CLK, "SDHC1" },
  25. { IMX8QM_SDHC2_CLK, "SDHC2" },
  26. { IMX8QM_ENET0_AHB_CLK, "ENET0_AHB" },
  27. { IMX8QM_ENET0_IPG_CLK, "ENET0_IPG" },
  28. { IMX8QM_ENET0_REF_DIV, "ENET0_REF" },
  29. { IMX8QM_ENET0_PTP_CLK, "ENET0_PTP" },
  30. { IMX8QM_ENET1_AHB_CLK, "ENET1_AHB" },
  31. { IMX8QM_ENET1_IPG_CLK, "ENET1_IPG" },
  32. { IMX8QM_ENET1_REF_DIV, "ENET1_REF" },
  33. { IMX8QM_ENET1_PTP_CLK, "ENET1_PTP" },
  34. };
  35. int num_clks = ARRAY_SIZE(imx8_clk_names);
  36. #endif
  37. ulong imx8_clk_get_rate(struct clk *clk)
  38. {
  39. sc_pm_clk_t pm_clk;
  40. ulong rate;
  41. u16 resource;
  42. int ret;
  43. debug("%s(#%lu)\n", __func__, clk->id);
  44. switch (clk->id) {
  45. case IMX8QM_A53_DIV:
  46. resource = SC_R_A53;
  47. pm_clk = SC_PM_CLK_CPU;
  48. break;
  49. case IMX8QM_I2C0_IPG_CLK:
  50. case IMX8QM_I2C0_CLK:
  51. case IMX8QM_I2C0_DIV:
  52. resource = SC_R_I2C_0;
  53. pm_clk = SC_PM_CLK_PER;
  54. break;
  55. case IMX8QM_I2C1_IPG_CLK:
  56. case IMX8QM_I2C1_CLK:
  57. case IMX8QM_I2C1_DIV:
  58. resource = SC_R_I2C_1;
  59. pm_clk = SC_PM_CLK_PER;
  60. break;
  61. case IMX8QM_I2C2_IPG_CLK:
  62. case IMX8QM_I2C2_CLK:
  63. case IMX8QM_I2C2_DIV:
  64. resource = SC_R_I2C_2;
  65. pm_clk = SC_PM_CLK_PER;
  66. break;
  67. case IMX8QM_I2C3_IPG_CLK:
  68. case IMX8QM_I2C3_CLK:
  69. case IMX8QM_I2C3_DIV:
  70. resource = SC_R_I2C_3;
  71. pm_clk = SC_PM_CLK_PER;
  72. break;
  73. case IMX8QM_SDHC0_IPG_CLK:
  74. case IMX8QM_SDHC0_CLK:
  75. case IMX8QM_SDHC0_DIV:
  76. resource = SC_R_SDHC_0;
  77. pm_clk = SC_PM_CLK_PER;
  78. break;
  79. case IMX8QM_SDHC1_IPG_CLK:
  80. case IMX8QM_SDHC1_CLK:
  81. case IMX8QM_SDHC1_DIV:
  82. resource = SC_R_SDHC_1;
  83. pm_clk = SC_PM_CLK_PER;
  84. break;
  85. case IMX8QM_SDHC2_IPG_CLK:
  86. case IMX8QM_SDHC2_CLK:
  87. case IMX8QM_SDHC2_DIV:
  88. resource = SC_R_SDHC_2;
  89. pm_clk = SC_PM_CLK_PER;
  90. break;
  91. case IMX8QM_UART0_IPG_CLK:
  92. case IMX8QM_UART0_CLK:
  93. resource = SC_R_UART_0;
  94. pm_clk = SC_PM_CLK_PER;
  95. break;
  96. case IMX8QM_UART1_CLK:
  97. resource = SC_R_UART_1;
  98. pm_clk = SC_PM_CLK_PER;
  99. break;
  100. case IMX8QM_UART2_CLK:
  101. resource = SC_R_UART_2;
  102. pm_clk = SC_PM_CLK_PER;
  103. break;
  104. case IMX8QM_UART3_CLK:
  105. resource = SC_R_UART_3;
  106. pm_clk = SC_PM_CLK_PER;
  107. break;
  108. case IMX8QM_ENET0_IPG_CLK:
  109. case IMX8QM_ENET0_AHB_CLK:
  110. case IMX8QM_ENET0_REF_DIV:
  111. case IMX8QM_ENET0_PTP_CLK:
  112. resource = SC_R_ENET_0;
  113. pm_clk = SC_PM_CLK_PER;
  114. break;
  115. case IMX8QM_ENET1_IPG_CLK:
  116. case IMX8QM_ENET1_AHB_CLK:
  117. case IMX8QM_ENET1_REF_DIV:
  118. case IMX8QM_ENET1_PTP_CLK:
  119. resource = SC_R_ENET_1;
  120. pm_clk = SC_PM_CLK_PER;
  121. break;
  122. default:
  123. if (clk->id < IMX8QM_UART0_IPG_CLK ||
  124. clk->id >= IMX8QM_CLK_END) {
  125. printf("%s(Invalid clk ID #%lu)\n",
  126. __func__, clk->id);
  127. return -EINVAL;
  128. }
  129. return -ENOTSUPP;
  130. };
  131. ret = sc_pm_get_clock_rate(-1, resource, pm_clk,
  132. (sc_pm_clock_rate_t *)&rate);
  133. if (ret) {
  134. printf("%s err %d\n", __func__, ret);
  135. return ret;
  136. }
  137. return rate;
  138. }
  139. ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate)
  140. {
  141. sc_pm_clk_t pm_clk;
  142. u32 new_rate = rate;
  143. u16 resource;
  144. int ret;
  145. debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
  146. switch (clk->id) {
  147. case IMX8QM_I2C0_IPG_CLK:
  148. case IMX8QM_I2C0_CLK:
  149. case IMX8QM_I2C0_DIV:
  150. resource = SC_R_I2C_0;
  151. pm_clk = SC_PM_CLK_PER;
  152. break;
  153. case IMX8QM_I2C1_IPG_CLK:
  154. case IMX8QM_I2C1_CLK:
  155. case IMX8QM_I2C1_DIV:
  156. resource = SC_R_I2C_1;
  157. pm_clk = SC_PM_CLK_PER;
  158. break;
  159. case IMX8QM_I2C2_IPG_CLK:
  160. case IMX8QM_I2C2_CLK:
  161. case IMX8QM_I2C2_DIV:
  162. resource = SC_R_I2C_2;
  163. pm_clk = SC_PM_CLK_PER;
  164. break;
  165. case IMX8QM_I2C3_IPG_CLK:
  166. case IMX8QM_I2C3_CLK:
  167. case IMX8QM_I2C3_DIV:
  168. resource = SC_R_I2C_3;
  169. pm_clk = SC_PM_CLK_PER;
  170. break;
  171. case IMX8QM_UART0_CLK:
  172. resource = SC_R_UART_0;
  173. pm_clk = SC_PM_CLK_PER;
  174. break;
  175. case IMX8QM_UART1_CLK:
  176. resource = SC_R_UART_1;
  177. pm_clk = SC_PM_CLK_PER;
  178. break;
  179. case IMX8QM_UART2_CLK:
  180. resource = SC_R_UART_2;
  181. pm_clk = SC_PM_CLK_PER;
  182. break;
  183. case IMX8QM_UART3_CLK:
  184. resource = SC_R_UART_3;
  185. pm_clk = SC_PM_CLK_PER;
  186. break;
  187. case IMX8QM_SDHC0_IPG_CLK:
  188. case IMX8QM_SDHC0_CLK:
  189. case IMX8QM_SDHC0_DIV:
  190. resource = SC_R_SDHC_0;
  191. pm_clk = SC_PM_CLK_PER;
  192. break;
  193. case IMX8QM_SDHC1_IPG_CLK:
  194. case IMX8QM_SDHC1_CLK:
  195. case IMX8QM_SDHC1_DIV:
  196. resource = SC_R_SDHC_1;
  197. pm_clk = SC_PM_CLK_PER;
  198. break;
  199. case IMX8QM_SDHC2_IPG_CLK:
  200. case IMX8QM_SDHC2_CLK:
  201. case IMX8QM_SDHC2_DIV:
  202. resource = SC_R_SDHC_2;
  203. pm_clk = SC_PM_CLK_PER;
  204. break;
  205. case IMX8QM_ENET0_IPG_CLK:
  206. case IMX8QM_ENET0_AHB_CLK:
  207. case IMX8QM_ENET0_REF_DIV:
  208. case IMX8QM_ENET0_PTP_CLK:
  209. case IMX8QM_ENET0_ROOT_DIV:
  210. resource = SC_R_ENET_0;
  211. pm_clk = SC_PM_CLK_PER;
  212. break;
  213. case IMX8QM_ENET1_IPG_CLK:
  214. case IMX8QM_ENET1_AHB_CLK:
  215. case IMX8QM_ENET1_REF_DIV:
  216. case IMX8QM_ENET1_PTP_CLK:
  217. case IMX8QM_ENET1_ROOT_DIV:
  218. resource = SC_R_ENET_1;
  219. pm_clk = SC_PM_CLK_PER;
  220. break;
  221. default:
  222. if (clk->id < IMX8QM_UART0_IPG_CLK ||
  223. clk->id >= IMX8QM_CLK_END) {
  224. printf("%s(Invalid clk ID #%lu)\n",
  225. __func__, clk->id);
  226. return -EINVAL;
  227. }
  228. return -ENOTSUPP;
  229. };
  230. ret = sc_pm_set_clock_rate(-1, resource, pm_clk, &new_rate);
  231. if (ret) {
  232. printf("%s err %d\n", __func__, ret);
  233. return ret;
  234. }
  235. return new_rate;
  236. }
  237. int __imx8_clk_enable(struct clk *clk, bool enable)
  238. {
  239. sc_pm_clk_t pm_clk;
  240. u16 resource;
  241. int ret;
  242. debug("%s(#%lu)\n", __func__, clk->id);
  243. switch (clk->id) {
  244. case IMX8QM_I2C0_IPG_CLK:
  245. case IMX8QM_I2C0_CLK:
  246. case IMX8QM_I2C0_DIV:
  247. resource = SC_R_I2C_0;
  248. pm_clk = SC_PM_CLK_PER;
  249. break;
  250. case IMX8QM_I2C1_IPG_CLK:
  251. case IMX8QM_I2C1_CLK:
  252. case IMX8QM_I2C1_DIV:
  253. resource = SC_R_I2C_1;
  254. pm_clk = SC_PM_CLK_PER;
  255. break;
  256. case IMX8QM_I2C2_IPG_CLK:
  257. case IMX8QM_I2C2_CLK:
  258. case IMX8QM_I2C2_DIV:
  259. resource = SC_R_I2C_2;
  260. pm_clk = SC_PM_CLK_PER;
  261. break;
  262. case IMX8QM_I2C3_IPG_CLK:
  263. case IMX8QM_I2C3_CLK:
  264. case IMX8QM_I2C3_DIV:
  265. resource = SC_R_I2C_3;
  266. pm_clk = SC_PM_CLK_PER;
  267. break;
  268. case IMX8QM_UART0_CLK:
  269. resource = SC_R_UART_0;
  270. pm_clk = SC_PM_CLK_PER;
  271. break;
  272. case IMX8QM_UART1_CLK:
  273. resource = SC_R_UART_1;
  274. pm_clk = SC_PM_CLK_PER;
  275. break;
  276. case IMX8QM_UART2_CLK:
  277. resource = SC_R_UART_2;
  278. pm_clk = SC_PM_CLK_PER;
  279. break;
  280. case IMX8QM_UART3_CLK:
  281. resource = SC_R_UART_3;
  282. pm_clk = SC_PM_CLK_PER;
  283. break;
  284. case IMX8QM_SDHC0_IPG_CLK:
  285. case IMX8QM_SDHC0_CLK:
  286. case IMX8QM_SDHC0_DIV:
  287. resource = SC_R_SDHC_0;
  288. pm_clk = SC_PM_CLK_PER;
  289. break;
  290. case IMX8QM_SDHC1_IPG_CLK:
  291. case IMX8QM_SDHC1_CLK:
  292. case IMX8QM_SDHC1_DIV:
  293. resource = SC_R_SDHC_1;
  294. pm_clk = SC_PM_CLK_PER;
  295. break;
  296. case IMX8QM_SDHC2_IPG_CLK:
  297. case IMX8QM_SDHC2_CLK:
  298. case IMX8QM_SDHC2_DIV:
  299. resource = SC_R_SDHC_2;
  300. pm_clk = SC_PM_CLK_PER;
  301. break;
  302. case IMX8QM_ENET0_IPG_CLK:
  303. case IMX8QM_ENET0_AHB_CLK:
  304. case IMX8QM_ENET0_REF_DIV:
  305. case IMX8QM_ENET0_PTP_CLK:
  306. resource = SC_R_ENET_0;
  307. pm_clk = SC_PM_CLK_PER;
  308. break;
  309. case IMX8QM_ENET1_IPG_CLK:
  310. case IMX8QM_ENET1_AHB_CLK:
  311. case IMX8QM_ENET1_REF_DIV:
  312. case IMX8QM_ENET1_PTP_CLK:
  313. resource = SC_R_ENET_1;
  314. pm_clk = SC_PM_CLK_PER;
  315. break;
  316. default:
  317. if (clk->id < IMX8QM_UART0_IPG_CLK ||
  318. clk->id >= IMX8QM_CLK_END) {
  319. printf("%s(Invalid clk ID #%lu)\n",
  320. __func__, clk->id);
  321. return -EINVAL;
  322. }
  323. return -ENOTSUPP;
  324. }
  325. ret = sc_pm_clock_enable(-1, resource, pm_clk, enable, 0);
  326. if (ret) {
  327. printf("%s err %d\n", __func__, ret);
  328. return ret;
  329. }
  330. return 0;
  331. }