ops.c 140 KB

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  1. /****************************************************************************
  2. * Realmode X86 Emulator Library
  3. *
  4. * Copyright (C) 2007 Freescale Semiconductor, Inc.
  5. * Jason Jin <Jason.jin@freescale.com>
  6. *
  7. * Copyright (C) 1991-2004 SciTech Software, Inc.
  8. * Copyright (C) David Mosberger-Tang
  9. * Copyright (C) 1999 Egbert Eich
  10. *
  11. * ========================================================================
  12. *
  13. * Permission to use, copy, modify, distribute, and sell this software and
  14. * its documentation for any purpose is hereby granted without fee,
  15. * provided that the above copyright notice appear in all copies and that
  16. * both that copyright notice and this permission notice appear in
  17. * supporting documentation, and that the name of the authors not be used
  18. * in advertising or publicity pertaining to distribution of the software
  19. * without specific, written prior permission. The authors makes no
  20. * representations about the suitability of this software for any purpose.
  21. * It is provided "as is" without express or implied warranty.
  22. *
  23. * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  24. * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  25. * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  26. * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
  27. * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
  28. * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  29. * PERFORMANCE OF THIS SOFTWARE.
  30. *
  31. * ========================================================================
  32. *
  33. * Language: ANSI C
  34. * Environment: Any
  35. * Developer: Kendall Bennett
  36. *
  37. * Description: This file includes subroutines to implement the decoding
  38. * and emulation of all the x86 processor instructions.
  39. *
  40. * There are approximately 250 subroutines in here, which correspond
  41. * to the 256 byte-"opcodes" found on the 8086. The table which
  42. * dispatches this is found in the files optab.[ch].
  43. *
  44. * Each opcode proc has a comment preceding it which gives it's table
  45. * address. Several opcodes are missing (undefined) in the table.
  46. *
  47. * Each proc includes information for decoding (DECODE_PRINTF and
  48. * DECODE_PRINTF2), debugging (TRACE_REGS, SINGLE_STEP), and misc
  49. * functions (START_OF_INSTR, END_OF_INSTR).
  50. *
  51. * Many of the procedures are *VERY* similar in coding. This has
  52. * allowed for a very large amount of code to be generated in a fairly
  53. * short amount of time (i.e. cut, paste, and modify). The result is
  54. * that much of the code below could have been folded into subroutines
  55. * for a large reduction in size of this file. The downside would be
  56. * that there would be a penalty in execution speed. The file could
  57. * also have been *MUCH* larger by inlining certain functions which
  58. * were called. This could have resulted even faster execution. The
  59. * prime directive I used to decide whether to inline the code or to
  60. * modularize it, was basically: 1) no unnecessary subroutine calls,
  61. * 2) no routines more than about 200 lines in size, and 3) modularize
  62. * any code that I might not get right the first time. The fetch_*
  63. * subroutines fall into the latter category. The The decode_* fall
  64. * into the second category. The coding of the "switch(mod){ .... }"
  65. * in many of the subroutines below falls into the first category.
  66. * Especially, the coding of {add,and,or,sub,...}_{byte,word}
  67. * subroutines are an especially glaring case of the third guideline.
  68. * Since so much of the code is cloned from other modules (compare
  69. * opcode #00 to opcode #01), making the basic operations subroutine
  70. * calls is especially important; otherwise mistakes in coding an
  71. * "add" would represent a nightmare in maintenance.
  72. *
  73. ****************************************************************************/
  74. #include <common.h>
  75. #include "x86emu/x86emui.h"
  76. /*----------------------------- Implementation ----------------------------*/
  77. /* constant arrays to do several instructions in just one function */
  78. #ifdef CONFIG_X86EMU_DEBUG
  79. static char *x86emu_GenOpName[8] = {
  80. "ADD", "OR", "ADC", "SBB", "AND", "SUB", "XOR", "CMP"};
  81. #endif
  82. /* used by several opcodes */
  83. static u8 (*genop_byte_operation[])(u8 d, u8 s) =
  84. {
  85. add_byte, /* 00 */
  86. or_byte, /* 01 */
  87. adc_byte, /* 02 */
  88. sbb_byte, /* 03 */
  89. and_byte, /* 04 */
  90. sub_byte, /* 05 */
  91. xor_byte, /* 06 */
  92. cmp_byte, /* 07 */
  93. };
  94. static u16 (*genop_word_operation[])(u16 d, u16 s) =
  95. {
  96. add_word, /*00 */
  97. or_word, /*01 */
  98. adc_word, /*02 */
  99. sbb_word, /*03 */
  100. and_word, /*04 */
  101. sub_word, /*05 */
  102. xor_word, /*06 */
  103. cmp_word, /*07 */
  104. };
  105. static u32 (*genop_long_operation[])(u32 d, u32 s) =
  106. {
  107. add_long, /*00 */
  108. or_long, /*01 */
  109. adc_long, /*02 */
  110. sbb_long, /*03 */
  111. and_long, /*04 */
  112. sub_long, /*05 */
  113. xor_long, /*06 */
  114. cmp_long, /*07 */
  115. };
  116. /* used by opcodes 80, c0, d0, and d2. */
  117. static u8(*opcD0_byte_operation[])(u8 d, u8 s) =
  118. {
  119. rol_byte,
  120. ror_byte,
  121. rcl_byte,
  122. rcr_byte,
  123. shl_byte,
  124. shr_byte,
  125. shl_byte, /* sal_byte === shl_byte by definition */
  126. sar_byte,
  127. };
  128. /* used by opcodes c1, d1, and d3. */
  129. static u16(*opcD1_word_operation[])(u16 s, u8 d) =
  130. {
  131. rol_word,
  132. ror_word,
  133. rcl_word,
  134. rcr_word,
  135. shl_word,
  136. shr_word,
  137. shl_word, /* sal_byte === shl_byte by definition */
  138. sar_word,
  139. };
  140. /* used by opcodes c1, d1, and d3. */
  141. static u32 (*opcD1_long_operation[])(u32 s, u8 d) =
  142. {
  143. rol_long,
  144. ror_long,
  145. rcl_long,
  146. rcr_long,
  147. shl_long,
  148. shr_long,
  149. shl_long, /* sal_byte === shl_byte by definition */
  150. sar_long,
  151. };
  152. #ifdef CONFIG_X86EMU_DEBUG
  153. static char *opF6_names[8] =
  154. { "TEST\t", "", "NOT\t", "NEG\t", "MUL\t", "IMUL\t", "DIV\t", "IDIV\t" };
  155. #endif
  156. /****************************************************************************
  157. PARAMETERS:
  158. op1 - Instruction op code
  159. REMARKS:
  160. Handles illegal opcodes.
  161. ****************************************************************************/
  162. void x86emuOp_illegal_op(
  163. u8 op1)
  164. {
  165. START_OF_INSTR();
  166. if (M.x86.R_SP != 0) {
  167. DB(printf("ILLEGAL X86 OPCODE\n"));
  168. TRACE_REGS();
  169. DB( printk("%04x:%04x: %02X ILLEGAL X86 OPCODE!\n",
  170. M.x86.R_CS, M.x86.R_IP-1,op1));
  171. HALT_SYS();
  172. }
  173. else {
  174. /* If we get here, it means the stack pointer is back to zero
  175. * so we are just returning from an emulator service call
  176. * so therte is no need to display an error message. We trap
  177. * the emulator with an 0xF1 opcode to finish the service
  178. * call.
  179. */
  180. X86EMU_halt_sys();
  181. }
  182. END_OF_INSTR();
  183. }
  184. /****************************************************************************
  185. REMARKS:
  186. Handles opcodes 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38
  187. ****************************************************************************/
  188. void x86emuOp_genop_byte_RM_R(u8 op1)
  189. {
  190. int mod, rl, rh;
  191. uint destoffset;
  192. u8 *destreg, *srcreg;
  193. u8 destval;
  194. op1 = (op1 >> 3) & 0x7;
  195. START_OF_INSTR();
  196. DECODE_PRINTF(x86emu_GenOpName[op1]);
  197. DECODE_PRINTF("\t");
  198. FETCH_DECODE_MODRM(mod, rh, rl);
  199. if(mod<3)
  200. { destoffset = decode_rmXX_address(mod,rl);
  201. DECODE_PRINTF(",");
  202. destval = fetch_data_byte(destoffset);
  203. srcreg = DECODE_RM_BYTE_REGISTER(rh);
  204. DECODE_PRINTF("\n");
  205. TRACE_AND_STEP();
  206. destval = genop_byte_operation[op1](destval, *srcreg);
  207. store_data_byte(destoffset, destval);
  208. }
  209. else
  210. { /* register to register */
  211. destreg = DECODE_RM_BYTE_REGISTER(rl);
  212. DECODE_PRINTF(",");
  213. srcreg = DECODE_RM_BYTE_REGISTER(rh);
  214. DECODE_PRINTF("\n");
  215. TRACE_AND_STEP();
  216. *destreg = genop_byte_operation[op1](*destreg, *srcreg);
  217. }
  218. DECODE_CLEAR_SEGOVR();
  219. END_OF_INSTR();
  220. }
  221. /****************************************************************************
  222. REMARKS:
  223. Handles opcodes 0x01, 0x09, 0x11, 0x19, 0x21, 0x29, 0x31, 0x39
  224. ****************************************************************************/
  225. void x86emuOp_genop_word_RM_R(u8 op1)
  226. {
  227. int mod, rl, rh;
  228. uint destoffset;
  229. op1 = (op1 >> 3) & 0x7;
  230. START_OF_INSTR();
  231. DECODE_PRINTF(x86emu_GenOpName[op1]);
  232. DECODE_PRINTF("\t");
  233. FETCH_DECODE_MODRM(mod, rh, rl);
  234. if(mod<3) {
  235. destoffset = decode_rmXX_address(mod,rl);
  236. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  237. u32 destval;
  238. u32 *srcreg;
  239. DECODE_PRINTF(",");
  240. destval = fetch_data_long(destoffset);
  241. srcreg = DECODE_RM_LONG_REGISTER(rh);
  242. DECODE_PRINTF("\n");
  243. TRACE_AND_STEP();
  244. destval = genop_long_operation[op1](destval, *srcreg);
  245. store_data_long(destoffset, destval);
  246. } else {
  247. u16 destval;
  248. u16 *srcreg;
  249. DECODE_PRINTF(",");
  250. destval = fetch_data_word(destoffset);
  251. srcreg = DECODE_RM_WORD_REGISTER(rh);
  252. DECODE_PRINTF("\n");
  253. TRACE_AND_STEP();
  254. destval = genop_word_operation[op1](destval, *srcreg);
  255. store_data_word(destoffset, destval);
  256. }
  257. } else { /* register to register */
  258. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  259. u32 *destreg,*srcreg;
  260. destreg = DECODE_RM_LONG_REGISTER(rl);
  261. DECODE_PRINTF(",");
  262. srcreg = DECODE_RM_LONG_REGISTER(rh);
  263. DECODE_PRINTF("\n");
  264. TRACE_AND_STEP();
  265. *destreg = genop_long_operation[op1](*destreg, *srcreg);
  266. } else {
  267. u16 *destreg,*srcreg;
  268. destreg = DECODE_RM_WORD_REGISTER(rl);
  269. DECODE_PRINTF(",");
  270. srcreg = DECODE_RM_WORD_REGISTER(rh);
  271. DECODE_PRINTF("\n");
  272. TRACE_AND_STEP();
  273. *destreg = genop_word_operation[op1](*destreg, *srcreg);
  274. }
  275. }
  276. DECODE_CLEAR_SEGOVR();
  277. END_OF_INSTR();
  278. }
  279. /****************************************************************************
  280. REMARKS:
  281. Handles opcodes 0x02, 0x0a, 0x12, 0x1a, 0x22, 0x2a, 0x32, 0x3a
  282. ****************************************************************************/
  283. void x86emuOp_genop_byte_R_RM(u8 op1)
  284. {
  285. int mod, rl, rh;
  286. u8 *destreg, *srcreg;
  287. uint srcoffset;
  288. u8 srcval;
  289. op1 = (op1 >> 3) & 0x7;
  290. START_OF_INSTR();
  291. DECODE_PRINTF(x86emu_GenOpName[op1]);
  292. DECODE_PRINTF("\t");
  293. FETCH_DECODE_MODRM(mod, rh, rl);
  294. if (mod < 3) {
  295. destreg = DECODE_RM_BYTE_REGISTER(rh);
  296. DECODE_PRINTF(",");
  297. srcoffset = decode_rmXX_address(mod,rl);
  298. srcval = fetch_data_byte(srcoffset);
  299. } else { /* register to register */
  300. destreg = DECODE_RM_BYTE_REGISTER(rh);
  301. DECODE_PRINTF(",");
  302. srcreg = DECODE_RM_BYTE_REGISTER(rl);
  303. srcval = *srcreg;
  304. }
  305. DECODE_PRINTF("\n");
  306. TRACE_AND_STEP();
  307. *destreg = genop_byte_operation[op1](*destreg, srcval);
  308. DECODE_CLEAR_SEGOVR();
  309. END_OF_INSTR();
  310. }
  311. /****************************************************************************
  312. REMARKS:
  313. Handles opcodes 0x03, 0x0b, 0x13, 0x1b, 0x23, 0x2b, 0x33, 0x3b
  314. ****************************************************************************/
  315. void x86emuOp_genop_word_R_RM(u8 op1)
  316. {
  317. int mod, rl, rh;
  318. uint srcoffset;
  319. u32 *destreg32, srcval;
  320. u16 *destreg;
  321. op1 = (op1 >> 3) & 0x7;
  322. START_OF_INSTR();
  323. DECODE_PRINTF(x86emu_GenOpName[op1]);
  324. DECODE_PRINTF("\t");
  325. FETCH_DECODE_MODRM(mod, rh, rl);
  326. if (mod < 3) {
  327. srcoffset = decode_rmXX_address(mod,rl);
  328. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  329. destreg32 = DECODE_RM_LONG_REGISTER(rh);
  330. DECODE_PRINTF(",");
  331. srcval = fetch_data_long(srcoffset);
  332. DECODE_PRINTF("\n");
  333. TRACE_AND_STEP();
  334. *destreg32 = genop_long_operation[op1](*destreg32, srcval);
  335. } else {
  336. destreg = DECODE_RM_WORD_REGISTER(rh);
  337. DECODE_PRINTF(",");
  338. srcval = fetch_data_word(srcoffset);
  339. DECODE_PRINTF("\n");
  340. TRACE_AND_STEP();
  341. *destreg = genop_word_operation[op1](*destreg, srcval);
  342. }
  343. } else { /* register to register */
  344. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  345. u32 *srcreg;
  346. destreg32 = DECODE_RM_LONG_REGISTER(rh);
  347. DECODE_PRINTF(",");
  348. srcreg = DECODE_RM_LONG_REGISTER(rl);
  349. DECODE_PRINTF("\n");
  350. TRACE_AND_STEP();
  351. *destreg32 = genop_long_operation[op1](*destreg32, *srcreg);
  352. } else {
  353. u16 *srcreg;
  354. destreg = DECODE_RM_WORD_REGISTER(rh);
  355. DECODE_PRINTF(",");
  356. srcreg = DECODE_RM_WORD_REGISTER(rl);
  357. DECODE_PRINTF("\n");
  358. TRACE_AND_STEP();
  359. *destreg = genop_word_operation[op1](*destreg, *srcreg);
  360. }
  361. }
  362. DECODE_CLEAR_SEGOVR();
  363. END_OF_INSTR();
  364. }
  365. /****************************************************************************
  366. REMARKS:
  367. Handles opcodes 0x04, 0x0c, 0x14, 0x1c, 0x24, 0x2c, 0x34, 0x3c
  368. ****************************************************************************/
  369. void x86emuOp_genop_byte_AL_IMM(u8 op1)
  370. {
  371. u8 srcval;
  372. op1 = (op1 >> 3) & 0x7;
  373. START_OF_INSTR();
  374. DECODE_PRINTF(x86emu_GenOpName[op1]);
  375. DECODE_PRINTF("\tAL,");
  376. srcval = fetch_byte_imm();
  377. DECODE_PRINTF2("%x\n", srcval);
  378. TRACE_AND_STEP();
  379. M.x86.R_AL = genop_byte_operation[op1](M.x86.R_AL, srcval);
  380. DECODE_CLEAR_SEGOVR();
  381. END_OF_INSTR();
  382. }
  383. /****************************************************************************
  384. REMARKS:
  385. Handles opcodes 0x05, 0x0d, 0x15, 0x1d, 0x25, 0x2d, 0x35, 0x3d
  386. ****************************************************************************/
  387. void x86emuOp_genop_word_AX_IMM(u8 op1)
  388. {
  389. u32 srcval;
  390. op1 = (op1 >> 3) & 0x7;
  391. START_OF_INSTR();
  392. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  393. DECODE_PRINTF(x86emu_GenOpName[op1]);
  394. DECODE_PRINTF("\tEAX,");
  395. srcval = fetch_long_imm();
  396. } else {
  397. DECODE_PRINTF(x86emu_GenOpName[op1]);
  398. DECODE_PRINTF("\tAX,");
  399. srcval = fetch_word_imm();
  400. }
  401. DECODE_PRINTF2("%x\n", srcval);
  402. TRACE_AND_STEP();
  403. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  404. M.x86.R_EAX = genop_long_operation[op1](M.x86.R_EAX, srcval);
  405. } else {
  406. M.x86.R_AX = genop_word_operation[op1](M.x86.R_AX, (u16)srcval);
  407. }
  408. DECODE_CLEAR_SEGOVR();
  409. END_OF_INSTR();
  410. }
  411. /****************************************************************************
  412. REMARKS:
  413. Handles opcode 0x06
  414. ****************************************************************************/
  415. void x86emuOp_push_ES(u8 X86EMU_UNUSED(op1))
  416. {
  417. START_OF_INSTR();
  418. DECODE_PRINTF("PUSH\tES\n");
  419. TRACE_AND_STEP();
  420. push_word(M.x86.R_ES);
  421. DECODE_CLEAR_SEGOVR();
  422. END_OF_INSTR();
  423. }
  424. /****************************************************************************
  425. REMARKS:
  426. Handles opcode 0x07
  427. ****************************************************************************/
  428. void x86emuOp_pop_ES(u8 X86EMU_UNUSED(op1))
  429. {
  430. START_OF_INSTR();
  431. DECODE_PRINTF("POP\tES\n");
  432. TRACE_AND_STEP();
  433. M.x86.R_ES = pop_word();
  434. DECODE_CLEAR_SEGOVR();
  435. END_OF_INSTR();
  436. }
  437. /****************************************************************************
  438. REMARKS:
  439. Handles opcode 0x0e
  440. ****************************************************************************/
  441. void x86emuOp_push_CS(u8 X86EMU_UNUSED(op1))
  442. {
  443. START_OF_INSTR();
  444. DECODE_PRINTF("PUSH\tCS\n");
  445. TRACE_AND_STEP();
  446. push_word(M.x86.R_CS);
  447. DECODE_CLEAR_SEGOVR();
  448. END_OF_INSTR();
  449. }
  450. /****************************************************************************
  451. REMARKS:
  452. Handles opcode 0x0f. Escape for two-byte opcode (286 or better)
  453. ****************************************************************************/
  454. void x86emuOp_two_byte(u8 X86EMU_UNUSED(op1))
  455. {
  456. u8 op2 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
  457. INC_DECODED_INST_LEN(1);
  458. (*x86emu_optab2[op2])(op2);
  459. }
  460. /****************************************************************************
  461. REMARKS:
  462. Handles opcode 0x16
  463. ****************************************************************************/
  464. void x86emuOp_push_SS(u8 X86EMU_UNUSED(op1))
  465. {
  466. START_OF_INSTR();
  467. DECODE_PRINTF("PUSH\tSS\n");
  468. TRACE_AND_STEP();
  469. push_word(M.x86.R_SS);
  470. DECODE_CLEAR_SEGOVR();
  471. END_OF_INSTR();
  472. }
  473. /****************************************************************************
  474. REMARKS:
  475. Handles opcode 0x17
  476. ****************************************************************************/
  477. void x86emuOp_pop_SS(u8 X86EMU_UNUSED(op1))
  478. {
  479. START_OF_INSTR();
  480. DECODE_PRINTF("POP\tSS\n");
  481. TRACE_AND_STEP();
  482. M.x86.R_SS = pop_word();
  483. DECODE_CLEAR_SEGOVR();
  484. END_OF_INSTR();
  485. }
  486. /****************************************************************************
  487. REMARKS:
  488. Handles opcode 0x1e
  489. ****************************************************************************/
  490. void x86emuOp_push_DS(u8 X86EMU_UNUSED(op1))
  491. {
  492. START_OF_INSTR();
  493. DECODE_PRINTF("PUSH\tDS\n");
  494. TRACE_AND_STEP();
  495. push_word(M.x86.R_DS);
  496. DECODE_CLEAR_SEGOVR();
  497. END_OF_INSTR();
  498. }
  499. /****************************************************************************
  500. REMARKS:
  501. Handles opcode 0x1f
  502. ****************************************************************************/
  503. void x86emuOp_pop_DS(u8 X86EMU_UNUSED(op1))
  504. {
  505. START_OF_INSTR();
  506. DECODE_PRINTF("POP\tDS\n");
  507. TRACE_AND_STEP();
  508. M.x86.R_DS = pop_word();
  509. DECODE_CLEAR_SEGOVR();
  510. END_OF_INSTR();
  511. }
  512. /****************************************************************************
  513. REMARKS:
  514. Handles opcode 0x26
  515. ****************************************************************************/
  516. void x86emuOp_segovr_ES(u8 X86EMU_UNUSED(op1))
  517. {
  518. START_OF_INSTR();
  519. DECODE_PRINTF("ES:\n");
  520. TRACE_AND_STEP();
  521. M.x86.mode |= SYSMODE_SEGOVR_ES;
  522. /*
  523. * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
  524. * opcode subroutines we do not want to do this.
  525. */
  526. END_OF_INSTR();
  527. }
  528. /****************************************************************************
  529. REMARKS:
  530. Handles opcode 0x27
  531. ****************************************************************************/
  532. void x86emuOp_daa(u8 X86EMU_UNUSED(op1))
  533. {
  534. START_OF_INSTR();
  535. DECODE_PRINTF("DAA\n");
  536. TRACE_AND_STEP();
  537. M.x86.R_AL = daa_byte(M.x86.R_AL);
  538. DECODE_CLEAR_SEGOVR();
  539. END_OF_INSTR();
  540. }
  541. /****************************************************************************
  542. REMARKS:
  543. Handles opcode 0x2e
  544. ****************************************************************************/
  545. void x86emuOp_segovr_CS(u8 X86EMU_UNUSED(op1))
  546. {
  547. START_OF_INSTR();
  548. DECODE_PRINTF("CS:\n");
  549. TRACE_AND_STEP();
  550. M.x86.mode |= SYSMODE_SEGOVR_CS;
  551. /* note no DECODE_CLEAR_SEGOVR here. */
  552. END_OF_INSTR();
  553. }
  554. /****************************************************************************
  555. REMARKS:
  556. Handles opcode 0x2f
  557. ****************************************************************************/
  558. void x86emuOp_das(u8 X86EMU_UNUSED(op1))
  559. {
  560. START_OF_INSTR();
  561. DECODE_PRINTF("DAS\n");
  562. TRACE_AND_STEP();
  563. M.x86.R_AL = das_byte(M.x86.R_AL);
  564. DECODE_CLEAR_SEGOVR();
  565. END_OF_INSTR();
  566. }
  567. /****************************************************************************
  568. REMARKS:
  569. Handles opcode 0x36
  570. ****************************************************************************/
  571. void x86emuOp_segovr_SS(u8 X86EMU_UNUSED(op1))
  572. {
  573. START_OF_INSTR();
  574. DECODE_PRINTF("SS:\n");
  575. TRACE_AND_STEP();
  576. M.x86.mode |= SYSMODE_SEGOVR_SS;
  577. /* no DECODE_CLEAR_SEGOVR ! */
  578. END_OF_INSTR();
  579. }
  580. /****************************************************************************
  581. REMARKS:
  582. Handles opcode 0x37
  583. ****************************************************************************/
  584. void x86emuOp_aaa(u8 X86EMU_UNUSED(op1))
  585. {
  586. START_OF_INSTR();
  587. DECODE_PRINTF("AAA\n");
  588. TRACE_AND_STEP();
  589. M.x86.R_AX = aaa_word(M.x86.R_AX);
  590. DECODE_CLEAR_SEGOVR();
  591. END_OF_INSTR();
  592. }
  593. /****************************************************************************
  594. REMARKS:
  595. Handles opcode 0x3e
  596. ****************************************************************************/
  597. void x86emuOp_segovr_DS(u8 X86EMU_UNUSED(op1))
  598. {
  599. START_OF_INSTR();
  600. DECODE_PRINTF("DS:\n");
  601. TRACE_AND_STEP();
  602. M.x86.mode |= SYSMODE_SEGOVR_DS;
  603. /* NO DECODE_CLEAR_SEGOVR! */
  604. END_OF_INSTR();
  605. }
  606. /****************************************************************************
  607. REMARKS:
  608. Handles opcode 0x3f
  609. ****************************************************************************/
  610. void x86emuOp_aas(u8 X86EMU_UNUSED(op1))
  611. {
  612. START_OF_INSTR();
  613. DECODE_PRINTF("AAS\n");
  614. TRACE_AND_STEP();
  615. M.x86.R_AX = aas_word(M.x86.R_AX);
  616. DECODE_CLEAR_SEGOVR();
  617. END_OF_INSTR();
  618. }
  619. /****************************************************************************
  620. REMARKS:
  621. Handles opcode 0x40 - 0x47
  622. ****************************************************************************/
  623. void x86emuOp_inc_register(u8 op1)
  624. {
  625. START_OF_INSTR();
  626. op1 &= 0x7;
  627. DECODE_PRINTF("INC\t");
  628. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  629. u32 *reg;
  630. reg = DECODE_RM_LONG_REGISTER(op1);
  631. DECODE_PRINTF("\n");
  632. TRACE_AND_STEP();
  633. *reg = inc_long(*reg);
  634. } else {
  635. u16 *reg;
  636. reg = DECODE_RM_WORD_REGISTER(op1);
  637. DECODE_PRINTF("\n");
  638. TRACE_AND_STEP();
  639. *reg = inc_word(*reg);
  640. }
  641. DECODE_CLEAR_SEGOVR();
  642. END_OF_INSTR();
  643. }
  644. /****************************************************************************
  645. REMARKS:
  646. Handles opcode 0x48 - 0x4F
  647. ****************************************************************************/
  648. void x86emuOp_dec_register(u8 op1)
  649. {
  650. START_OF_INSTR();
  651. op1 &= 0x7;
  652. DECODE_PRINTF("DEC\t");
  653. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  654. u32 *reg;
  655. reg = DECODE_RM_LONG_REGISTER(op1);
  656. DECODE_PRINTF("\n");
  657. TRACE_AND_STEP();
  658. *reg = dec_long(*reg);
  659. } else {
  660. u16 *reg;
  661. reg = DECODE_RM_WORD_REGISTER(op1);
  662. DECODE_PRINTF("\n");
  663. TRACE_AND_STEP();
  664. *reg = dec_word(*reg);
  665. }
  666. DECODE_CLEAR_SEGOVR();
  667. END_OF_INSTR();
  668. }
  669. /****************************************************************************
  670. REMARKS:
  671. Handles opcode 0x50 - 0x57
  672. ****************************************************************************/
  673. void x86emuOp_push_register(u8 op1)
  674. {
  675. START_OF_INSTR();
  676. op1 &= 0x7;
  677. DECODE_PRINTF("PUSH\t");
  678. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  679. u32 *reg;
  680. reg = DECODE_RM_LONG_REGISTER(op1);
  681. DECODE_PRINTF("\n");
  682. TRACE_AND_STEP();
  683. push_long(*reg);
  684. } else {
  685. u16 *reg;
  686. reg = DECODE_RM_WORD_REGISTER(op1);
  687. DECODE_PRINTF("\n");
  688. TRACE_AND_STEP();
  689. push_word(*reg);
  690. }
  691. DECODE_CLEAR_SEGOVR();
  692. END_OF_INSTR();
  693. }
  694. /****************************************************************************
  695. REMARKS:
  696. Handles opcode 0x58 - 0x5F
  697. ****************************************************************************/
  698. void x86emuOp_pop_register(u8 op1)
  699. {
  700. START_OF_INSTR();
  701. op1 &= 0x7;
  702. DECODE_PRINTF("POP\t");
  703. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  704. u32 *reg;
  705. reg = DECODE_RM_LONG_REGISTER(op1);
  706. DECODE_PRINTF("\n");
  707. TRACE_AND_STEP();
  708. *reg = pop_long();
  709. } else {
  710. u16 *reg;
  711. reg = DECODE_RM_WORD_REGISTER(op1);
  712. DECODE_PRINTF("\n");
  713. TRACE_AND_STEP();
  714. *reg = pop_word();
  715. }
  716. DECODE_CLEAR_SEGOVR();
  717. END_OF_INSTR();
  718. }
  719. /****************************************************************************
  720. REMARKS:
  721. Handles opcode 0x60
  722. ****************************************************************************/
  723. void x86emuOp_push_all(u8 X86EMU_UNUSED(op1))
  724. {
  725. START_OF_INSTR();
  726. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  727. DECODE_PRINTF("PUSHAD\n");
  728. } else {
  729. DECODE_PRINTF("PUSHA\n");
  730. }
  731. TRACE_AND_STEP();
  732. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  733. u32 old_sp = M.x86.R_ESP;
  734. push_long(M.x86.R_EAX);
  735. push_long(M.x86.R_ECX);
  736. push_long(M.x86.R_EDX);
  737. push_long(M.x86.R_EBX);
  738. push_long(old_sp);
  739. push_long(M.x86.R_EBP);
  740. push_long(M.x86.R_ESI);
  741. push_long(M.x86.R_EDI);
  742. } else {
  743. u16 old_sp = M.x86.R_SP;
  744. push_word(M.x86.R_AX);
  745. push_word(M.x86.R_CX);
  746. push_word(M.x86.R_DX);
  747. push_word(M.x86.R_BX);
  748. push_word(old_sp);
  749. push_word(M.x86.R_BP);
  750. push_word(M.x86.R_SI);
  751. push_word(M.x86.R_DI);
  752. }
  753. DECODE_CLEAR_SEGOVR();
  754. END_OF_INSTR();
  755. }
  756. /****************************************************************************
  757. REMARKS:
  758. Handles opcode 0x61
  759. ****************************************************************************/
  760. void x86emuOp_pop_all(u8 X86EMU_UNUSED(op1))
  761. {
  762. START_OF_INSTR();
  763. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  764. DECODE_PRINTF("POPAD\n");
  765. } else {
  766. DECODE_PRINTF("POPA\n");
  767. }
  768. TRACE_AND_STEP();
  769. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  770. M.x86.R_EDI = pop_long();
  771. M.x86.R_ESI = pop_long();
  772. M.x86.R_EBP = pop_long();
  773. M.x86.R_ESP += 4; /* skip ESP */
  774. M.x86.R_EBX = pop_long();
  775. M.x86.R_EDX = pop_long();
  776. M.x86.R_ECX = pop_long();
  777. M.x86.R_EAX = pop_long();
  778. } else {
  779. M.x86.R_DI = pop_word();
  780. M.x86.R_SI = pop_word();
  781. M.x86.R_BP = pop_word();
  782. M.x86.R_SP += 2; /* skip SP */
  783. M.x86.R_BX = pop_word();
  784. M.x86.R_DX = pop_word();
  785. M.x86.R_CX = pop_word();
  786. M.x86.R_AX = pop_word();
  787. }
  788. DECODE_CLEAR_SEGOVR();
  789. END_OF_INSTR();
  790. }
  791. /*opcode 0x62 ILLEGAL OP, calls x86emuOp_illegal_op() */
  792. /*opcode 0x63 ILLEGAL OP, calls x86emuOp_illegal_op() */
  793. /****************************************************************************
  794. REMARKS:
  795. Handles opcode 0x64
  796. ****************************************************************************/
  797. void x86emuOp_segovr_FS(u8 X86EMU_UNUSED(op1))
  798. {
  799. START_OF_INSTR();
  800. DECODE_PRINTF("FS:\n");
  801. TRACE_AND_STEP();
  802. M.x86.mode |= SYSMODE_SEGOVR_FS;
  803. /*
  804. * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
  805. * opcode subroutines we do not want to do this.
  806. */
  807. END_OF_INSTR();
  808. }
  809. /****************************************************************************
  810. REMARKS:
  811. Handles opcode 0x65
  812. ****************************************************************************/
  813. void x86emuOp_segovr_GS(u8 X86EMU_UNUSED(op1))
  814. {
  815. START_OF_INSTR();
  816. DECODE_PRINTF("GS:\n");
  817. TRACE_AND_STEP();
  818. M.x86.mode |= SYSMODE_SEGOVR_GS;
  819. /*
  820. * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
  821. * opcode subroutines we do not want to do this.
  822. */
  823. END_OF_INSTR();
  824. }
  825. /****************************************************************************
  826. REMARKS:
  827. Handles opcode 0x66 - prefix for 32-bit register
  828. ****************************************************************************/
  829. void x86emuOp_prefix_data(u8 X86EMU_UNUSED(op1))
  830. {
  831. START_OF_INSTR();
  832. DECODE_PRINTF("DATA:\n");
  833. TRACE_AND_STEP();
  834. M.x86.mode |= SYSMODE_PREFIX_DATA;
  835. /* note no DECODE_CLEAR_SEGOVR here. */
  836. END_OF_INSTR();
  837. }
  838. /****************************************************************************
  839. REMARKS:
  840. Handles opcode 0x67 - prefix for 32-bit address
  841. ****************************************************************************/
  842. void x86emuOp_prefix_addr(u8 X86EMU_UNUSED(op1))
  843. {
  844. START_OF_INSTR();
  845. DECODE_PRINTF("ADDR:\n");
  846. TRACE_AND_STEP();
  847. M.x86.mode |= SYSMODE_PREFIX_ADDR;
  848. /* note no DECODE_CLEAR_SEGOVR here. */
  849. END_OF_INSTR();
  850. }
  851. /****************************************************************************
  852. REMARKS:
  853. Handles opcode 0x68
  854. ****************************************************************************/
  855. void x86emuOp_push_word_IMM(u8 X86EMU_UNUSED(op1))
  856. {
  857. u32 imm;
  858. START_OF_INSTR();
  859. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  860. imm = fetch_long_imm();
  861. } else {
  862. imm = fetch_word_imm();
  863. }
  864. DECODE_PRINTF2("PUSH\t%x\n", imm);
  865. TRACE_AND_STEP();
  866. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  867. push_long(imm);
  868. } else {
  869. push_word((u16)imm);
  870. }
  871. DECODE_CLEAR_SEGOVR();
  872. END_OF_INSTR();
  873. }
  874. /****************************************************************************
  875. REMARKS:
  876. Handles opcode 0x69
  877. ****************************************************************************/
  878. void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
  879. {
  880. int mod, rl, rh;
  881. uint srcoffset;
  882. START_OF_INSTR();
  883. DECODE_PRINTF("IMUL\t");
  884. FETCH_DECODE_MODRM(mod, rh, rl);
  885. if (mod < 3) {
  886. srcoffset = decode_rmXX_address(mod, rl);
  887. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  888. u32 *destreg;
  889. u32 srcval;
  890. u32 res_lo,res_hi;
  891. s32 imm;
  892. destreg = DECODE_RM_LONG_REGISTER(rh);
  893. DECODE_PRINTF(",");
  894. srcval = fetch_data_long(srcoffset);
  895. imm = fetch_long_imm();
  896. DECODE_PRINTF2(",%d\n", (s32)imm);
  897. TRACE_AND_STEP();
  898. imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
  899. if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
  900. (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
  901. CLEAR_FLAG(F_CF);
  902. CLEAR_FLAG(F_OF);
  903. } else {
  904. SET_FLAG(F_CF);
  905. SET_FLAG(F_OF);
  906. }
  907. *destreg = (u32)res_lo;
  908. } else {
  909. u16 *destreg;
  910. u16 srcval;
  911. u32 res;
  912. s16 imm;
  913. destreg = DECODE_RM_WORD_REGISTER(rh);
  914. DECODE_PRINTF(",");
  915. srcval = fetch_data_word(srcoffset);
  916. imm = fetch_word_imm();
  917. DECODE_PRINTF2(",%d\n", (s32)imm);
  918. TRACE_AND_STEP();
  919. res = (s16)srcval * (s16)imm;
  920. if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
  921. (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
  922. CLEAR_FLAG(F_CF);
  923. CLEAR_FLAG(F_OF);
  924. } else {
  925. SET_FLAG(F_CF);
  926. SET_FLAG(F_OF);
  927. }
  928. *destreg = (u16)res;
  929. }
  930. } else { /* register to register */
  931. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  932. u32 *destreg,*srcreg;
  933. u32 res_lo,res_hi;
  934. s32 imm;
  935. destreg = DECODE_RM_LONG_REGISTER(rh);
  936. DECODE_PRINTF(",");
  937. srcreg = DECODE_RM_LONG_REGISTER(rl);
  938. imm = fetch_long_imm();
  939. DECODE_PRINTF2(",%d\n", (s32)imm);
  940. TRACE_AND_STEP();
  941. imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm);
  942. if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
  943. (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
  944. CLEAR_FLAG(F_CF);
  945. CLEAR_FLAG(F_OF);
  946. } else {
  947. SET_FLAG(F_CF);
  948. SET_FLAG(F_OF);
  949. }
  950. *destreg = (u32)res_lo;
  951. } else {
  952. u16 *destreg,*srcreg;
  953. u32 res;
  954. s16 imm;
  955. destreg = DECODE_RM_WORD_REGISTER(rh);
  956. DECODE_PRINTF(",");
  957. srcreg = DECODE_RM_WORD_REGISTER(rl);
  958. imm = fetch_word_imm();
  959. DECODE_PRINTF2(",%d\n", (s32)imm);
  960. res = (s16)*srcreg * (s16)imm;
  961. if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
  962. (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
  963. CLEAR_FLAG(F_CF);
  964. CLEAR_FLAG(F_OF);
  965. } else {
  966. SET_FLAG(F_CF);
  967. SET_FLAG(F_OF);
  968. }
  969. *destreg = (u16)res;
  970. }
  971. }
  972. DECODE_CLEAR_SEGOVR();
  973. END_OF_INSTR();
  974. }
  975. /****************************************************************************
  976. REMARKS:
  977. Handles opcode 0x6a
  978. ****************************************************************************/
  979. void x86emuOp_push_byte_IMM(u8 X86EMU_UNUSED(op1))
  980. {
  981. s16 imm;
  982. START_OF_INSTR();
  983. imm = (s8)fetch_byte_imm();
  984. DECODE_PRINTF2("PUSH\t%d\n", imm);
  985. TRACE_AND_STEP();
  986. push_word(imm);
  987. DECODE_CLEAR_SEGOVR();
  988. END_OF_INSTR();
  989. }
  990. /****************************************************************************
  991. REMARKS:
  992. Handles opcode 0x6b
  993. ****************************************************************************/
  994. void x86emuOp_imul_byte_IMM(u8 X86EMU_UNUSED(op1))
  995. {
  996. int mod, rl, rh;
  997. uint srcoffset;
  998. s8 imm;
  999. START_OF_INSTR();
  1000. DECODE_PRINTF("IMUL\t");
  1001. FETCH_DECODE_MODRM(mod, rh, rl);
  1002. if (mod < 3) {
  1003. srcoffset = decode_rmXX_address(mod, rl);
  1004. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1005. u32 *destreg;
  1006. u32 srcval;
  1007. u32 res_lo,res_hi;
  1008. destreg = DECODE_RM_LONG_REGISTER(rh);
  1009. DECODE_PRINTF(",");
  1010. srcval = fetch_data_long(srcoffset);
  1011. imm = fetch_byte_imm();
  1012. DECODE_PRINTF2(",%d\n", (s32)imm);
  1013. TRACE_AND_STEP();
  1014. imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
  1015. if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
  1016. (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
  1017. CLEAR_FLAG(F_CF);
  1018. CLEAR_FLAG(F_OF);
  1019. } else {
  1020. SET_FLAG(F_CF);
  1021. SET_FLAG(F_OF);
  1022. }
  1023. *destreg = (u32)res_lo;
  1024. } else {
  1025. u16 *destreg;
  1026. u16 srcval;
  1027. u32 res;
  1028. destreg = DECODE_RM_WORD_REGISTER(rh);
  1029. DECODE_PRINTF(",");
  1030. srcval = fetch_data_word(srcoffset);
  1031. imm = fetch_byte_imm();
  1032. DECODE_PRINTF2(",%d\n", (s32)imm);
  1033. TRACE_AND_STEP();
  1034. res = (s16)srcval * (s16)imm;
  1035. if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
  1036. (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
  1037. CLEAR_FLAG(F_CF);
  1038. CLEAR_FLAG(F_OF);
  1039. } else {
  1040. SET_FLAG(F_CF);
  1041. SET_FLAG(F_OF);
  1042. }
  1043. *destreg = (u16)res;
  1044. }
  1045. } else { /* register to register */
  1046. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1047. u32 *destreg,*srcreg;
  1048. u32 res_lo,res_hi;
  1049. destreg = DECODE_RM_LONG_REGISTER(rh);
  1050. DECODE_PRINTF(",");
  1051. srcreg = DECODE_RM_LONG_REGISTER(rl);
  1052. imm = fetch_byte_imm();
  1053. DECODE_PRINTF2(",%d\n", (s32)imm);
  1054. TRACE_AND_STEP();
  1055. imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm);
  1056. if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
  1057. (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
  1058. CLEAR_FLAG(F_CF);
  1059. CLEAR_FLAG(F_OF);
  1060. } else {
  1061. SET_FLAG(F_CF);
  1062. SET_FLAG(F_OF);
  1063. }
  1064. *destreg = (u32)res_lo;
  1065. } else {
  1066. u16 *destreg,*srcreg;
  1067. u32 res;
  1068. destreg = DECODE_RM_WORD_REGISTER(rh);
  1069. DECODE_PRINTF(",");
  1070. srcreg = DECODE_RM_WORD_REGISTER(rl);
  1071. imm = fetch_byte_imm();
  1072. DECODE_PRINTF2(",%d\n", (s32)imm);
  1073. TRACE_AND_STEP();
  1074. res = (s16)*srcreg * (s16)imm;
  1075. if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
  1076. (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
  1077. CLEAR_FLAG(F_CF);
  1078. CLEAR_FLAG(F_OF);
  1079. } else {
  1080. SET_FLAG(F_CF);
  1081. SET_FLAG(F_OF);
  1082. }
  1083. *destreg = (u16)res;
  1084. }
  1085. }
  1086. DECODE_CLEAR_SEGOVR();
  1087. END_OF_INSTR();
  1088. }
  1089. /****************************************************************************
  1090. REMARKS:
  1091. Handles opcode 0x6c
  1092. ****************************************************************************/
  1093. void x86emuOp_ins_byte(u8 X86EMU_UNUSED(op1))
  1094. {
  1095. START_OF_INSTR();
  1096. DECODE_PRINTF("INSB\n");
  1097. ins(1);
  1098. TRACE_AND_STEP();
  1099. DECODE_CLEAR_SEGOVR();
  1100. END_OF_INSTR();
  1101. }
  1102. /****************************************************************************
  1103. REMARKS:
  1104. Handles opcode 0x6d
  1105. ****************************************************************************/
  1106. void x86emuOp_ins_word(u8 X86EMU_UNUSED(op1))
  1107. {
  1108. START_OF_INSTR();
  1109. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1110. DECODE_PRINTF("INSD\n");
  1111. ins(4);
  1112. } else {
  1113. DECODE_PRINTF("INSW\n");
  1114. ins(2);
  1115. }
  1116. TRACE_AND_STEP();
  1117. DECODE_CLEAR_SEGOVR();
  1118. END_OF_INSTR();
  1119. }
  1120. /****************************************************************************
  1121. REMARKS:
  1122. Handles opcode 0x6e
  1123. ****************************************************************************/
  1124. void x86emuOp_outs_byte(u8 X86EMU_UNUSED(op1))
  1125. {
  1126. START_OF_INSTR();
  1127. DECODE_PRINTF("OUTSB\n");
  1128. outs(1);
  1129. TRACE_AND_STEP();
  1130. DECODE_CLEAR_SEGOVR();
  1131. END_OF_INSTR();
  1132. }
  1133. /****************************************************************************
  1134. REMARKS:
  1135. Handles opcode 0x6f
  1136. ****************************************************************************/
  1137. void x86emuOp_outs_word(u8 X86EMU_UNUSED(op1))
  1138. {
  1139. START_OF_INSTR();
  1140. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1141. DECODE_PRINTF("OUTSD\n");
  1142. outs(4);
  1143. } else {
  1144. DECODE_PRINTF("OUTSW\n");
  1145. outs(2);
  1146. }
  1147. TRACE_AND_STEP();
  1148. DECODE_CLEAR_SEGOVR();
  1149. END_OF_INSTR();
  1150. }
  1151. /****************************************************************************
  1152. REMARKS:
  1153. Handles opcode 0x70 - 0x7F
  1154. ****************************************************************************/
  1155. int x86emu_check_jump_condition(u8 op);
  1156. void x86emuOp_jump_near_cond(u8 op1)
  1157. {
  1158. s8 offset;
  1159. u16 target;
  1160. int cond;
  1161. /* jump to byte offset if overflow flag is set */
  1162. START_OF_INSTR();
  1163. cond = x86emu_check_jump_condition(op1 & 0xF);
  1164. offset = (s8)fetch_byte_imm();
  1165. target = (u16)(M.x86.R_IP + (s16)offset);
  1166. DECODE_PRINTF2("%x\n", target);
  1167. TRACE_AND_STEP();
  1168. if (cond)
  1169. M.x86.R_IP = target;
  1170. DECODE_CLEAR_SEGOVR();
  1171. END_OF_INSTR();
  1172. }
  1173. /****************************************************************************
  1174. REMARKS:
  1175. Handles opcode 0x80
  1176. ****************************************************************************/
  1177. void x86emuOp_opc80_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
  1178. {
  1179. int mod, rl, rh;
  1180. u8 *destreg;
  1181. uint destoffset;
  1182. u8 imm;
  1183. u8 destval;
  1184. /*
  1185. * Weirdo special case instruction format. Part of the opcode
  1186. * held below in "RH". Doubly nested case would result, except
  1187. * that the decoded instruction
  1188. */
  1189. START_OF_INSTR();
  1190. FETCH_DECODE_MODRM(mod, rh, rl);
  1191. #ifdef CONFIG_X86EMU_DEBUG
  1192. if (DEBUG_DECODE()) {
  1193. /* XXX DECODE_PRINTF may be changed to something more
  1194. general, so that it is important to leave the strings
  1195. in the same format, even though the result is that the
  1196. above test is done twice. */
  1197. switch (rh) {
  1198. case 0:
  1199. DECODE_PRINTF("ADD\t");
  1200. break;
  1201. case 1:
  1202. DECODE_PRINTF("OR\t");
  1203. break;
  1204. case 2:
  1205. DECODE_PRINTF("ADC\t");
  1206. break;
  1207. case 3:
  1208. DECODE_PRINTF("SBB\t");
  1209. break;
  1210. case 4:
  1211. DECODE_PRINTF("AND\t");
  1212. break;
  1213. case 5:
  1214. DECODE_PRINTF("SUB\t");
  1215. break;
  1216. case 6:
  1217. DECODE_PRINTF("XOR\t");
  1218. break;
  1219. case 7:
  1220. DECODE_PRINTF("CMP\t");
  1221. break;
  1222. }
  1223. }
  1224. #endif
  1225. /* know operation, decode the mod byte to find the addressing
  1226. mode. */
  1227. if (mod < 3) {
  1228. DECODE_PRINTF("BYTE PTR ");
  1229. destoffset = decode_rmXX_address(mod, rl);
  1230. DECODE_PRINTF(",");
  1231. destval = fetch_data_byte(destoffset);
  1232. imm = fetch_byte_imm();
  1233. DECODE_PRINTF2("%x\n", imm);
  1234. TRACE_AND_STEP();
  1235. destval = (*genop_byte_operation[rh]) (destval, imm);
  1236. if (rh != 7)
  1237. store_data_byte(destoffset, destval);
  1238. } else { /* register to register */
  1239. destreg = DECODE_RM_BYTE_REGISTER(rl);
  1240. DECODE_PRINTF(",");
  1241. imm = fetch_byte_imm();
  1242. DECODE_PRINTF2("%x\n", imm);
  1243. TRACE_AND_STEP();
  1244. destval = (*genop_byte_operation[rh]) (*destreg, imm);
  1245. if (rh != 7)
  1246. *destreg = destval;
  1247. }
  1248. DECODE_CLEAR_SEGOVR();
  1249. END_OF_INSTR();
  1250. }
  1251. /****************************************************************************
  1252. REMARKS:
  1253. Handles opcode 0x81
  1254. ****************************************************************************/
  1255. void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
  1256. {
  1257. int mod, rl, rh;
  1258. uint destoffset;
  1259. /*
  1260. * Weirdo special case instruction format. Part of the opcode
  1261. * held below in "RH". Doubly nested case would result, except
  1262. * that the decoded instruction
  1263. */
  1264. START_OF_INSTR();
  1265. FETCH_DECODE_MODRM(mod, rh, rl);
  1266. #ifdef CONFIG_X86EMU_DEBUG
  1267. if (DEBUG_DECODE()) {
  1268. /* XXX DECODE_PRINTF may be changed to something more
  1269. general, so that it is important to leave the strings
  1270. in the same format, even though the result is that the
  1271. above test is done twice. */
  1272. switch (rh) {
  1273. case 0:
  1274. DECODE_PRINTF("ADD\t");
  1275. break;
  1276. case 1:
  1277. DECODE_PRINTF("OR\t");
  1278. break;
  1279. case 2:
  1280. DECODE_PRINTF("ADC\t");
  1281. break;
  1282. case 3:
  1283. DECODE_PRINTF("SBB\t");
  1284. break;
  1285. case 4:
  1286. DECODE_PRINTF("AND\t");
  1287. break;
  1288. case 5:
  1289. DECODE_PRINTF("SUB\t");
  1290. break;
  1291. case 6:
  1292. DECODE_PRINTF("XOR\t");
  1293. break;
  1294. case 7:
  1295. DECODE_PRINTF("CMP\t");
  1296. break;
  1297. }
  1298. }
  1299. #endif
  1300. /*
  1301. * Know operation, decode the mod byte to find the addressing
  1302. * mode.
  1303. */
  1304. if (mod < 3) {
  1305. DECODE_PRINTF("DWORD PTR ");
  1306. destoffset = decode_rmXX_address(mod, rl);
  1307. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1308. u32 destval,imm;
  1309. DECODE_PRINTF(",");
  1310. destval = fetch_data_long(destoffset);
  1311. imm = fetch_long_imm();
  1312. DECODE_PRINTF2("%x\n", imm);
  1313. TRACE_AND_STEP();
  1314. destval = (*genop_long_operation[rh]) (destval, imm);
  1315. if (rh != 7)
  1316. store_data_long(destoffset, destval);
  1317. } else {
  1318. u16 destval,imm;
  1319. DECODE_PRINTF(",");
  1320. destval = fetch_data_word(destoffset);
  1321. imm = fetch_word_imm();
  1322. DECODE_PRINTF2("%x\n", imm);
  1323. TRACE_AND_STEP();
  1324. destval = (*genop_word_operation[rh]) (destval, imm);
  1325. if (rh != 7)
  1326. store_data_word(destoffset, destval);
  1327. }
  1328. } else { /* register to register */
  1329. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1330. u32 *destreg;
  1331. u32 destval,imm;
  1332. destreg = DECODE_RM_LONG_REGISTER(rl);
  1333. DECODE_PRINTF(",");
  1334. imm = fetch_long_imm();
  1335. DECODE_PRINTF2("%x\n", imm);
  1336. TRACE_AND_STEP();
  1337. destval = (*genop_long_operation[rh]) (*destreg, imm);
  1338. if (rh != 7)
  1339. *destreg = destval;
  1340. } else {
  1341. u16 *destreg;
  1342. u16 destval,imm;
  1343. destreg = DECODE_RM_WORD_REGISTER(rl);
  1344. DECODE_PRINTF(",");
  1345. imm = fetch_word_imm();
  1346. DECODE_PRINTF2("%x\n", imm);
  1347. TRACE_AND_STEP();
  1348. destval = (*genop_word_operation[rh]) (*destreg, imm);
  1349. if (rh != 7)
  1350. *destreg = destval;
  1351. }
  1352. }
  1353. DECODE_CLEAR_SEGOVR();
  1354. END_OF_INSTR();
  1355. }
  1356. /****************************************************************************
  1357. REMARKS:
  1358. Handles opcode 0x82
  1359. ****************************************************************************/
  1360. void x86emuOp_opc82_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
  1361. {
  1362. int mod, rl, rh;
  1363. u8 *destreg;
  1364. uint destoffset;
  1365. u8 imm;
  1366. u8 destval;
  1367. /*
  1368. * Weirdo special case instruction format. Part of the opcode
  1369. * held below in "RH". Doubly nested case would result, except
  1370. * that the decoded instruction Similar to opcode 81, except that
  1371. * the immediate byte is sign extended to a word length.
  1372. */
  1373. START_OF_INSTR();
  1374. FETCH_DECODE_MODRM(mod, rh, rl);
  1375. #ifdef CONFIG_X86EMU_DEBUG
  1376. if (DEBUG_DECODE()) {
  1377. /* XXX DECODE_PRINTF may be changed to something more
  1378. general, so that it is important to leave the strings
  1379. in the same format, even though the result is that the
  1380. above test is done twice. */
  1381. switch (rh) {
  1382. case 0:
  1383. DECODE_PRINTF("ADD\t");
  1384. break;
  1385. case 1:
  1386. DECODE_PRINTF("OR\t");
  1387. break;
  1388. case 2:
  1389. DECODE_PRINTF("ADC\t");
  1390. break;
  1391. case 3:
  1392. DECODE_PRINTF("SBB\t");
  1393. break;
  1394. case 4:
  1395. DECODE_PRINTF("AND\t");
  1396. break;
  1397. case 5:
  1398. DECODE_PRINTF("SUB\t");
  1399. break;
  1400. case 6:
  1401. DECODE_PRINTF("XOR\t");
  1402. break;
  1403. case 7:
  1404. DECODE_PRINTF("CMP\t");
  1405. break;
  1406. }
  1407. }
  1408. #endif
  1409. /* know operation, decode the mod byte to find the addressing
  1410. mode. */
  1411. if (mod < 3) {
  1412. DECODE_PRINTF("BYTE PTR ");
  1413. destoffset = decode_rmXX_address(mod, rl);
  1414. destval = fetch_data_byte(destoffset);
  1415. imm = fetch_byte_imm();
  1416. DECODE_PRINTF2(",%x\n", imm);
  1417. TRACE_AND_STEP();
  1418. destval = (*genop_byte_operation[rh]) (destval, imm);
  1419. if (rh != 7)
  1420. store_data_byte(destoffset, destval);
  1421. } else { /* register to register */
  1422. destreg = DECODE_RM_BYTE_REGISTER(rl);
  1423. imm = fetch_byte_imm();
  1424. DECODE_PRINTF2(",%x\n", imm);
  1425. TRACE_AND_STEP();
  1426. destval = (*genop_byte_operation[rh]) (*destreg, imm);
  1427. if (rh != 7)
  1428. *destreg = destval;
  1429. }
  1430. DECODE_CLEAR_SEGOVR();
  1431. END_OF_INSTR();
  1432. }
  1433. /****************************************************************************
  1434. REMARKS:
  1435. Handles opcode 0x83
  1436. ****************************************************************************/
  1437. void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
  1438. {
  1439. int mod, rl, rh;
  1440. uint destoffset;
  1441. /*
  1442. * Weirdo special case instruction format. Part of the opcode
  1443. * held below in "RH". Doubly nested case would result, except
  1444. * that the decoded instruction Similar to opcode 81, except that
  1445. * the immediate byte is sign extended to a word length.
  1446. */
  1447. START_OF_INSTR();
  1448. FETCH_DECODE_MODRM(mod, rh, rl);
  1449. #ifdef CONFIG_X86EMU_DEBUG
  1450. if (DEBUG_DECODE()) {
  1451. /* XXX DECODE_PRINTF may be changed to something more
  1452. general, so that it is important to leave the strings
  1453. in the same format, even though the result is that the
  1454. above test is done twice. */
  1455. switch (rh) {
  1456. case 0:
  1457. DECODE_PRINTF("ADD\t");
  1458. break;
  1459. case 1:
  1460. DECODE_PRINTF("OR\t");
  1461. break;
  1462. case 2:
  1463. DECODE_PRINTF("ADC\t");
  1464. break;
  1465. case 3:
  1466. DECODE_PRINTF("SBB\t");
  1467. break;
  1468. case 4:
  1469. DECODE_PRINTF("AND\t");
  1470. break;
  1471. case 5:
  1472. DECODE_PRINTF("SUB\t");
  1473. break;
  1474. case 6:
  1475. DECODE_PRINTF("XOR\t");
  1476. break;
  1477. case 7:
  1478. DECODE_PRINTF("CMP\t");
  1479. break;
  1480. }
  1481. }
  1482. #endif
  1483. /* know operation, decode the mod byte to find the addressing
  1484. mode. */
  1485. if (mod < 3) {
  1486. DECODE_PRINTF("DWORD PTR ");
  1487. destoffset = decode_rmXX_address(mod,rl);
  1488. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1489. u32 destval,imm;
  1490. destval = fetch_data_long(destoffset);
  1491. imm = (s8) fetch_byte_imm();
  1492. DECODE_PRINTF2(",%x\n", imm);
  1493. TRACE_AND_STEP();
  1494. destval = (*genop_long_operation[rh]) (destval, imm);
  1495. if (rh != 7)
  1496. store_data_long(destoffset, destval);
  1497. } else {
  1498. u16 destval,imm;
  1499. destval = fetch_data_word(destoffset);
  1500. imm = (s8) fetch_byte_imm();
  1501. DECODE_PRINTF2(",%x\n", imm);
  1502. TRACE_AND_STEP();
  1503. destval = (*genop_word_operation[rh]) (destval, imm);
  1504. if (rh != 7)
  1505. store_data_word(destoffset, destval);
  1506. }
  1507. } else { /* register to register */
  1508. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1509. u32 *destreg;
  1510. u32 destval,imm;
  1511. destreg = DECODE_RM_LONG_REGISTER(rl);
  1512. imm = (s8) fetch_byte_imm();
  1513. DECODE_PRINTF2(",%x\n", imm);
  1514. TRACE_AND_STEP();
  1515. destval = (*genop_long_operation[rh]) (*destreg, imm);
  1516. if (rh != 7)
  1517. *destreg = destval;
  1518. } else {
  1519. u16 *destreg;
  1520. u16 destval,imm;
  1521. destreg = DECODE_RM_WORD_REGISTER(rl);
  1522. imm = (s8) fetch_byte_imm();
  1523. DECODE_PRINTF2(",%x\n", imm);
  1524. TRACE_AND_STEP();
  1525. destval = (*genop_word_operation[rh]) (*destreg, imm);
  1526. if (rh != 7)
  1527. *destreg = destval;
  1528. }
  1529. }
  1530. DECODE_CLEAR_SEGOVR();
  1531. END_OF_INSTR();
  1532. }
  1533. /****************************************************************************
  1534. REMARKS:
  1535. Handles opcode 0x84
  1536. ****************************************************************************/
  1537. void x86emuOp_test_byte_RM_R(u8 X86EMU_UNUSED(op1))
  1538. {
  1539. int mod, rl, rh;
  1540. u8 *destreg, *srcreg;
  1541. uint destoffset;
  1542. u8 destval;
  1543. START_OF_INSTR();
  1544. DECODE_PRINTF("TEST\t");
  1545. FETCH_DECODE_MODRM(mod, rh, rl);
  1546. if (mod < 3) {
  1547. destoffset = decode_rmXX_address(mod, rl);
  1548. DECODE_PRINTF(",");
  1549. destval = fetch_data_byte(destoffset);
  1550. srcreg = DECODE_RM_BYTE_REGISTER(rh);
  1551. DECODE_PRINTF("\n");
  1552. TRACE_AND_STEP();
  1553. test_byte(destval, *srcreg);
  1554. } else { /* register to register */
  1555. destreg = DECODE_RM_BYTE_REGISTER(rl);
  1556. DECODE_PRINTF(",");
  1557. srcreg = DECODE_RM_BYTE_REGISTER(rh);
  1558. DECODE_PRINTF("\n");
  1559. TRACE_AND_STEP();
  1560. test_byte(*destreg, *srcreg);
  1561. }
  1562. DECODE_CLEAR_SEGOVR();
  1563. END_OF_INSTR();
  1564. }
  1565. /****************************************************************************
  1566. REMARKS:
  1567. Handles opcode 0x85
  1568. ****************************************************************************/
  1569. void x86emuOp_test_word_RM_R(u8 X86EMU_UNUSED(op1))
  1570. {
  1571. int mod, rl, rh;
  1572. uint destoffset;
  1573. START_OF_INSTR();
  1574. DECODE_PRINTF("TEST\t");
  1575. FETCH_DECODE_MODRM(mod, rh, rl);
  1576. if (mod < 3) {
  1577. destoffset = decode_rmXX_address(mod, rl);
  1578. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1579. u32 destval;
  1580. u32 *srcreg;
  1581. DECODE_PRINTF(",");
  1582. destval = fetch_data_long(destoffset);
  1583. srcreg = DECODE_RM_LONG_REGISTER(rh);
  1584. DECODE_PRINTF("\n");
  1585. TRACE_AND_STEP();
  1586. test_long(destval, *srcreg);
  1587. } else {
  1588. u16 destval;
  1589. u16 *srcreg;
  1590. DECODE_PRINTF(",");
  1591. destval = fetch_data_word(destoffset);
  1592. srcreg = DECODE_RM_WORD_REGISTER(rh);
  1593. DECODE_PRINTF("\n");
  1594. TRACE_AND_STEP();
  1595. test_word(destval, *srcreg);
  1596. }
  1597. } else { /* register to register */
  1598. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1599. u32 *destreg,*srcreg;
  1600. destreg = DECODE_RM_LONG_REGISTER(rl);
  1601. DECODE_PRINTF(",");
  1602. srcreg = DECODE_RM_LONG_REGISTER(rh);
  1603. DECODE_PRINTF("\n");
  1604. TRACE_AND_STEP();
  1605. test_long(*destreg, *srcreg);
  1606. } else {
  1607. u16 *destreg,*srcreg;
  1608. destreg = DECODE_RM_WORD_REGISTER(rl);
  1609. DECODE_PRINTF(",");
  1610. srcreg = DECODE_RM_WORD_REGISTER(rh);
  1611. DECODE_PRINTF("\n");
  1612. TRACE_AND_STEP();
  1613. test_word(*destreg, *srcreg);
  1614. }
  1615. }
  1616. DECODE_CLEAR_SEGOVR();
  1617. END_OF_INSTR();
  1618. }
  1619. /****************************************************************************
  1620. REMARKS:
  1621. Handles opcode 0x86
  1622. ****************************************************************************/
  1623. void x86emuOp_xchg_byte_RM_R(u8 X86EMU_UNUSED(op1))
  1624. {
  1625. int mod, rl, rh;
  1626. u8 *destreg, *srcreg;
  1627. uint destoffset;
  1628. u8 destval;
  1629. u8 tmp;
  1630. START_OF_INSTR();
  1631. DECODE_PRINTF("XCHG\t");
  1632. FETCH_DECODE_MODRM(mod, rh, rl);
  1633. if (mod < 3) {
  1634. destoffset = decode_rmXX_address(mod, rl);
  1635. DECODE_PRINTF(",");
  1636. destval = fetch_data_byte(destoffset);
  1637. srcreg = DECODE_RM_BYTE_REGISTER(rh);
  1638. DECODE_PRINTF("\n");
  1639. TRACE_AND_STEP();
  1640. tmp = *srcreg;
  1641. *srcreg = destval;
  1642. destval = tmp;
  1643. store_data_byte(destoffset, destval);
  1644. } else { /* register to register */
  1645. destreg = DECODE_RM_BYTE_REGISTER(rl);
  1646. DECODE_PRINTF(",");
  1647. srcreg = DECODE_RM_BYTE_REGISTER(rh);
  1648. DECODE_PRINTF("\n");
  1649. TRACE_AND_STEP();
  1650. tmp = *srcreg;
  1651. *srcreg = *destreg;
  1652. *destreg = tmp;
  1653. }
  1654. DECODE_CLEAR_SEGOVR();
  1655. END_OF_INSTR();
  1656. }
  1657. /****************************************************************************
  1658. REMARKS:
  1659. Handles opcode 0x87
  1660. ****************************************************************************/
  1661. void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
  1662. {
  1663. int mod, rl, rh;
  1664. uint destoffset;
  1665. START_OF_INSTR();
  1666. DECODE_PRINTF("XCHG\t");
  1667. FETCH_DECODE_MODRM(mod, rh, rl);
  1668. if (mod < 3) {
  1669. destoffset = decode_rmXX_address(mod, rl);
  1670. DECODE_PRINTF(",");
  1671. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1672. u32 *srcreg;
  1673. u32 destval,tmp;
  1674. destval = fetch_data_long(destoffset);
  1675. srcreg = DECODE_RM_LONG_REGISTER(rh);
  1676. DECODE_PRINTF("\n");
  1677. TRACE_AND_STEP();
  1678. tmp = *srcreg;
  1679. *srcreg = destval;
  1680. destval = tmp;
  1681. store_data_long(destoffset, destval);
  1682. } else {
  1683. u16 *srcreg;
  1684. u16 destval,tmp;
  1685. destval = fetch_data_word(destoffset);
  1686. srcreg = DECODE_RM_WORD_REGISTER(rh);
  1687. DECODE_PRINTF("\n");
  1688. TRACE_AND_STEP();
  1689. tmp = *srcreg;
  1690. *srcreg = destval;
  1691. destval = tmp;
  1692. store_data_word(destoffset, destval);
  1693. }
  1694. } else { /* register to register */
  1695. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1696. u32 *destreg,*srcreg;
  1697. u32 tmp;
  1698. destreg = DECODE_RM_LONG_REGISTER(rl);
  1699. DECODE_PRINTF(",");
  1700. srcreg = DECODE_RM_LONG_REGISTER(rh);
  1701. DECODE_PRINTF("\n");
  1702. TRACE_AND_STEP();
  1703. tmp = *srcreg;
  1704. *srcreg = *destreg;
  1705. *destreg = tmp;
  1706. } else {
  1707. u16 *destreg,*srcreg;
  1708. u16 tmp;
  1709. destreg = DECODE_RM_WORD_REGISTER(rl);
  1710. DECODE_PRINTF(",");
  1711. srcreg = DECODE_RM_WORD_REGISTER(rh);
  1712. DECODE_PRINTF("\n");
  1713. TRACE_AND_STEP();
  1714. tmp = *srcreg;
  1715. *srcreg = *destreg;
  1716. *destreg = tmp;
  1717. }
  1718. }
  1719. DECODE_CLEAR_SEGOVR();
  1720. END_OF_INSTR();
  1721. }
  1722. /****************************************************************************
  1723. REMARKS:
  1724. Handles opcode 0x88
  1725. ****************************************************************************/
  1726. void x86emuOp_mov_byte_RM_R(u8 X86EMU_UNUSED(op1))
  1727. {
  1728. int mod, rl, rh;
  1729. u8 *destreg, *srcreg;
  1730. uint destoffset;
  1731. START_OF_INSTR();
  1732. DECODE_PRINTF("MOV\t");
  1733. FETCH_DECODE_MODRM(mod, rh, rl);
  1734. if (mod < 3) {
  1735. destoffset = decode_rmXX_address(mod, rl);
  1736. DECODE_PRINTF(",");
  1737. srcreg = DECODE_RM_BYTE_REGISTER(rh);
  1738. DECODE_PRINTF("\n");
  1739. TRACE_AND_STEP();
  1740. store_data_byte(destoffset, *srcreg);
  1741. } else { /* register to register */
  1742. destreg = DECODE_RM_BYTE_REGISTER(rl);
  1743. DECODE_PRINTF(",");
  1744. srcreg = DECODE_RM_BYTE_REGISTER(rh);
  1745. DECODE_PRINTF("\n");
  1746. TRACE_AND_STEP();
  1747. *destreg = *srcreg;
  1748. }
  1749. DECODE_CLEAR_SEGOVR();
  1750. END_OF_INSTR();
  1751. }
  1752. /****************************************************************************
  1753. REMARKS:
  1754. Handles opcode 0x89
  1755. ****************************************************************************/
  1756. void x86emuOp_mov_word_RM_R(u8 X86EMU_UNUSED(op1))
  1757. {
  1758. int mod, rl, rh;
  1759. uint destoffset;
  1760. START_OF_INSTR();
  1761. DECODE_PRINTF("MOV\t");
  1762. FETCH_DECODE_MODRM(mod, rh, rl);
  1763. if (mod < 3) {
  1764. destoffset = decode_rmXX_address(mod, rl);
  1765. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1766. u32 *srcreg;
  1767. DECODE_PRINTF(",");
  1768. srcreg = DECODE_RM_LONG_REGISTER(rh);
  1769. DECODE_PRINTF("\n");
  1770. TRACE_AND_STEP();
  1771. store_data_long(destoffset, *srcreg);
  1772. } else {
  1773. u16 *srcreg;
  1774. DECODE_PRINTF(",");
  1775. srcreg = DECODE_RM_WORD_REGISTER(rh);
  1776. DECODE_PRINTF("\n");
  1777. TRACE_AND_STEP();
  1778. store_data_word(destoffset, *srcreg);
  1779. }
  1780. } else { /* register to register */
  1781. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1782. u32 *destreg,*srcreg;
  1783. destreg = DECODE_RM_LONG_REGISTER(rl);
  1784. DECODE_PRINTF(",");
  1785. srcreg = DECODE_RM_LONG_REGISTER(rh);
  1786. DECODE_PRINTF("\n");
  1787. TRACE_AND_STEP();
  1788. *destreg = *srcreg;
  1789. } else {
  1790. u16 *destreg,*srcreg;
  1791. destreg = DECODE_RM_WORD_REGISTER(rl);
  1792. DECODE_PRINTF(",");
  1793. srcreg = DECODE_RM_WORD_REGISTER(rh);
  1794. DECODE_PRINTF("\n");
  1795. TRACE_AND_STEP();
  1796. *destreg = *srcreg;
  1797. }
  1798. }
  1799. DECODE_CLEAR_SEGOVR();
  1800. END_OF_INSTR();
  1801. }
  1802. /****************************************************************************
  1803. REMARKS:
  1804. Handles opcode 0x8a
  1805. ****************************************************************************/
  1806. void x86emuOp_mov_byte_R_RM(u8 X86EMU_UNUSED(op1))
  1807. {
  1808. int mod, rl, rh;
  1809. u8 *destreg, *srcreg;
  1810. uint srcoffset;
  1811. u8 srcval;
  1812. START_OF_INSTR();
  1813. DECODE_PRINTF("MOV\t");
  1814. FETCH_DECODE_MODRM(mod, rh, rl);
  1815. if (mod < 3) {
  1816. destreg = DECODE_RM_BYTE_REGISTER(rh);
  1817. DECODE_PRINTF(",");
  1818. srcoffset = decode_rmXX_address(mod, rl);
  1819. srcval = fetch_data_byte(srcoffset);
  1820. DECODE_PRINTF("\n");
  1821. TRACE_AND_STEP();
  1822. *destreg = srcval;
  1823. } else { /* register to register */
  1824. destreg = DECODE_RM_BYTE_REGISTER(rh);
  1825. DECODE_PRINTF(",");
  1826. srcreg = DECODE_RM_BYTE_REGISTER(rl);
  1827. DECODE_PRINTF("\n");
  1828. TRACE_AND_STEP();
  1829. *destreg = *srcreg;
  1830. }
  1831. DECODE_CLEAR_SEGOVR();
  1832. END_OF_INSTR();
  1833. }
  1834. /****************************************************************************
  1835. REMARKS:
  1836. Handles opcode 0x8b
  1837. ****************************************************************************/
  1838. void x86emuOp_mov_word_R_RM(u8 X86EMU_UNUSED(op1))
  1839. {
  1840. int mod, rl, rh;
  1841. uint srcoffset;
  1842. START_OF_INSTR();
  1843. DECODE_PRINTF("MOV\t");
  1844. FETCH_DECODE_MODRM(mod, rh, rl);
  1845. if (mod < 3) {
  1846. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1847. u32 *destreg;
  1848. u32 srcval;
  1849. destreg = DECODE_RM_LONG_REGISTER(rh);
  1850. DECODE_PRINTF(",");
  1851. srcoffset = decode_rmXX_address(mod, rl);
  1852. srcval = fetch_data_long(srcoffset);
  1853. DECODE_PRINTF("\n");
  1854. TRACE_AND_STEP();
  1855. *destreg = srcval;
  1856. } else {
  1857. u16 *destreg;
  1858. u16 srcval;
  1859. destreg = DECODE_RM_WORD_REGISTER(rh);
  1860. DECODE_PRINTF(",");
  1861. srcoffset = decode_rmXX_address(mod, rl);
  1862. srcval = fetch_data_word(srcoffset);
  1863. DECODE_PRINTF("\n");
  1864. TRACE_AND_STEP();
  1865. *destreg = srcval;
  1866. }
  1867. } else { /* register to register */
  1868. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  1869. u32 *destreg, *srcreg;
  1870. destreg = DECODE_RM_LONG_REGISTER(rh);
  1871. DECODE_PRINTF(",");
  1872. srcreg = DECODE_RM_LONG_REGISTER(rl);
  1873. DECODE_PRINTF("\n");
  1874. TRACE_AND_STEP();
  1875. *destreg = *srcreg;
  1876. } else {
  1877. u16 *destreg, *srcreg;
  1878. destreg = DECODE_RM_WORD_REGISTER(rh);
  1879. DECODE_PRINTF(",");
  1880. srcreg = DECODE_RM_WORD_REGISTER(rl);
  1881. DECODE_PRINTF("\n");
  1882. TRACE_AND_STEP();
  1883. *destreg = *srcreg;
  1884. }
  1885. }
  1886. DECODE_CLEAR_SEGOVR();
  1887. END_OF_INSTR();
  1888. }
  1889. /****************************************************************************
  1890. REMARKS:
  1891. Handles opcode 0x8c
  1892. ****************************************************************************/
  1893. void x86emuOp_mov_word_RM_SR(u8 X86EMU_UNUSED(op1))
  1894. {
  1895. int mod, rl, rh;
  1896. u16 *destreg, *srcreg;
  1897. uint destoffset;
  1898. u16 destval;
  1899. START_OF_INSTR();
  1900. DECODE_PRINTF("MOV\t");
  1901. FETCH_DECODE_MODRM(mod, rh, rl);
  1902. if (mod < 3) {
  1903. destoffset = decode_rmXX_address(mod, rl);
  1904. DECODE_PRINTF(",");
  1905. srcreg = decode_rm_seg_register(rh);
  1906. DECODE_PRINTF("\n");
  1907. TRACE_AND_STEP();
  1908. destval = *srcreg;
  1909. store_data_word(destoffset, destval);
  1910. } else { /* register to register */
  1911. destreg = DECODE_RM_WORD_REGISTER(rl);
  1912. DECODE_PRINTF(",");
  1913. srcreg = decode_rm_seg_register(rh);
  1914. DECODE_PRINTF("\n");
  1915. TRACE_AND_STEP();
  1916. *destreg = *srcreg;
  1917. }
  1918. DECODE_CLEAR_SEGOVR();
  1919. END_OF_INSTR();
  1920. }
  1921. /****************************************************************************
  1922. REMARKS:
  1923. Handles opcode 0x8d
  1924. ****************************************************************************/
  1925. void x86emuOp_lea_word_R_M(u8 X86EMU_UNUSED(op1))
  1926. {
  1927. int mod, rl, rh;
  1928. u16 *srcreg;
  1929. uint destoffset;
  1930. /*
  1931. * TODO: Need to handle address size prefix!
  1932. *
  1933. * lea eax,[eax+ebx*2] ??
  1934. */
  1935. START_OF_INSTR();
  1936. DECODE_PRINTF("LEA\t");
  1937. FETCH_DECODE_MODRM(mod, rh, rl);
  1938. if (mod < 3) {
  1939. srcreg = DECODE_RM_WORD_REGISTER(rh);
  1940. DECODE_PRINTF(",");
  1941. destoffset = decode_rmXX_address(mod, rl);
  1942. DECODE_PRINTF("\n");
  1943. TRACE_AND_STEP();
  1944. *srcreg = (u16)destoffset;
  1945. }
  1946. /* } else { undefined. Do nothing. } */
  1947. DECODE_CLEAR_SEGOVR();
  1948. END_OF_INSTR();
  1949. }
  1950. /****************************************************************************
  1951. REMARKS:
  1952. Handles opcode 0x8e
  1953. ****************************************************************************/
  1954. void x86emuOp_mov_word_SR_RM(u8 X86EMU_UNUSED(op1))
  1955. {
  1956. int mod, rl, rh;
  1957. u16 *destreg, *srcreg;
  1958. uint srcoffset;
  1959. u16 srcval;
  1960. START_OF_INSTR();
  1961. DECODE_PRINTF("MOV\t");
  1962. FETCH_DECODE_MODRM(mod, rh, rl);
  1963. if (mod < 3) {
  1964. destreg = decode_rm_seg_register(rh);
  1965. DECODE_PRINTF(",");
  1966. srcoffset = decode_rmXX_address(mod, rl);
  1967. srcval = fetch_data_word(srcoffset);
  1968. DECODE_PRINTF("\n");
  1969. TRACE_AND_STEP();
  1970. *destreg = srcval;
  1971. } else { /* register to register */
  1972. destreg = decode_rm_seg_register(rh);
  1973. DECODE_PRINTF(",");
  1974. srcreg = DECODE_RM_WORD_REGISTER(rl);
  1975. DECODE_PRINTF("\n");
  1976. TRACE_AND_STEP();
  1977. *destreg = *srcreg;
  1978. }
  1979. /*
  1980. * Clean up, and reset all the R_xSP pointers to the correct
  1981. * locations. This is about 3x too much overhead (doing all the
  1982. * segreg ptrs when only one is needed, but this instruction
  1983. * *cannot* be that common, and this isn't too much work anyway.
  1984. */
  1985. DECODE_CLEAR_SEGOVR();
  1986. END_OF_INSTR();
  1987. }
  1988. /****************************************************************************
  1989. REMARKS:
  1990. Handles opcode 0x8f
  1991. ****************************************************************************/
  1992. void x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))
  1993. {
  1994. int mod, rl, rh;
  1995. uint destoffset;
  1996. START_OF_INSTR();
  1997. DECODE_PRINTF("POP\t");
  1998. FETCH_DECODE_MODRM(mod, rh, rl);
  1999. if (rh != 0) {
  2000. ERR_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n");
  2001. HALT_SYS();
  2002. }
  2003. if (mod < 3) {
  2004. destoffset = decode_rmXX_address(mod, rl);
  2005. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2006. u32 destval;
  2007. DECODE_PRINTF("\n");
  2008. TRACE_AND_STEP();
  2009. destval = pop_long();
  2010. store_data_long(destoffset, destval);
  2011. } else {
  2012. u16 destval;
  2013. DECODE_PRINTF("\n");
  2014. TRACE_AND_STEP();
  2015. destval = pop_word();
  2016. store_data_word(destoffset, destval);
  2017. }
  2018. } else { /* register to register */
  2019. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2020. u32 *destreg;
  2021. destreg = DECODE_RM_LONG_REGISTER(rl);
  2022. DECODE_PRINTF("\n");
  2023. TRACE_AND_STEP();
  2024. *destreg = pop_long();
  2025. } else {
  2026. u16 *destreg;
  2027. destreg = DECODE_RM_WORD_REGISTER(rl);
  2028. DECODE_PRINTF("\n");
  2029. TRACE_AND_STEP();
  2030. *destreg = pop_word();
  2031. }
  2032. }
  2033. DECODE_CLEAR_SEGOVR();
  2034. END_OF_INSTR();
  2035. }
  2036. /****************************************************************************
  2037. REMARKS:
  2038. Handles opcode 0x90
  2039. ****************************************************************************/
  2040. void x86emuOp_nop(u8 X86EMU_UNUSED(op1))
  2041. {
  2042. START_OF_INSTR();
  2043. DECODE_PRINTF("NOP\n");
  2044. TRACE_AND_STEP();
  2045. DECODE_CLEAR_SEGOVR();
  2046. END_OF_INSTR();
  2047. }
  2048. /****************************************************************************
  2049. REMARKS:
  2050. Handles opcode 0x91-0x97
  2051. ****************************************************************************/
  2052. void x86emuOp_xchg_word_AX_register(u8 X86EMU_UNUSED(op1))
  2053. {
  2054. u32 tmp;
  2055. op1 &= 0x7;
  2056. START_OF_INSTR();
  2057. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2058. u32 *reg32;
  2059. DECODE_PRINTF("XCHG\tEAX,");
  2060. reg32 = DECODE_RM_LONG_REGISTER(op1);
  2061. DECODE_PRINTF("\n");
  2062. TRACE_AND_STEP();
  2063. tmp = M.x86.R_EAX;
  2064. M.x86.R_EAX = *reg32;
  2065. *reg32 = tmp;
  2066. } else {
  2067. u16 *reg16;
  2068. DECODE_PRINTF("XCHG\tAX,");
  2069. reg16 = DECODE_RM_WORD_REGISTER(op1);
  2070. DECODE_PRINTF("\n");
  2071. TRACE_AND_STEP();
  2072. tmp = M.x86.R_AX;
  2073. M.x86.R_EAX = *reg16;
  2074. *reg16 = (u16)tmp;
  2075. }
  2076. DECODE_CLEAR_SEGOVR();
  2077. END_OF_INSTR();
  2078. }
  2079. /****************************************************************************
  2080. REMARKS:
  2081. Handles opcode 0x98
  2082. ****************************************************************************/
  2083. void x86emuOp_cbw(u8 X86EMU_UNUSED(op1))
  2084. {
  2085. START_OF_INSTR();
  2086. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2087. DECODE_PRINTF("CWDE\n");
  2088. } else {
  2089. DECODE_PRINTF("CBW\n");
  2090. }
  2091. TRACE_AND_STEP();
  2092. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2093. if (M.x86.R_AX & 0x8000) {
  2094. M.x86.R_EAX |= 0xffff0000;
  2095. } else {
  2096. M.x86.R_EAX &= 0x0000ffff;
  2097. }
  2098. } else {
  2099. if (M.x86.R_AL & 0x80) {
  2100. M.x86.R_AH = 0xff;
  2101. } else {
  2102. M.x86.R_AH = 0x0;
  2103. }
  2104. }
  2105. DECODE_CLEAR_SEGOVR();
  2106. END_OF_INSTR();
  2107. }
  2108. /****************************************************************************
  2109. REMARKS:
  2110. Handles opcode 0x99
  2111. ****************************************************************************/
  2112. void x86emuOp_cwd(u8 X86EMU_UNUSED(op1))
  2113. {
  2114. START_OF_INSTR();
  2115. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2116. DECODE_PRINTF("CDQ\n");
  2117. } else {
  2118. DECODE_PRINTF("CWD\n");
  2119. }
  2120. DECODE_PRINTF("CWD\n");
  2121. TRACE_AND_STEP();
  2122. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2123. if (M.x86.R_EAX & 0x80000000) {
  2124. M.x86.R_EDX = 0xffffffff;
  2125. } else {
  2126. M.x86.R_EDX = 0x0;
  2127. }
  2128. } else {
  2129. if (M.x86.R_AX & 0x8000) {
  2130. M.x86.R_DX = 0xffff;
  2131. } else {
  2132. M.x86.R_DX = 0x0;
  2133. }
  2134. }
  2135. DECODE_CLEAR_SEGOVR();
  2136. END_OF_INSTR();
  2137. }
  2138. /****************************************************************************
  2139. REMARKS:
  2140. Handles opcode 0x9a
  2141. ****************************************************************************/
  2142. void x86emuOp_call_far_IMM(u8 X86EMU_UNUSED(op1))
  2143. {
  2144. u16 farseg, faroff;
  2145. START_OF_INSTR();
  2146. DECODE_PRINTF("CALL\t");
  2147. faroff = fetch_word_imm();
  2148. farseg = fetch_word_imm();
  2149. DECODE_PRINTF2("%04x:", farseg);
  2150. DECODE_PRINTF2("%04x\n", faroff);
  2151. CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, farseg, faroff, "FAR ");
  2152. /* XXX
  2153. *
  2154. * Hooked interrupt vectors calling into our "BIOS" will cause
  2155. * problems unless all intersegment stuff is checked for BIOS
  2156. * access. Check needed here. For moment, let it alone.
  2157. */
  2158. TRACE_AND_STEP();
  2159. push_word(M.x86.R_CS);
  2160. M.x86.R_CS = farseg;
  2161. push_word(M.x86.R_IP);
  2162. M.x86.R_IP = faroff;
  2163. DECODE_CLEAR_SEGOVR();
  2164. END_OF_INSTR();
  2165. }
  2166. /****************************************************************************
  2167. REMARKS:
  2168. Handles opcode 0x9b
  2169. ****************************************************************************/
  2170. void x86emuOp_wait(u8 X86EMU_UNUSED(op1))
  2171. {
  2172. START_OF_INSTR();
  2173. DECODE_PRINTF("WAIT");
  2174. TRACE_AND_STEP();
  2175. /* NADA. */
  2176. DECODE_CLEAR_SEGOVR();
  2177. END_OF_INSTR();
  2178. }
  2179. /****************************************************************************
  2180. REMARKS:
  2181. Handles opcode 0x9c
  2182. ****************************************************************************/
  2183. void x86emuOp_pushf_word(u8 X86EMU_UNUSED(op1))
  2184. {
  2185. u32 flags;
  2186. START_OF_INSTR();
  2187. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2188. DECODE_PRINTF("PUSHFD\n");
  2189. } else {
  2190. DECODE_PRINTF("PUSHF\n");
  2191. }
  2192. TRACE_AND_STEP();
  2193. /* clear out *all* bits not representing flags, and turn on real bits */
  2194. flags = (M.x86.R_EFLG & F_MSK) | F_ALWAYS_ON;
  2195. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2196. push_long(flags);
  2197. } else {
  2198. push_word((u16)flags);
  2199. }
  2200. DECODE_CLEAR_SEGOVR();
  2201. END_OF_INSTR();
  2202. }
  2203. /****************************************************************************
  2204. REMARKS:
  2205. Handles opcode 0x9d
  2206. ****************************************************************************/
  2207. void x86emuOp_popf_word(u8 X86EMU_UNUSED(op1))
  2208. {
  2209. START_OF_INSTR();
  2210. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2211. DECODE_PRINTF("POPFD\n");
  2212. } else {
  2213. DECODE_PRINTF("POPF\n");
  2214. }
  2215. TRACE_AND_STEP();
  2216. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2217. M.x86.R_EFLG = pop_long();
  2218. } else {
  2219. M.x86.R_FLG = pop_word();
  2220. }
  2221. DECODE_CLEAR_SEGOVR();
  2222. END_OF_INSTR();
  2223. }
  2224. /****************************************************************************
  2225. REMARKS:
  2226. Handles opcode 0x9e
  2227. ****************************************************************************/
  2228. void x86emuOp_sahf(u8 X86EMU_UNUSED(op1))
  2229. {
  2230. START_OF_INSTR();
  2231. DECODE_PRINTF("SAHF\n");
  2232. TRACE_AND_STEP();
  2233. /* clear the lower bits of the flag register */
  2234. M.x86.R_FLG &= 0xffffff00;
  2235. /* or in the AH register into the flags register */
  2236. M.x86.R_FLG |= M.x86.R_AH;
  2237. DECODE_CLEAR_SEGOVR();
  2238. END_OF_INSTR();
  2239. }
  2240. /****************************************************************************
  2241. REMARKS:
  2242. Handles opcode 0x9f
  2243. ****************************************************************************/
  2244. void x86emuOp_lahf(u8 X86EMU_UNUSED(op1))
  2245. {
  2246. START_OF_INSTR();
  2247. DECODE_PRINTF("LAHF\n");
  2248. TRACE_AND_STEP();
  2249. M.x86.R_AH = (u8)(M.x86.R_FLG & 0xff);
  2250. /*undocumented TC++ behavior??? Nope. It's documented, but
  2251. you have too look real hard to notice it. */
  2252. M.x86.R_AH |= 0x2;
  2253. DECODE_CLEAR_SEGOVR();
  2254. END_OF_INSTR();
  2255. }
  2256. /****************************************************************************
  2257. REMARKS:
  2258. Handles opcode 0xa0
  2259. ****************************************************************************/
  2260. void x86emuOp_mov_AL_M_IMM(u8 X86EMU_UNUSED(op1))
  2261. {
  2262. u16 offset;
  2263. START_OF_INSTR();
  2264. DECODE_PRINTF("MOV\tAL,");
  2265. offset = fetch_word_imm();
  2266. DECODE_PRINTF2("[%04x]\n", offset);
  2267. TRACE_AND_STEP();
  2268. M.x86.R_AL = fetch_data_byte(offset);
  2269. DECODE_CLEAR_SEGOVR();
  2270. END_OF_INSTR();
  2271. }
  2272. /****************************************************************************
  2273. REMARKS:
  2274. Handles opcode 0xa1
  2275. ****************************************************************************/
  2276. void x86emuOp_mov_AX_M_IMM(u8 X86EMU_UNUSED(op1))
  2277. {
  2278. u16 offset;
  2279. START_OF_INSTR();
  2280. offset = fetch_word_imm();
  2281. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2282. DECODE_PRINTF2("MOV\tEAX,[%04x]\n", offset);
  2283. } else {
  2284. DECODE_PRINTF2("MOV\tAX,[%04x]\n", offset);
  2285. }
  2286. TRACE_AND_STEP();
  2287. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2288. M.x86.R_EAX = fetch_data_long(offset);
  2289. } else {
  2290. M.x86.R_AX = fetch_data_word(offset);
  2291. }
  2292. DECODE_CLEAR_SEGOVR();
  2293. END_OF_INSTR();
  2294. }
  2295. /****************************************************************************
  2296. REMARKS:
  2297. Handles opcode 0xa2
  2298. ****************************************************************************/
  2299. void x86emuOp_mov_M_AL_IMM(u8 X86EMU_UNUSED(op1))
  2300. {
  2301. u16 offset;
  2302. START_OF_INSTR();
  2303. DECODE_PRINTF("MOV\t");
  2304. offset = fetch_word_imm();
  2305. DECODE_PRINTF2("[%04x],AL\n", offset);
  2306. TRACE_AND_STEP();
  2307. store_data_byte(offset, M.x86.R_AL);
  2308. DECODE_CLEAR_SEGOVR();
  2309. END_OF_INSTR();
  2310. }
  2311. /****************************************************************************
  2312. REMARKS:
  2313. Handles opcode 0xa3
  2314. ****************************************************************************/
  2315. void x86emuOp_mov_M_AX_IMM(u8 X86EMU_UNUSED(op1))
  2316. {
  2317. u16 offset;
  2318. START_OF_INSTR();
  2319. offset = fetch_word_imm();
  2320. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2321. DECODE_PRINTF2("MOV\t[%04x],EAX\n", offset);
  2322. } else {
  2323. DECODE_PRINTF2("MOV\t[%04x],AX\n", offset);
  2324. }
  2325. TRACE_AND_STEP();
  2326. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2327. store_data_long(offset, M.x86.R_EAX);
  2328. } else {
  2329. store_data_word(offset, M.x86.R_AX);
  2330. }
  2331. DECODE_CLEAR_SEGOVR();
  2332. END_OF_INSTR();
  2333. }
  2334. /****************************************************************************
  2335. REMARKS:
  2336. Handles opcode 0xa4
  2337. ****************************************************************************/
  2338. void x86emuOp_movs_byte(u8 X86EMU_UNUSED(op1))
  2339. {
  2340. u8 val;
  2341. u32 count;
  2342. int inc;
  2343. START_OF_INSTR();
  2344. DECODE_PRINTF("MOVS\tBYTE\n");
  2345. if (ACCESS_FLAG(F_DF)) /* down */
  2346. inc = -1;
  2347. else
  2348. inc = 1;
  2349. TRACE_AND_STEP();
  2350. count = 1;
  2351. if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
  2352. /* dont care whether REPE or REPNE */
  2353. /* move them until CX is ZERO. */
  2354. count = M.x86.R_CX;
  2355. M.x86.R_CX = 0;
  2356. M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
  2357. }
  2358. while (count--) {
  2359. val = fetch_data_byte(M.x86.R_SI);
  2360. store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, val);
  2361. M.x86.R_SI += inc;
  2362. M.x86.R_DI += inc;
  2363. }
  2364. DECODE_CLEAR_SEGOVR();
  2365. END_OF_INSTR();
  2366. }
  2367. /****************************************************************************
  2368. REMARKS:
  2369. Handles opcode 0xa5
  2370. ****************************************************************************/
  2371. void x86emuOp_movs_word(u8 X86EMU_UNUSED(op1))
  2372. {
  2373. u32 val;
  2374. int inc;
  2375. u32 count;
  2376. START_OF_INSTR();
  2377. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2378. DECODE_PRINTF("MOVS\tDWORD\n");
  2379. if (ACCESS_FLAG(F_DF)) /* down */
  2380. inc = -4;
  2381. else
  2382. inc = 4;
  2383. } else {
  2384. DECODE_PRINTF("MOVS\tWORD\n");
  2385. if (ACCESS_FLAG(F_DF)) /* down */
  2386. inc = -2;
  2387. else
  2388. inc = 2;
  2389. }
  2390. TRACE_AND_STEP();
  2391. count = 1;
  2392. if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
  2393. /* dont care whether REPE or REPNE */
  2394. /* move them until CX is ZERO. */
  2395. count = M.x86.R_CX;
  2396. M.x86.R_CX = 0;
  2397. M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
  2398. }
  2399. while (count--) {
  2400. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2401. val = fetch_data_long(M.x86.R_SI);
  2402. store_data_long_abs(M.x86.R_ES, M.x86.R_DI, val);
  2403. } else {
  2404. val = fetch_data_word(M.x86.R_SI);
  2405. store_data_word_abs(M.x86.R_ES, M.x86.R_DI, (u16)val);
  2406. }
  2407. M.x86.R_SI += inc;
  2408. M.x86.R_DI += inc;
  2409. }
  2410. DECODE_CLEAR_SEGOVR();
  2411. END_OF_INSTR();
  2412. }
  2413. /****************************************************************************
  2414. REMARKS:
  2415. Handles opcode 0xa6
  2416. ****************************************************************************/
  2417. void x86emuOp_cmps_byte(u8 X86EMU_UNUSED(op1))
  2418. {
  2419. s8 val1, val2;
  2420. int inc;
  2421. START_OF_INSTR();
  2422. DECODE_PRINTF("CMPS\tBYTE\n");
  2423. TRACE_AND_STEP();
  2424. if (ACCESS_FLAG(F_DF)) /* down */
  2425. inc = -1;
  2426. else
  2427. inc = 1;
  2428. if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
  2429. /* REPE */
  2430. /* move them until CX is ZERO. */
  2431. while (M.x86.R_CX != 0) {
  2432. val1 = fetch_data_byte(M.x86.R_SI);
  2433. val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
  2434. cmp_byte(val1, val2);
  2435. M.x86.R_CX -= 1;
  2436. M.x86.R_SI += inc;
  2437. M.x86.R_DI += inc;
  2438. if ( (M.x86.mode & SYSMODE_PREFIX_REPE) && (ACCESS_FLAG(F_ZF) == 0) ) break;
  2439. if ( (M.x86.mode & SYSMODE_PREFIX_REPNE) && ACCESS_FLAG(F_ZF) ) break;
  2440. }
  2441. M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
  2442. } else {
  2443. val1 = fetch_data_byte(M.x86.R_SI);
  2444. val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
  2445. cmp_byte(val1, val2);
  2446. M.x86.R_SI += inc;
  2447. M.x86.R_DI += inc;
  2448. }
  2449. DECODE_CLEAR_SEGOVR();
  2450. END_OF_INSTR();
  2451. }
  2452. /****************************************************************************
  2453. REMARKS:
  2454. Handles opcode 0xa7
  2455. ****************************************************************************/
  2456. void x86emuOp_cmps_word(u8 X86EMU_UNUSED(op1))
  2457. {
  2458. u32 val1,val2;
  2459. int inc;
  2460. START_OF_INSTR();
  2461. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2462. DECODE_PRINTF("CMPS\tDWORD\n");
  2463. inc = 4;
  2464. } else {
  2465. DECODE_PRINTF("CMPS\tWORD\n");
  2466. inc = 2;
  2467. }
  2468. if (ACCESS_FLAG(F_DF)) /* down */
  2469. inc = -inc;
  2470. TRACE_AND_STEP();
  2471. if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
  2472. /* REPE */
  2473. /* move them until CX is ZERO. */
  2474. while (M.x86.R_CX != 0) {
  2475. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2476. val1 = fetch_data_long(M.x86.R_SI);
  2477. val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
  2478. cmp_long(val1, val2);
  2479. } else {
  2480. val1 = fetch_data_word(M.x86.R_SI);
  2481. val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
  2482. cmp_word((u16)val1, (u16)val2);
  2483. }
  2484. M.x86.R_CX -= 1;
  2485. M.x86.R_SI += inc;
  2486. M.x86.R_DI += inc;
  2487. if ( (M.x86.mode & SYSMODE_PREFIX_REPE) && ACCESS_FLAG(F_ZF) == 0 ) break;
  2488. if ( (M.x86.mode & SYSMODE_PREFIX_REPNE) && ACCESS_FLAG(F_ZF) ) break;
  2489. }
  2490. M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
  2491. } else {
  2492. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2493. val1 = fetch_data_long(M.x86.R_SI);
  2494. val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
  2495. cmp_long(val1, val2);
  2496. } else {
  2497. val1 = fetch_data_word(M.x86.R_SI);
  2498. val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
  2499. cmp_word((u16)val1, (u16)val2);
  2500. }
  2501. M.x86.R_SI += inc;
  2502. M.x86.R_DI += inc;
  2503. }
  2504. DECODE_CLEAR_SEGOVR();
  2505. END_OF_INSTR();
  2506. }
  2507. /****************************************************************************
  2508. REMARKS:
  2509. Handles opcode 0xa8
  2510. ****************************************************************************/
  2511. void x86emuOp_test_AL_IMM(u8 X86EMU_UNUSED(op1))
  2512. {
  2513. int imm;
  2514. START_OF_INSTR();
  2515. DECODE_PRINTF("TEST\tAL,");
  2516. imm = fetch_byte_imm();
  2517. DECODE_PRINTF2("%04x\n", imm);
  2518. TRACE_AND_STEP();
  2519. test_byte(M.x86.R_AL, (u8)imm);
  2520. DECODE_CLEAR_SEGOVR();
  2521. END_OF_INSTR();
  2522. }
  2523. /****************************************************************************
  2524. REMARKS:
  2525. Handles opcode 0xa9
  2526. ****************************************************************************/
  2527. void x86emuOp_test_AX_IMM(u8 X86EMU_UNUSED(op1))
  2528. {
  2529. u32 srcval;
  2530. START_OF_INSTR();
  2531. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2532. DECODE_PRINTF("TEST\tEAX,");
  2533. srcval = fetch_long_imm();
  2534. } else {
  2535. DECODE_PRINTF("TEST\tAX,");
  2536. srcval = fetch_word_imm();
  2537. }
  2538. DECODE_PRINTF2("%x\n", srcval);
  2539. TRACE_AND_STEP();
  2540. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2541. test_long(M.x86.R_EAX, srcval);
  2542. } else {
  2543. test_word(M.x86.R_AX, (u16)srcval);
  2544. }
  2545. DECODE_CLEAR_SEGOVR();
  2546. END_OF_INSTR();
  2547. }
  2548. /****************************************************************************
  2549. REMARKS:
  2550. Handles opcode 0xaa
  2551. ****************************************************************************/
  2552. void x86emuOp_stos_byte(u8 X86EMU_UNUSED(op1))
  2553. {
  2554. int inc;
  2555. START_OF_INSTR();
  2556. DECODE_PRINTF("STOS\tBYTE\n");
  2557. if (ACCESS_FLAG(F_DF)) /* down */
  2558. inc = -1;
  2559. else
  2560. inc = 1;
  2561. TRACE_AND_STEP();
  2562. if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
  2563. /* dont care whether REPE or REPNE */
  2564. /* move them until CX is ZERO. */
  2565. while (M.x86.R_CX != 0) {
  2566. store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL);
  2567. M.x86.R_CX -= 1;
  2568. M.x86.R_DI += inc;
  2569. }
  2570. M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
  2571. } else {
  2572. store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL);
  2573. M.x86.R_DI += inc;
  2574. }
  2575. DECODE_CLEAR_SEGOVR();
  2576. END_OF_INSTR();
  2577. }
  2578. /****************************************************************************
  2579. REMARKS:
  2580. Handles opcode 0xab
  2581. ****************************************************************************/
  2582. void x86emuOp_stos_word(u8 X86EMU_UNUSED(op1))
  2583. {
  2584. int inc;
  2585. u32 count;
  2586. START_OF_INSTR();
  2587. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2588. DECODE_PRINTF("STOS\tDWORD\n");
  2589. if (ACCESS_FLAG(F_DF)) /* down */
  2590. inc = -4;
  2591. else
  2592. inc = 4;
  2593. } else {
  2594. DECODE_PRINTF("STOS\tWORD\n");
  2595. if (ACCESS_FLAG(F_DF)) /* down */
  2596. inc = -2;
  2597. else
  2598. inc = 2;
  2599. }
  2600. TRACE_AND_STEP();
  2601. count = 1;
  2602. if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
  2603. /* dont care whether REPE or REPNE */
  2604. /* move them until CX is ZERO. */
  2605. count = M.x86.R_CX;
  2606. M.x86.R_CX = 0;
  2607. M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
  2608. }
  2609. while (count--) {
  2610. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2611. store_data_long_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_EAX);
  2612. } else {
  2613. store_data_word_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AX);
  2614. }
  2615. M.x86.R_DI += inc;
  2616. }
  2617. DECODE_CLEAR_SEGOVR();
  2618. END_OF_INSTR();
  2619. }
  2620. /****************************************************************************
  2621. REMARKS:
  2622. Handles opcode 0xac
  2623. ****************************************************************************/
  2624. void x86emuOp_lods_byte(u8 X86EMU_UNUSED(op1))
  2625. {
  2626. int inc;
  2627. START_OF_INSTR();
  2628. DECODE_PRINTF("LODS\tBYTE\n");
  2629. TRACE_AND_STEP();
  2630. if (ACCESS_FLAG(F_DF)) /* down */
  2631. inc = -1;
  2632. else
  2633. inc = 1;
  2634. if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
  2635. /* dont care whether REPE or REPNE */
  2636. /* move them until CX is ZERO. */
  2637. while (M.x86.R_CX != 0) {
  2638. M.x86.R_AL = fetch_data_byte(M.x86.R_SI);
  2639. M.x86.R_CX -= 1;
  2640. M.x86.R_SI += inc;
  2641. }
  2642. M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
  2643. } else {
  2644. M.x86.R_AL = fetch_data_byte(M.x86.R_SI);
  2645. M.x86.R_SI += inc;
  2646. }
  2647. DECODE_CLEAR_SEGOVR();
  2648. END_OF_INSTR();
  2649. }
  2650. /****************************************************************************
  2651. REMARKS:
  2652. Handles opcode 0xad
  2653. ****************************************************************************/
  2654. void x86emuOp_lods_word(u8 X86EMU_UNUSED(op1))
  2655. {
  2656. int inc;
  2657. u32 count;
  2658. START_OF_INSTR();
  2659. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2660. DECODE_PRINTF("LODS\tDWORD\n");
  2661. if (ACCESS_FLAG(F_DF)) /* down */
  2662. inc = -4;
  2663. else
  2664. inc = 4;
  2665. } else {
  2666. DECODE_PRINTF("LODS\tWORD\n");
  2667. if (ACCESS_FLAG(F_DF)) /* down */
  2668. inc = -2;
  2669. else
  2670. inc = 2;
  2671. }
  2672. TRACE_AND_STEP();
  2673. count = 1;
  2674. if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
  2675. /* dont care whether REPE or REPNE */
  2676. /* move them until CX is ZERO. */
  2677. count = M.x86.R_CX;
  2678. M.x86.R_CX = 0;
  2679. M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
  2680. }
  2681. while (count--) {
  2682. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2683. M.x86.R_EAX = fetch_data_long(M.x86.R_SI);
  2684. } else {
  2685. M.x86.R_AX = fetch_data_word(M.x86.R_SI);
  2686. }
  2687. M.x86.R_SI += inc;
  2688. }
  2689. DECODE_CLEAR_SEGOVR();
  2690. END_OF_INSTR();
  2691. }
  2692. /****************************************************************************
  2693. REMARKS:
  2694. Handles opcode 0xae
  2695. ****************************************************************************/
  2696. void x86emuOp_scas_byte(u8 X86EMU_UNUSED(op1))
  2697. {
  2698. s8 val2;
  2699. int inc;
  2700. START_OF_INSTR();
  2701. DECODE_PRINTF("SCAS\tBYTE\n");
  2702. TRACE_AND_STEP();
  2703. if (ACCESS_FLAG(F_DF)) /* down */
  2704. inc = -1;
  2705. else
  2706. inc = 1;
  2707. if (M.x86.mode & SYSMODE_PREFIX_REPE) {
  2708. /* REPE */
  2709. /* move them until CX is ZERO. */
  2710. while (M.x86.R_CX != 0) {
  2711. val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
  2712. cmp_byte(M.x86.R_AL, val2);
  2713. M.x86.R_CX -= 1;
  2714. M.x86.R_DI += inc;
  2715. if (ACCESS_FLAG(F_ZF) == 0)
  2716. break;
  2717. }
  2718. M.x86.mode &= ~SYSMODE_PREFIX_REPE;
  2719. } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
  2720. /* REPNE */
  2721. /* move them until CX is ZERO. */
  2722. while (M.x86.R_CX != 0) {
  2723. val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
  2724. cmp_byte(M.x86.R_AL, val2);
  2725. M.x86.R_CX -= 1;
  2726. M.x86.R_DI += inc;
  2727. if (ACCESS_FLAG(F_ZF))
  2728. break; /* zero flag set means equal */
  2729. }
  2730. M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
  2731. } else {
  2732. val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
  2733. cmp_byte(M.x86.R_AL, val2);
  2734. M.x86.R_DI += inc;
  2735. }
  2736. DECODE_CLEAR_SEGOVR();
  2737. END_OF_INSTR();
  2738. }
  2739. /****************************************************************************
  2740. REMARKS:
  2741. Handles opcode 0xaf
  2742. ****************************************************************************/
  2743. void x86emuOp_scas_word(u8 X86EMU_UNUSED(op1))
  2744. {
  2745. int inc;
  2746. u32 val;
  2747. START_OF_INSTR();
  2748. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2749. DECODE_PRINTF("SCAS\tDWORD\n");
  2750. if (ACCESS_FLAG(F_DF)) /* down */
  2751. inc = -4;
  2752. else
  2753. inc = 4;
  2754. } else {
  2755. DECODE_PRINTF("SCAS\tWORD\n");
  2756. if (ACCESS_FLAG(F_DF)) /* down */
  2757. inc = -2;
  2758. else
  2759. inc = 2;
  2760. }
  2761. TRACE_AND_STEP();
  2762. if (M.x86.mode & SYSMODE_PREFIX_REPE) {
  2763. /* REPE */
  2764. /* move them until CX is ZERO. */
  2765. while (M.x86.R_CX != 0) {
  2766. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2767. val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
  2768. cmp_long(M.x86.R_EAX, val);
  2769. } else {
  2770. val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
  2771. cmp_word(M.x86.R_AX, (u16)val);
  2772. }
  2773. M.x86.R_CX -= 1;
  2774. M.x86.R_DI += inc;
  2775. if (ACCESS_FLAG(F_ZF) == 0)
  2776. break;
  2777. }
  2778. M.x86.mode &= ~SYSMODE_PREFIX_REPE;
  2779. } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
  2780. /* REPNE */
  2781. /* move them until CX is ZERO. */
  2782. while (M.x86.R_CX != 0) {
  2783. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2784. val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
  2785. cmp_long(M.x86.R_EAX, val);
  2786. } else {
  2787. val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
  2788. cmp_word(M.x86.R_AX, (u16)val);
  2789. }
  2790. M.x86.R_CX -= 1;
  2791. M.x86.R_DI += inc;
  2792. if (ACCESS_FLAG(F_ZF))
  2793. break; /* zero flag set means equal */
  2794. }
  2795. M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
  2796. } else {
  2797. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2798. val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
  2799. cmp_long(M.x86.R_EAX, val);
  2800. } else {
  2801. val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
  2802. cmp_word(M.x86.R_AX, (u16)val);
  2803. }
  2804. M.x86.R_DI += inc;
  2805. }
  2806. DECODE_CLEAR_SEGOVR();
  2807. END_OF_INSTR();
  2808. }
  2809. /****************************************************************************
  2810. REMARKS:
  2811. Handles opcode 0xb0 - 0xb7
  2812. ****************************************************************************/
  2813. void x86emuOp_mov_byte_register_IMM(u8 op1)
  2814. {
  2815. u8 imm, *ptr;
  2816. START_OF_INSTR();
  2817. DECODE_PRINTF("MOV\t");
  2818. ptr = DECODE_RM_BYTE_REGISTER(op1 & 0x7);
  2819. DECODE_PRINTF(",");
  2820. imm = fetch_byte_imm();
  2821. DECODE_PRINTF2("%x\n", imm);
  2822. TRACE_AND_STEP();
  2823. *ptr = imm;
  2824. DECODE_CLEAR_SEGOVR();
  2825. END_OF_INSTR();
  2826. }
  2827. /****************************************************************************
  2828. REMARKS:
  2829. Handles opcode 0xb8 - 0xbf
  2830. ****************************************************************************/
  2831. void x86emuOp_mov_word_register_IMM(u8 X86EMU_UNUSED(op1))
  2832. {
  2833. u32 srcval;
  2834. op1 &= 0x7;
  2835. START_OF_INSTR();
  2836. DECODE_PRINTF("MOV\t");
  2837. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2838. u32 *reg32;
  2839. reg32 = DECODE_RM_LONG_REGISTER(op1);
  2840. srcval = fetch_long_imm();
  2841. DECODE_PRINTF2(",%x\n", srcval);
  2842. TRACE_AND_STEP();
  2843. *reg32 = srcval;
  2844. } else {
  2845. u16 *reg16;
  2846. reg16 = DECODE_RM_WORD_REGISTER(op1);
  2847. srcval = fetch_word_imm();
  2848. DECODE_PRINTF2(",%x\n", srcval);
  2849. TRACE_AND_STEP();
  2850. *reg16 = (u16)srcval;
  2851. }
  2852. DECODE_CLEAR_SEGOVR();
  2853. END_OF_INSTR();
  2854. }
  2855. /****************************************************************************
  2856. REMARKS:
  2857. Handles opcode 0xc0
  2858. ****************************************************************************/
  2859. void x86emuOp_opcC0_byte_RM_MEM(u8 X86EMU_UNUSED(op1))
  2860. {
  2861. int mod, rl, rh;
  2862. u8 *destreg;
  2863. uint destoffset;
  2864. u8 destval;
  2865. u8 amt;
  2866. /*
  2867. * Yet another weirdo special case instruction format. Part of
  2868. * the opcode held below in "RH". Doubly nested case would
  2869. * result, except that the decoded instruction
  2870. */
  2871. START_OF_INSTR();
  2872. FETCH_DECODE_MODRM(mod, rh, rl);
  2873. #ifdef CONFIG_X86EMU_DEBUG
  2874. if (DEBUG_DECODE()) {
  2875. /* XXX DECODE_PRINTF may be changed to something more
  2876. general, so that it is important to leave the strings
  2877. in the same format, even though the result is that the
  2878. above test is done twice. */
  2879. switch (rh) {
  2880. case 0:
  2881. DECODE_PRINTF("ROL\t");
  2882. break;
  2883. case 1:
  2884. DECODE_PRINTF("ROR\t");
  2885. break;
  2886. case 2:
  2887. DECODE_PRINTF("RCL\t");
  2888. break;
  2889. case 3:
  2890. DECODE_PRINTF("RCR\t");
  2891. break;
  2892. case 4:
  2893. DECODE_PRINTF("SHL\t");
  2894. break;
  2895. case 5:
  2896. DECODE_PRINTF("SHR\t");
  2897. break;
  2898. case 6:
  2899. DECODE_PRINTF("SAL\t");
  2900. break;
  2901. case 7:
  2902. DECODE_PRINTF("SAR\t");
  2903. break;
  2904. }
  2905. }
  2906. #endif
  2907. /* know operation, decode the mod byte to find the addressing
  2908. mode. */
  2909. if (mod < 3) {
  2910. DECODE_PRINTF("BYTE PTR ");
  2911. destoffset = decode_rmXX_address(mod, rl);
  2912. amt = fetch_byte_imm();
  2913. DECODE_PRINTF2(",%x\n", amt);
  2914. destval = fetch_data_byte(destoffset);
  2915. TRACE_AND_STEP();
  2916. destval = (*opcD0_byte_operation[rh]) (destval, amt);
  2917. store_data_byte(destoffset, destval);
  2918. } else { /* register to register */
  2919. destreg = DECODE_RM_BYTE_REGISTER(rl);
  2920. amt = fetch_byte_imm();
  2921. DECODE_PRINTF2(",%x\n", amt);
  2922. TRACE_AND_STEP();
  2923. destval = (*opcD0_byte_operation[rh]) (*destreg, amt);
  2924. *destreg = destval;
  2925. }
  2926. DECODE_CLEAR_SEGOVR();
  2927. END_OF_INSTR();
  2928. }
  2929. /****************************************************************************
  2930. REMARKS:
  2931. Handles opcode 0xc1
  2932. ****************************************************************************/
  2933. void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))
  2934. {
  2935. int mod, rl, rh;
  2936. uint destoffset;
  2937. u8 amt;
  2938. /*
  2939. * Yet another weirdo special case instruction format. Part of
  2940. * the opcode held below in "RH". Doubly nested case would
  2941. * result, except that the decoded instruction
  2942. */
  2943. START_OF_INSTR();
  2944. FETCH_DECODE_MODRM(mod, rh, rl);
  2945. #ifdef CONFIG_X86EMU_DEBUG
  2946. if (DEBUG_DECODE()) {
  2947. /* XXX DECODE_PRINTF may be changed to something more
  2948. general, so that it is important to leave the strings
  2949. in the same format, even though the result is that the
  2950. above test is done twice. */
  2951. switch (rh) {
  2952. case 0:
  2953. DECODE_PRINTF("ROL\t");
  2954. break;
  2955. case 1:
  2956. DECODE_PRINTF("ROR\t");
  2957. break;
  2958. case 2:
  2959. DECODE_PRINTF("RCL\t");
  2960. break;
  2961. case 3:
  2962. DECODE_PRINTF("RCR\t");
  2963. break;
  2964. case 4:
  2965. DECODE_PRINTF("SHL\t");
  2966. break;
  2967. case 5:
  2968. DECODE_PRINTF("SHR\t");
  2969. break;
  2970. case 6:
  2971. DECODE_PRINTF("SAL\t");
  2972. break;
  2973. case 7:
  2974. DECODE_PRINTF("SAR\t");
  2975. break;
  2976. }
  2977. }
  2978. #endif
  2979. /* know operation, decode the mod byte to find the addressing
  2980. mode. */
  2981. if (mod < 3) {
  2982. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  2983. u32 destval;
  2984. DECODE_PRINTF("DWORD PTR ");
  2985. destoffset = decode_rmXX_address(mod, rl);
  2986. amt = fetch_byte_imm();
  2987. DECODE_PRINTF2(",%x\n", amt);
  2988. destval = fetch_data_long(destoffset);
  2989. TRACE_AND_STEP();
  2990. destval = (*opcD1_long_operation[rh]) (destval, amt);
  2991. store_data_long(destoffset, destval);
  2992. } else {
  2993. u16 destval;
  2994. DECODE_PRINTF("WORD PTR ");
  2995. destoffset = decode_rmXX_address(mod, rl);
  2996. amt = fetch_byte_imm();
  2997. DECODE_PRINTF2(",%x\n", amt);
  2998. destval = fetch_data_word(destoffset);
  2999. TRACE_AND_STEP();
  3000. destval = (*opcD1_word_operation[rh]) (destval, amt);
  3001. store_data_word(destoffset, destval);
  3002. }
  3003. } else { /* register to register */
  3004. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  3005. u32 *destreg;
  3006. destreg = DECODE_RM_LONG_REGISTER(rl);
  3007. amt = fetch_byte_imm();
  3008. DECODE_PRINTF2(",%x\n", amt);
  3009. TRACE_AND_STEP();
  3010. *destreg = (*opcD1_long_operation[rh]) (*destreg, amt);
  3011. } else {
  3012. u16 *destreg;
  3013. destreg = DECODE_RM_WORD_REGISTER(rl);
  3014. amt = fetch_byte_imm();
  3015. DECODE_PRINTF2(",%x\n", amt);
  3016. TRACE_AND_STEP();
  3017. *destreg = (*opcD1_word_operation[rh]) (*destreg, amt);
  3018. }
  3019. }
  3020. DECODE_CLEAR_SEGOVR();
  3021. END_OF_INSTR();
  3022. }
  3023. /****************************************************************************
  3024. REMARKS:
  3025. Handles opcode 0xc2
  3026. ****************************************************************************/
  3027. void x86emuOp_ret_near_IMM(u8 X86EMU_UNUSED(op1))
  3028. {
  3029. u16 imm;
  3030. START_OF_INSTR();
  3031. DECODE_PRINTF("RET\t");
  3032. imm = fetch_word_imm();
  3033. DECODE_PRINTF2("%x\n", imm);
  3034. RETURN_TRACE("RET",M.x86.saved_cs,M.x86.saved_ip);
  3035. TRACE_AND_STEP();
  3036. M.x86.R_IP = pop_word();
  3037. M.x86.R_SP += imm;
  3038. DECODE_CLEAR_SEGOVR();
  3039. END_OF_INSTR();
  3040. }
  3041. /****************************************************************************
  3042. REMARKS:
  3043. Handles opcode 0xc3
  3044. ****************************************************************************/
  3045. void x86emuOp_ret_near(u8 X86EMU_UNUSED(op1))
  3046. {
  3047. START_OF_INSTR();
  3048. DECODE_PRINTF("RET\n");
  3049. RETURN_TRACE("RET",M.x86.saved_cs,M.x86.saved_ip);
  3050. TRACE_AND_STEP();
  3051. M.x86.R_IP = pop_word();
  3052. DECODE_CLEAR_SEGOVR();
  3053. END_OF_INSTR();
  3054. }
  3055. /****************************************************************************
  3056. REMARKS:
  3057. Handles opcode 0xc4
  3058. ****************************************************************************/
  3059. void x86emuOp_les_R_IMM(u8 X86EMU_UNUSED(op1))
  3060. {
  3061. int mod, rh, rl;
  3062. u16 *dstreg;
  3063. uint srcoffset;
  3064. START_OF_INSTR();
  3065. DECODE_PRINTF("LES\t");
  3066. FETCH_DECODE_MODRM(mod, rh, rl);
  3067. if (mod < 3) {
  3068. dstreg = DECODE_RM_WORD_REGISTER(rh);
  3069. DECODE_PRINTF(",");
  3070. srcoffset = decode_rmXX_address(mod, rl);
  3071. DECODE_PRINTF("\n");
  3072. TRACE_AND_STEP();
  3073. *dstreg = fetch_data_word(srcoffset);
  3074. M.x86.R_ES = fetch_data_word(srcoffset + 2);
  3075. }
  3076. /* else UNDEFINED! register to register */
  3077. DECODE_CLEAR_SEGOVR();
  3078. END_OF_INSTR();
  3079. }
  3080. /****************************************************************************
  3081. REMARKS:
  3082. Handles opcode 0xc5
  3083. ****************************************************************************/
  3084. void x86emuOp_lds_R_IMM(u8 X86EMU_UNUSED(op1))
  3085. {
  3086. int mod, rh, rl;
  3087. u16 *dstreg;
  3088. uint srcoffset;
  3089. START_OF_INSTR();
  3090. DECODE_PRINTF("LDS\t");
  3091. FETCH_DECODE_MODRM(mod, rh, rl);
  3092. if (mod < 3) {
  3093. dstreg = DECODE_RM_WORD_REGISTER(rh);
  3094. DECODE_PRINTF(",");
  3095. srcoffset = decode_rmXX_address(mod, rl);
  3096. DECODE_PRINTF("\n");
  3097. TRACE_AND_STEP();
  3098. *dstreg = fetch_data_word(srcoffset);
  3099. M.x86.R_DS = fetch_data_word(srcoffset + 2);
  3100. }
  3101. /* else UNDEFINED! */
  3102. DECODE_CLEAR_SEGOVR();
  3103. END_OF_INSTR();
  3104. }
  3105. /****************************************************************************
  3106. REMARKS:
  3107. Handles opcode 0xc6
  3108. ****************************************************************************/
  3109. void x86emuOp_mov_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
  3110. {
  3111. int mod, rl, rh;
  3112. u8 *destreg;
  3113. uint destoffset;
  3114. u8 imm;
  3115. START_OF_INSTR();
  3116. DECODE_PRINTF("MOV\t");
  3117. FETCH_DECODE_MODRM(mod, rh, rl);
  3118. if (rh != 0) {
  3119. ERR_PRINTF("ILLEGAL DECODE OF OPCODE c6\n");
  3120. HALT_SYS();
  3121. }
  3122. if (mod < 3) {
  3123. DECODE_PRINTF("BYTE PTR ");
  3124. destoffset = decode_rmXX_address(mod, rl);
  3125. imm = fetch_byte_imm();
  3126. DECODE_PRINTF2(",%2x\n", imm);
  3127. TRACE_AND_STEP();
  3128. store_data_byte(destoffset, imm);
  3129. } else { /* register to register */
  3130. destreg = DECODE_RM_BYTE_REGISTER(rl);
  3131. imm = fetch_byte_imm();
  3132. DECODE_PRINTF2(",%2x\n", imm);
  3133. TRACE_AND_STEP();
  3134. *destreg = imm;
  3135. }
  3136. DECODE_CLEAR_SEGOVR();
  3137. END_OF_INSTR();
  3138. }
  3139. /****************************************************************************
  3140. REMARKS:
  3141. Handles opcode 0xc7
  3142. ****************************************************************************/
  3143. void x86emuOp_mov_word_RM_IMM(u8 X86EMU_UNUSED(op1))
  3144. {
  3145. int mod, rl, rh;
  3146. uint destoffset;
  3147. START_OF_INSTR();
  3148. DECODE_PRINTF("MOV\t");
  3149. FETCH_DECODE_MODRM(mod, rh, rl);
  3150. if (rh != 0) {
  3151. ERR_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n");
  3152. HALT_SYS();
  3153. }
  3154. if (mod < 3) {
  3155. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  3156. u32 imm;
  3157. DECODE_PRINTF("DWORD PTR ");
  3158. destoffset = decode_rmXX_address(mod, rl);
  3159. imm = fetch_long_imm();
  3160. DECODE_PRINTF2(",%x\n", imm);
  3161. TRACE_AND_STEP();
  3162. store_data_long(destoffset, imm);
  3163. } else {
  3164. u16 imm;
  3165. DECODE_PRINTF("WORD PTR ");
  3166. destoffset = decode_rmXX_address(mod, rl);
  3167. imm = fetch_word_imm();
  3168. DECODE_PRINTF2(",%x\n", imm);
  3169. TRACE_AND_STEP();
  3170. store_data_word(destoffset, imm);
  3171. }
  3172. } else { /* register to register */
  3173. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  3174. u32 *destreg;
  3175. u32 imm;
  3176. destreg = DECODE_RM_LONG_REGISTER(rl);
  3177. imm = fetch_long_imm();
  3178. DECODE_PRINTF2(",%x\n", imm);
  3179. TRACE_AND_STEP();
  3180. *destreg = imm;
  3181. } else {
  3182. u16 *destreg;
  3183. u16 imm;
  3184. destreg = DECODE_RM_WORD_REGISTER(rl);
  3185. imm = fetch_word_imm();
  3186. DECODE_PRINTF2(",%x\n", imm);
  3187. TRACE_AND_STEP();
  3188. *destreg = imm;
  3189. }
  3190. }
  3191. DECODE_CLEAR_SEGOVR();
  3192. END_OF_INSTR();
  3193. }
  3194. /****************************************************************************
  3195. REMARKS:
  3196. Handles opcode 0xc8
  3197. ****************************************************************************/
  3198. void x86emuOp_enter(u8 X86EMU_UNUSED(op1))
  3199. {
  3200. u16 local,frame_pointer;
  3201. u8 nesting;
  3202. int i;
  3203. START_OF_INSTR();
  3204. local = fetch_word_imm();
  3205. nesting = fetch_byte_imm();
  3206. DECODE_PRINTF2("ENTER %x\n", local);
  3207. DECODE_PRINTF2(",%x\n", nesting);
  3208. TRACE_AND_STEP();
  3209. push_word(M.x86.R_BP);
  3210. frame_pointer = M.x86.R_SP;
  3211. if (nesting > 0) {
  3212. for (i = 1; i < nesting; i++) {
  3213. M.x86.R_BP -= 2;
  3214. push_word(fetch_data_word_abs(M.x86.R_SS, M.x86.R_BP));
  3215. }
  3216. push_word(frame_pointer);
  3217. }
  3218. M.x86.R_BP = frame_pointer;
  3219. M.x86.R_SP = (u16)(M.x86.R_SP - local);
  3220. DECODE_CLEAR_SEGOVR();
  3221. END_OF_INSTR();
  3222. }
  3223. /****************************************************************************
  3224. REMARKS:
  3225. Handles opcode 0xc9
  3226. ****************************************************************************/
  3227. void x86emuOp_leave(u8 X86EMU_UNUSED(op1))
  3228. {
  3229. START_OF_INSTR();
  3230. DECODE_PRINTF("LEAVE\n");
  3231. TRACE_AND_STEP();
  3232. M.x86.R_SP = M.x86.R_BP;
  3233. M.x86.R_BP = pop_word();
  3234. DECODE_CLEAR_SEGOVR();
  3235. END_OF_INSTR();
  3236. }
  3237. /****************************************************************************
  3238. REMARKS:
  3239. Handles opcode 0xca
  3240. ****************************************************************************/
  3241. void x86emuOp_ret_far_IMM(u8 X86EMU_UNUSED(op1))
  3242. {
  3243. u16 imm;
  3244. START_OF_INSTR();
  3245. DECODE_PRINTF("RETF\t");
  3246. imm = fetch_word_imm();
  3247. DECODE_PRINTF2("%x\n", imm);
  3248. RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip);
  3249. TRACE_AND_STEP();
  3250. M.x86.R_IP = pop_word();
  3251. M.x86.R_CS = pop_word();
  3252. M.x86.R_SP += imm;
  3253. DECODE_CLEAR_SEGOVR();
  3254. END_OF_INSTR();
  3255. }
  3256. /****************************************************************************
  3257. REMARKS:
  3258. Handles opcode 0xcb
  3259. ****************************************************************************/
  3260. void x86emuOp_ret_far(u8 X86EMU_UNUSED(op1))
  3261. {
  3262. START_OF_INSTR();
  3263. DECODE_PRINTF("RETF\n");
  3264. RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip);
  3265. TRACE_AND_STEP();
  3266. M.x86.R_IP = pop_word();
  3267. M.x86.R_CS = pop_word();
  3268. DECODE_CLEAR_SEGOVR();
  3269. END_OF_INSTR();
  3270. }
  3271. /****************************************************************************
  3272. REMARKS:
  3273. Handles opcode 0xcc
  3274. ****************************************************************************/
  3275. void x86emuOp_int3(u8 X86EMU_UNUSED(op1))
  3276. {
  3277. START_OF_INSTR();
  3278. DECODE_PRINTF("INT 3\n");
  3279. (void)mem_access_word(3 * 4 + 2);
  3280. /* access the segment register */
  3281. TRACE_AND_STEP();
  3282. if (_X86EMU_intrTab[3]) {
  3283. (*_X86EMU_intrTab[3])(3);
  3284. } else {
  3285. push_word((u16)M.x86.R_FLG);
  3286. CLEAR_FLAG(F_IF);
  3287. CLEAR_FLAG(F_TF);
  3288. push_word(M.x86.R_CS);
  3289. M.x86.R_CS = mem_access_word(3 * 4 + 2);
  3290. push_word(M.x86.R_IP);
  3291. M.x86.R_IP = mem_access_word(3 * 4);
  3292. }
  3293. DECODE_CLEAR_SEGOVR();
  3294. END_OF_INSTR();
  3295. }
  3296. /****************************************************************************
  3297. REMARKS:
  3298. Handles opcode 0xcd
  3299. ****************************************************************************/
  3300. void x86emuOp_int_IMM(u8 X86EMU_UNUSED(op1))
  3301. {
  3302. u8 intnum;
  3303. START_OF_INSTR();
  3304. DECODE_PRINTF("INT\t");
  3305. intnum = fetch_byte_imm();
  3306. DECODE_PRINTF2("%x\n", intnum);
  3307. (void)mem_access_word(intnum * 4 + 2);
  3308. TRACE_AND_STEP();
  3309. if (_X86EMU_intrTab[intnum]) {
  3310. (*_X86EMU_intrTab[intnum])(intnum);
  3311. } else {
  3312. push_word((u16)M.x86.R_FLG);
  3313. CLEAR_FLAG(F_IF);
  3314. CLEAR_FLAG(F_TF);
  3315. push_word(M.x86.R_CS);
  3316. M.x86.R_CS = mem_access_word(intnum * 4 + 2);
  3317. push_word(M.x86.R_IP);
  3318. M.x86.R_IP = mem_access_word(intnum * 4);
  3319. }
  3320. DECODE_CLEAR_SEGOVR();
  3321. END_OF_INSTR();
  3322. }
  3323. /****************************************************************************
  3324. REMARKS:
  3325. Handles opcode 0xce
  3326. ****************************************************************************/
  3327. void x86emuOp_into(u8 X86EMU_UNUSED(op1))
  3328. {
  3329. START_OF_INSTR();
  3330. DECODE_PRINTF("INTO\n");
  3331. TRACE_AND_STEP();
  3332. if (ACCESS_FLAG(F_OF)) {
  3333. (void)mem_access_word(4 * 4 + 2);
  3334. if (_X86EMU_intrTab[4]) {
  3335. (*_X86EMU_intrTab[4])(4);
  3336. } else {
  3337. push_word((u16)M.x86.R_FLG);
  3338. CLEAR_FLAG(F_IF);
  3339. CLEAR_FLAG(F_TF);
  3340. push_word(M.x86.R_CS);
  3341. M.x86.R_CS = mem_access_word(4 * 4 + 2);
  3342. push_word(M.x86.R_IP);
  3343. M.x86.R_IP = mem_access_word(4 * 4);
  3344. }
  3345. }
  3346. DECODE_CLEAR_SEGOVR();
  3347. END_OF_INSTR();
  3348. }
  3349. /****************************************************************************
  3350. REMARKS:
  3351. Handles opcode 0xcf
  3352. ****************************************************************************/
  3353. void x86emuOp_iret(u8 X86EMU_UNUSED(op1))
  3354. {
  3355. START_OF_INSTR();
  3356. DECODE_PRINTF("IRET\n");
  3357. TRACE_AND_STEP();
  3358. M.x86.R_IP = pop_word();
  3359. M.x86.R_CS = pop_word();
  3360. M.x86.R_FLG = pop_word();
  3361. DECODE_CLEAR_SEGOVR();
  3362. END_OF_INSTR();
  3363. }
  3364. /****************************************************************************
  3365. REMARKS:
  3366. Handles opcode 0xd0
  3367. ****************************************************************************/
  3368. void x86emuOp_opcD0_byte_RM_1(u8 X86EMU_UNUSED(op1))
  3369. {
  3370. int mod, rl, rh;
  3371. u8 *destreg;
  3372. uint destoffset;
  3373. u8 destval;
  3374. /*
  3375. * Yet another weirdo special case instruction format. Part of
  3376. * the opcode held below in "RH". Doubly nested case would
  3377. * result, except that the decoded instruction
  3378. */
  3379. START_OF_INSTR();
  3380. FETCH_DECODE_MODRM(mod, rh, rl);
  3381. #ifdef CONFIG_X86EMU_DEBUG
  3382. if (DEBUG_DECODE()) {
  3383. /* XXX DECODE_PRINTF may be changed to something more
  3384. general, so that it is important to leave the strings
  3385. in the same format, even though the result is that the
  3386. above test is done twice. */
  3387. switch (rh) {
  3388. case 0:
  3389. DECODE_PRINTF("ROL\t");
  3390. break;
  3391. case 1:
  3392. DECODE_PRINTF("ROR\t");
  3393. break;
  3394. case 2:
  3395. DECODE_PRINTF("RCL\t");
  3396. break;
  3397. case 3:
  3398. DECODE_PRINTF("RCR\t");
  3399. break;
  3400. case 4:
  3401. DECODE_PRINTF("SHL\t");
  3402. break;
  3403. case 5:
  3404. DECODE_PRINTF("SHR\t");
  3405. break;
  3406. case 6:
  3407. DECODE_PRINTF("SAL\t");
  3408. break;
  3409. case 7:
  3410. DECODE_PRINTF("SAR\t");
  3411. break;
  3412. }
  3413. }
  3414. #endif
  3415. /* know operation, decode the mod byte to find the addressing
  3416. mode. */
  3417. if (mod < 3) {
  3418. DECODE_PRINTF("BYTE PTR ");
  3419. destoffset = decode_rmXX_address(mod, rl);
  3420. DECODE_PRINTF(",1\n");
  3421. destval = fetch_data_byte(destoffset);
  3422. TRACE_AND_STEP();
  3423. destval = (*opcD0_byte_operation[rh]) (destval, 1);
  3424. store_data_byte(destoffset, destval);
  3425. } else { /* register to register */
  3426. destreg = DECODE_RM_BYTE_REGISTER(rl);
  3427. DECODE_PRINTF(",1\n");
  3428. TRACE_AND_STEP();
  3429. destval = (*opcD0_byte_operation[rh]) (*destreg, 1);
  3430. *destreg = destval;
  3431. }
  3432. DECODE_CLEAR_SEGOVR();
  3433. END_OF_INSTR();
  3434. }
  3435. /****************************************************************************
  3436. REMARKS:
  3437. Handles opcode 0xd1
  3438. ****************************************************************************/
  3439. void x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1))
  3440. {
  3441. int mod, rl, rh;
  3442. uint destoffset;
  3443. /*
  3444. * Yet another weirdo special case instruction format. Part of
  3445. * the opcode held below in "RH". Doubly nested case would
  3446. * result, except that the decoded instruction
  3447. */
  3448. START_OF_INSTR();
  3449. FETCH_DECODE_MODRM(mod, rh, rl);
  3450. #ifdef CONFIG_X86EMU_DEBUG
  3451. if (DEBUG_DECODE()) {
  3452. /* XXX DECODE_PRINTF may be changed to something more
  3453. general, so that it is important to leave the strings
  3454. in the same format, even though the result is that the
  3455. above test is done twice. */
  3456. switch (rh) {
  3457. case 0:
  3458. DECODE_PRINTF("ROL\t");
  3459. break;
  3460. case 1:
  3461. DECODE_PRINTF("ROR\t");
  3462. break;
  3463. case 2:
  3464. DECODE_PRINTF("RCL\t");
  3465. break;
  3466. case 3:
  3467. DECODE_PRINTF("RCR\t");
  3468. break;
  3469. case 4:
  3470. DECODE_PRINTF("SHL\t");
  3471. break;
  3472. case 5:
  3473. DECODE_PRINTF("SHR\t");
  3474. break;
  3475. case 6:
  3476. DECODE_PRINTF("SAL\t");
  3477. break;
  3478. case 7:
  3479. DECODE_PRINTF("SAR\t");
  3480. break;
  3481. }
  3482. }
  3483. #endif
  3484. /* know operation, decode the mod byte to find the addressing
  3485. mode. */
  3486. if (mod < 3) {
  3487. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  3488. u32 destval;
  3489. DECODE_PRINTF("DWORD PTR ");
  3490. destoffset = decode_rmXX_address(mod, rl);
  3491. DECODE_PRINTF(",1\n");
  3492. destval = fetch_data_long(destoffset);
  3493. TRACE_AND_STEP();
  3494. destval = (*opcD1_long_operation[rh]) (destval, 1);
  3495. store_data_long(destoffset, destval);
  3496. } else {
  3497. u16 destval;
  3498. DECODE_PRINTF("WORD PTR ");
  3499. destoffset = decode_rmXX_address(mod, rl);
  3500. DECODE_PRINTF(",1\n");
  3501. destval = fetch_data_word(destoffset);
  3502. TRACE_AND_STEP();
  3503. destval = (*opcD1_word_operation[rh]) (destval, 1);
  3504. store_data_word(destoffset, destval);
  3505. }
  3506. } else { /* register to register */
  3507. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  3508. u32 destval;
  3509. u32 *destreg;
  3510. destreg = DECODE_RM_LONG_REGISTER(rl);
  3511. DECODE_PRINTF(",1\n");
  3512. TRACE_AND_STEP();
  3513. destval = (*opcD1_long_operation[rh]) (*destreg, 1);
  3514. *destreg = destval;
  3515. } else {
  3516. u16 destval;
  3517. u16 *destreg;
  3518. destreg = DECODE_RM_WORD_REGISTER(rl);
  3519. DECODE_PRINTF(",1\n");
  3520. TRACE_AND_STEP();
  3521. destval = (*opcD1_word_operation[rh]) (*destreg, 1);
  3522. *destreg = destval;
  3523. }
  3524. }
  3525. DECODE_CLEAR_SEGOVR();
  3526. END_OF_INSTR();
  3527. }
  3528. /****************************************************************************
  3529. REMARKS:
  3530. Handles opcode 0xd2
  3531. ****************************************************************************/
  3532. void x86emuOp_opcD2_byte_RM_CL(u8 X86EMU_UNUSED(op1))
  3533. {
  3534. int mod, rl, rh;
  3535. u8 *destreg;
  3536. uint destoffset;
  3537. u8 destval;
  3538. u8 amt;
  3539. /*
  3540. * Yet another weirdo special case instruction format. Part of
  3541. * the opcode held below in "RH". Doubly nested case would
  3542. * result, except that the decoded instruction
  3543. */
  3544. START_OF_INSTR();
  3545. FETCH_DECODE_MODRM(mod, rh, rl);
  3546. #ifdef CONFIG_X86EMU_DEBUG
  3547. if (DEBUG_DECODE()) {
  3548. /* XXX DECODE_PRINTF may be changed to something more
  3549. general, so that it is important to leave the strings
  3550. in the same format, even though the result is that the
  3551. above test is done twice. */
  3552. switch (rh) {
  3553. case 0:
  3554. DECODE_PRINTF("ROL\t");
  3555. break;
  3556. case 1:
  3557. DECODE_PRINTF("ROR\t");
  3558. break;
  3559. case 2:
  3560. DECODE_PRINTF("RCL\t");
  3561. break;
  3562. case 3:
  3563. DECODE_PRINTF("RCR\t");
  3564. break;
  3565. case 4:
  3566. DECODE_PRINTF("SHL\t");
  3567. break;
  3568. case 5:
  3569. DECODE_PRINTF("SHR\t");
  3570. break;
  3571. case 6:
  3572. DECODE_PRINTF("SAL\t");
  3573. break;
  3574. case 7:
  3575. DECODE_PRINTF("SAR\t");
  3576. break;
  3577. }
  3578. }
  3579. #endif
  3580. /* know operation, decode the mod byte to find the addressing
  3581. mode. */
  3582. amt = M.x86.R_CL;
  3583. if (mod < 3) {
  3584. DECODE_PRINTF("BYTE PTR ");
  3585. destoffset = decode_rmXX_address(mod, rl);
  3586. DECODE_PRINTF(",CL\n");
  3587. destval = fetch_data_byte(destoffset);
  3588. TRACE_AND_STEP();
  3589. destval = (*opcD0_byte_operation[rh]) (destval, amt);
  3590. store_data_byte(destoffset, destval);
  3591. } else { /* register to register */
  3592. destreg = DECODE_RM_BYTE_REGISTER(rl);
  3593. DECODE_PRINTF(",CL\n");
  3594. TRACE_AND_STEP();
  3595. destval = (*opcD0_byte_operation[rh]) (*destreg, amt);
  3596. *destreg = destval;
  3597. }
  3598. DECODE_CLEAR_SEGOVR();
  3599. END_OF_INSTR();
  3600. }
  3601. /****************************************************************************
  3602. REMARKS:
  3603. Handles opcode 0xd3
  3604. ****************************************************************************/
  3605. void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))
  3606. {
  3607. int mod, rl, rh;
  3608. uint destoffset;
  3609. u8 amt;
  3610. /*
  3611. * Yet another weirdo special case instruction format. Part of
  3612. * the opcode held below in "RH". Doubly nested case would
  3613. * result, except that the decoded instruction
  3614. */
  3615. START_OF_INSTR();
  3616. FETCH_DECODE_MODRM(mod, rh, rl);
  3617. #ifdef CONFIG_X86EMU_DEBUG
  3618. if (DEBUG_DECODE()) {
  3619. /* XXX DECODE_PRINTF may be changed to something more
  3620. general, so that it is important to leave the strings
  3621. in the same format, even though the result is that the
  3622. above test is done twice. */
  3623. switch (rh) {
  3624. case 0:
  3625. DECODE_PRINTF("ROL\t");
  3626. break;
  3627. case 1:
  3628. DECODE_PRINTF("ROR\t");
  3629. break;
  3630. case 2:
  3631. DECODE_PRINTF("RCL\t");
  3632. break;
  3633. case 3:
  3634. DECODE_PRINTF("RCR\t");
  3635. break;
  3636. case 4:
  3637. DECODE_PRINTF("SHL\t");
  3638. break;
  3639. case 5:
  3640. DECODE_PRINTF("SHR\t");
  3641. break;
  3642. case 6:
  3643. DECODE_PRINTF("SAL\t");
  3644. break;
  3645. case 7:
  3646. DECODE_PRINTF("SAR\t");
  3647. break;
  3648. }
  3649. }
  3650. #endif
  3651. /* know operation, decode the mod byte to find the addressing
  3652. mode. */
  3653. amt = M.x86.R_CL;
  3654. if (mod < 3) {
  3655. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  3656. u32 destval;
  3657. DECODE_PRINTF("DWORD PTR ");
  3658. destoffset = decode_rmXX_address(mod, rl);
  3659. DECODE_PRINTF(",CL\n");
  3660. destval = fetch_data_long(destoffset);
  3661. TRACE_AND_STEP();
  3662. destval = (*opcD1_long_operation[rh]) (destval, amt);
  3663. store_data_long(destoffset, destval);
  3664. } else {
  3665. u16 destval;
  3666. DECODE_PRINTF("WORD PTR ");
  3667. destoffset = decode_rmXX_address(mod, rl);
  3668. DECODE_PRINTF(",CL\n");
  3669. destval = fetch_data_word(destoffset);
  3670. TRACE_AND_STEP();
  3671. destval = (*opcD1_word_operation[rh]) (destval, amt);
  3672. store_data_word(destoffset, destval);
  3673. }
  3674. } else { /* register to register */
  3675. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  3676. u32 *destreg;
  3677. destreg = DECODE_RM_LONG_REGISTER(rl);
  3678. DECODE_PRINTF(",CL\n");
  3679. TRACE_AND_STEP();
  3680. *destreg = (*opcD1_long_operation[rh]) (*destreg, amt);
  3681. } else {
  3682. u16 *destreg;
  3683. destreg = DECODE_RM_WORD_REGISTER(rl);
  3684. DECODE_PRINTF(",CL\n");
  3685. TRACE_AND_STEP();
  3686. *destreg = (*opcD1_word_operation[rh]) (*destreg, amt);
  3687. }
  3688. }
  3689. DECODE_CLEAR_SEGOVR();
  3690. END_OF_INSTR();
  3691. }
  3692. /****************************************************************************
  3693. REMARKS:
  3694. Handles opcode 0xd4
  3695. ****************************************************************************/
  3696. void x86emuOp_aam(u8 X86EMU_UNUSED(op1))
  3697. {
  3698. u8 a;
  3699. START_OF_INSTR();
  3700. DECODE_PRINTF("AAM\n");
  3701. a = fetch_byte_imm(); /* this is a stupid encoding. */
  3702. if (a != 10) {
  3703. ERR_PRINTF("ERROR DECODING AAM\n");
  3704. TRACE_REGS();
  3705. HALT_SYS();
  3706. }
  3707. TRACE_AND_STEP();
  3708. /* note the type change here --- returning AL and AH in AX. */
  3709. M.x86.R_AX = aam_word(M.x86.R_AL);
  3710. DECODE_CLEAR_SEGOVR();
  3711. END_OF_INSTR();
  3712. }
  3713. /****************************************************************************
  3714. REMARKS:
  3715. Handles opcode 0xd5
  3716. ****************************************************************************/
  3717. void x86emuOp_aad(u8 X86EMU_UNUSED(op1))
  3718. {
  3719. START_OF_INSTR();
  3720. DECODE_PRINTF("AAD\n");
  3721. (void)fetch_byte_imm();
  3722. TRACE_AND_STEP();
  3723. M.x86.R_AX = aad_word(M.x86.R_AX);
  3724. DECODE_CLEAR_SEGOVR();
  3725. END_OF_INSTR();
  3726. }
  3727. /* opcode 0xd6 ILLEGAL OPCODE */
  3728. /****************************************************************************
  3729. REMARKS:
  3730. Handles opcode 0xd7
  3731. ****************************************************************************/
  3732. void x86emuOp_xlat(u8 X86EMU_UNUSED(op1))
  3733. {
  3734. u16 addr;
  3735. START_OF_INSTR();
  3736. DECODE_PRINTF("XLAT\n");
  3737. TRACE_AND_STEP();
  3738. addr = (u16)(M.x86.R_BX + (u8)M.x86.R_AL);
  3739. M.x86.R_AL = fetch_data_byte(addr);
  3740. DECODE_CLEAR_SEGOVR();
  3741. END_OF_INSTR();
  3742. }
  3743. /* instuctions D8 .. DF are in i87_ops.c */
  3744. /****************************************************************************
  3745. REMARKS:
  3746. Handles opcode 0xe0
  3747. ****************************************************************************/
  3748. void x86emuOp_loopne(u8 X86EMU_UNUSED(op1))
  3749. {
  3750. s16 ip;
  3751. START_OF_INSTR();
  3752. DECODE_PRINTF("LOOPNE\t");
  3753. ip = (s8) fetch_byte_imm();
  3754. ip += (s16) M.x86.R_IP;
  3755. DECODE_PRINTF2("%04x\n", ip);
  3756. TRACE_AND_STEP();
  3757. M.x86.R_CX -= 1;
  3758. if (M.x86.R_CX != 0 && !ACCESS_FLAG(F_ZF)) /* CX != 0 and !ZF */
  3759. M.x86.R_IP = ip;
  3760. DECODE_CLEAR_SEGOVR();
  3761. END_OF_INSTR();
  3762. }
  3763. /****************************************************************************
  3764. REMARKS:
  3765. Handles opcode 0xe1
  3766. ****************************************************************************/
  3767. void x86emuOp_loope(u8 X86EMU_UNUSED(op1))
  3768. {
  3769. s16 ip;
  3770. START_OF_INSTR();
  3771. DECODE_PRINTF("LOOPE\t");
  3772. ip = (s8) fetch_byte_imm();
  3773. ip += (s16) M.x86.R_IP;
  3774. DECODE_PRINTF2("%04x\n", ip);
  3775. TRACE_AND_STEP();
  3776. M.x86.R_CX -= 1;
  3777. if (M.x86.R_CX != 0 && ACCESS_FLAG(F_ZF)) /* CX != 0 and ZF */
  3778. M.x86.R_IP = ip;
  3779. DECODE_CLEAR_SEGOVR();
  3780. END_OF_INSTR();
  3781. }
  3782. /****************************************************************************
  3783. REMARKS:
  3784. Handles opcode 0xe2
  3785. ****************************************************************************/
  3786. void x86emuOp_loop(u8 X86EMU_UNUSED(op1))
  3787. {
  3788. s16 ip;
  3789. START_OF_INSTR();
  3790. DECODE_PRINTF("LOOP\t");
  3791. ip = (s8) fetch_byte_imm();
  3792. ip += (s16) M.x86.R_IP;
  3793. DECODE_PRINTF2("%04x\n", ip);
  3794. TRACE_AND_STEP();
  3795. M.x86.R_CX -= 1;
  3796. if (M.x86.R_CX != 0)
  3797. M.x86.R_IP = ip;
  3798. DECODE_CLEAR_SEGOVR();
  3799. END_OF_INSTR();
  3800. }
  3801. /****************************************************************************
  3802. REMARKS:
  3803. Handles opcode 0xe3
  3804. ****************************************************************************/
  3805. void x86emuOp_jcxz(u8 X86EMU_UNUSED(op1))
  3806. {
  3807. u16 target;
  3808. s8 offset;
  3809. /* jump to byte offset if overflow flag is set */
  3810. START_OF_INSTR();
  3811. DECODE_PRINTF("JCXZ\t");
  3812. offset = (s8)fetch_byte_imm();
  3813. target = (u16)(M.x86.R_IP + offset);
  3814. DECODE_PRINTF2("%x\n", target);
  3815. TRACE_AND_STEP();
  3816. if (M.x86.R_CX == 0)
  3817. M.x86.R_IP = target;
  3818. DECODE_CLEAR_SEGOVR();
  3819. END_OF_INSTR();
  3820. }
  3821. /****************************************************************************
  3822. REMARKS:
  3823. Handles opcode 0xe4
  3824. ****************************************************************************/
  3825. void x86emuOp_in_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
  3826. {
  3827. u8 port;
  3828. START_OF_INSTR();
  3829. DECODE_PRINTF("IN\t");
  3830. port = (u8) fetch_byte_imm();
  3831. DECODE_PRINTF2("%x,AL\n", port);
  3832. TRACE_AND_STEP();
  3833. M.x86.R_AL = (*sys_inb)(port);
  3834. DECODE_CLEAR_SEGOVR();
  3835. END_OF_INSTR();
  3836. }
  3837. /****************************************************************************
  3838. REMARKS:
  3839. Handles opcode 0xe5
  3840. ****************************************************************************/
  3841. void x86emuOp_in_word_AX_IMM(u8 X86EMU_UNUSED(op1))
  3842. {
  3843. u8 port;
  3844. START_OF_INSTR();
  3845. DECODE_PRINTF("IN\t");
  3846. port = (u8) fetch_byte_imm();
  3847. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  3848. DECODE_PRINTF2("EAX,%x\n", port);
  3849. } else {
  3850. DECODE_PRINTF2("AX,%x\n", port);
  3851. }
  3852. TRACE_AND_STEP();
  3853. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  3854. M.x86.R_EAX = (*sys_inl)(port);
  3855. } else {
  3856. M.x86.R_AX = (*sys_inw)(port);
  3857. }
  3858. DECODE_CLEAR_SEGOVR();
  3859. END_OF_INSTR();
  3860. }
  3861. /****************************************************************************
  3862. REMARKS:
  3863. Handles opcode 0xe6
  3864. ****************************************************************************/
  3865. void x86emuOp_out_byte_IMM_AL(u8 X86EMU_UNUSED(op1))
  3866. {
  3867. u8 port;
  3868. START_OF_INSTR();
  3869. DECODE_PRINTF("OUT\t");
  3870. port = (u8) fetch_byte_imm();
  3871. DECODE_PRINTF2("%x,AL\n", port);
  3872. TRACE_AND_STEP();
  3873. (*sys_outb)(port, M.x86.R_AL);
  3874. DECODE_CLEAR_SEGOVR();
  3875. END_OF_INSTR();
  3876. }
  3877. /****************************************************************************
  3878. REMARKS:
  3879. Handles opcode 0xe7
  3880. ****************************************************************************/
  3881. void x86emuOp_out_word_IMM_AX(u8 X86EMU_UNUSED(op1))
  3882. {
  3883. u8 port;
  3884. START_OF_INSTR();
  3885. DECODE_PRINTF("OUT\t");
  3886. port = (u8) fetch_byte_imm();
  3887. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  3888. DECODE_PRINTF2("%x,EAX\n", port);
  3889. } else {
  3890. DECODE_PRINTF2("%x,AX\n", port);
  3891. }
  3892. TRACE_AND_STEP();
  3893. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  3894. (*sys_outl)(port, M.x86.R_EAX);
  3895. } else {
  3896. (*sys_outw)(port, M.x86.R_AX);
  3897. }
  3898. DECODE_CLEAR_SEGOVR();
  3899. END_OF_INSTR();
  3900. }
  3901. /****************************************************************************
  3902. REMARKS:
  3903. Handles opcode 0xe8
  3904. ****************************************************************************/
  3905. void x86emuOp_call_near_IMM(u8 X86EMU_UNUSED(op1))
  3906. {
  3907. s16 ip;
  3908. START_OF_INSTR();
  3909. DECODE_PRINTF("CALL\t");
  3910. ip = (s16) fetch_word_imm();
  3911. ip += (s16) M.x86.R_IP; /* CHECK SIGN */
  3912. DECODE_PRINTF2("%04x\n", ip);
  3913. CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, ip, "");
  3914. TRACE_AND_STEP();
  3915. push_word(M.x86.R_IP);
  3916. M.x86.R_IP = ip;
  3917. DECODE_CLEAR_SEGOVR();
  3918. END_OF_INSTR();
  3919. }
  3920. /****************************************************************************
  3921. REMARKS:
  3922. Handles opcode 0xe9
  3923. ****************************************************************************/
  3924. void x86emuOp_jump_near_IMM(u8 X86EMU_UNUSED(op1))
  3925. {
  3926. int ip;
  3927. START_OF_INSTR();
  3928. DECODE_PRINTF("JMP\t");
  3929. ip = (s16)fetch_word_imm();
  3930. ip += (s16)M.x86.R_IP;
  3931. DECODE_PRINTF2("%04x\n", ip);
  3932. TRACE_AND_STEP();
  3933. M.x86.R_IP = (u16)ip;
  3934. DECODE_CLEAR_SEGOVR();
  3935. END_OF_INSTR();
  3936. }
  3937. /****************************************************************************
  3938. REMARKS:
  3939. Handles opcode 0xea
  3940. ****************************************************************************/
  3941. void x86emuOp_jump_far_IMM(u8 X86EMU_UNUSED(op1))
  3942. {
  3943. u16 cs, ip;
  3944. START_OF_INSTR();
  3945. DECODE_PRINTF("JMP\tFAR ");
  3946. ip = fetch_word_imm();
  3947. cs = fetch_word_imm();
  3948. DECODE_PRINTF2("%04x:", cs);
  3949. DECODE_PRINTF2("%04x\n", ip);
  3950. TRACE_AND_STEP();
  3951. M.x86.R_IP = ip;
  3952. M.x86.R_CS = cs;
  3953. DECODE_CLEAR_SEGOVR();
  3954. END_OF_INSTR();
  3955. }
  3956. /****************************************************************************
  3957. REMARKS:
  3958. Handles opcode 0xeb
  3959. ****************************************************************************/
  3960. void x86emuOp_jump_byte_IMM(u8 X86EMU_UNUSED(op1))
  3961. {
  3962. u16 target;
  3963. s8 offset;
  3964. START_OF_INSTR();
  3965. DECODE_PRINTF("JMP\t");
  3966. offset = (s8)fetch_byte_imm();
  3967. target = (u16)(M.x86.R_IP + offset);
  3968. DECODE_PRINTF2("%x\n", target);
  3969. TRACE_AND_STEP();
  3970. M.x86.R_IP = target;
  3971. DECODE_CLEAR_SEGOVR();
  3972. END_OF_INSTR();
  3973. }
  3974. /****************************************************************************
  3975. REMARKS:
  3976. Handles opcode 0xec
  3977. ****************************************************************************/
  3978. void x86emuOp_in_byte_AL_DX(u8 X86EMU_UNUSED(op1))
  3979. {
  3980. START_OF_INSTR();
  3981. DECODE_PRINTF("IN\tAL,DX\n");
  3982. TRACE_AND_STEP();
  3983. M.x86.R_AL = (*sys_inb)(M.x86.R_DX);
  3984. DECODE_CLEAR_SEGOVR();
  3985. END_OF_INSTR();
  3986. }
  3987. /****************************************************************************
  3988. REMARKS:
  3989. Handles opcode 0xed
  3990. ****************************************************************************/
  3991. void x86emuOp_in_word_AX_DX(u8 X86EMU_UNUSED(op1))
  3992. {
  3993. START_OF_INSTR();
  3994. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  3995. DECODE_PRINTF("IN\tEAX,DX\n");
  3996. } else {
  3997. DECODE_PRINTF("IN\tAX,DX\n");
  3998. }
  3999. TRACE_AND_STEP();
  4000. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  4001. M.x86.R_EAX = (*sys_inl)(M.x86.R_DX);
  4002. } else {
  4003. M.x86.R_AX = (*sys_inw)(M.x86.R_DX);
  4004. }
  4005. DECODE_CLEAR_SEGOVR();
  4006. END_OF_INSTR();
  4007. }
  4008. /****************************************************************************
  4009. REMARKS:
  4010. Handles opcode 0xee
  4011. ****************************************************************************/
  4012. void x86emuOp_out_byte_DX_AL(u8 X86EMU_UNUSED(op1))
  4013. {
  4014. START_OF_INSTR();
  4015. DECODE_PRINTF("OUT\tDX,AL\n");
  4016. TRACE_AND_STEP();
  4017. (*sys_outb)(M.x86.R_DX, M.x86.R_AL);
  4018. DECODE_CLEAR_SEGOVR();
  4019. END_OF_INSTR();
  4020. }
  4021. /****************************************************************************
  4022. REMARKS:
  4023. Handles opcode 0xef
  4024. ****************************************************************************/
  4025. void x86emuOp_out_word_DX_AX(u8 X86EMU_UNUSED(op1))
  4026. {
  4027. START_OF_INSTR();
  4028. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  4029. DECODE_PRINTF("OUT\tDX,EAX\n");
  4030. } else {
  4031. DECODE_PRINTF("OUT\tDX,AX\n");
  4032. }
  4033. TRACE_AND_STEP();
  4034. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  4035. (*sys_outl)(M.x86.R_DX, M.x86.R_EAX);
  4036. } else {
  4037. (*sys_outw)(M.x86.R_DX, M.x86.R_AX);
  4038. }
  4039. DECODE_CLEAR_SEGOVR();
  4040. END_OF_INSTR();
  4041. }
  4042. /****************************************************************************
  4043. REMARKS:
  4044. Handles opcode 0xf0
  4045. ****************************************************************************/
  4046. void x86emuOp_lock(u8 X86EMU_UNUSED(op1))
  4047. {
  4048. START_OF_INSTR();
  4049. DECODE_PRINTF("LOCK:\n");
  4050. TRACE_AND_STEP();
  4051. DECODE_CLEAR_SEGOVR();
  4052. END_OF_INSTR();
  4053. }
  4054. /*opcode 0xf1 ILLEGAL OPERATION */
  4055. /****************************************************************************
  4056. REMARKS:
  4057. Handles opcode 0xf2
  4058. ****************************************************************************/
  4059. void x86emuOp_repne(u8 X86EMU_UNUSED(op1))
  4060. {
  4061. START_OF_INSTR();
  4062. DECODE_PRINTF("REPNE\n");
  4063. TRACE_AND_STEP();
  4064. M.x86.mode |= SYSMODE_PREFIX_REPNE;
  4065. DECODE_CLEAR_SEGOVR();
  4066. END_OF_INSTR();
  4067. }
  4068. /****************************************************************************
  4069. REMARKS:
  4070. Handles opcode 0xf3
  4071. ****************************************************************************/
  4072. void x86emuOp_repe(u8 X86EMU_UNUSED(op1))
  4073. {
  4074. START_OF_INSTR();
  4075. DECODE_PRINTF("REPE\n");
  4076. TRACE_AND_STEP();
  4077. M.x86.mode |= SYSMODE_PREFIX_REPE;
  4078. DECODE_CLEAR_SEGOVR();
  4079. END_OF_INSTR();
  4080. }
  4081. /****************************************************************************
  4082. REMARKS:
  4083. Handles opcode 0xf4
  4084. ****************************************************************************/
  4085. void x86emuOp_halt(u8 X86EMU_UNUSED(op1))
  4086. {
  4087. START_OF_INSTR();
  4088. DECODE_PRINTF("HALT\n");
  4089. TRACE_AND_STEP();
  4090. HALT_SYS();
  4091. DECODE_CLEAR_SEGOVR();
  4092. END_OF_INSTR();
  4093. }
  4094. /****************************************************************************
  4095. REMARKS:
  4096. Handles opcode 0xf5
  4097. ****************************************************************************/
  4098. void x86emuOp_cmc(u8 X86EMU_UNUSED(op1))
  4099. {
  4100. /* complement the carry flag. */
  4101. START_OF_INSTR();
  4102. DECODE_PRINTF("CMC\n");
  4103. TRACE_AND_STEP();
  4104. TOGGLE_FLAG(F_CF);
  4105. DECODE_CLEAR_SEGOVR();
  4106. END_OF_INSTR();
  4107. }
  4108. /****************************************************************************
  4109. REMARKS:
  4110. Handles opcode 0xf6
  4111. ****************************************************************************/
  4112. void x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))
  4113. {
  4114. int mod, rl, rh;
  4115. u8 *destreg;
  4116. uint destoffset;
  4117. u8 destval, srcval;
  4118. /* long, drawn out code follows. Double switch for a total
  4119. of 32 cases. */
  4120. START_OF_INSTR();
  4121. FETCH_DECODE_MODRM(mod, rh, rl);
  4122. DECODE_PRINTF(opF6_names[rh]);
  4123. if (mod < 3) {
  4124. DECODE_PRINTF("BYTE PTR ");
  4125. destoffset = decode_rmXX_address(mod, rl);
  4126. destval = fetch_data_byte(destoffset);
  4127. switch (rh) {
  4128. case 0: /* test byte imm */
  4129. DECODE_PRINTF(",");
  4130. srcval = fetch_byte_imm();
  4131. DECODE_PRINTF2("%02x\n", srcval);
  4132. TRACE_AND_STEP();
  4133. test_byte(destval, srcval);
  4134. break;
  4135. case 1:
  4136. ERR_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
  4137. HALT_SYS();
  4138. break;
  4139. case 2:
  4140. DECODE_PRINTF("\n");
  4141. TRACE_AND_STEP();
  4142. destval = not_byte(destval);
  4143. store_data_byte(destoffset, destval);
  4144. break;
  4145. case 3:
  4146. DECODE_PRINTF("\n");
  4147. TRACE_AND_STEP();
  4148. destval = neg_byte(destval);
  4149. store_data_byte(destoffset, destval);
  4150. break;
  4151. case 4:
  4152. DECODE_PRINTF("\n");
  4153. TRACE_AND_STEP();
  4154. mul_byte(destval);
  4155. break;
  4156. case 5:
  4157. DECODE_PRINTF("\n");
  4158. TRACE_AND_STEP();
  4159. imul_byte(destval);
  4160. break;
  4161. case 6:
  4162. DECODE_PRINTF("\n");
  4163. TRACE_AND_STEP();
  4164. div_byte(destval);
  4165. break;
  4166. default:
  4167. DECODE_PRINTF("\n");
  4168. TRACE_AND_STEP();
  4169. idiv_byte(destval);
  4170. break;
  4171. }
  4172. } else { /* mod=11 */
  4173. destreg = DECODE_RM_BYTE_REGISTER(rl);
  4174. switch (rh) {
  4175. case 0: /* test byte imm */
  4176. DECODE_PRINTF(",");
  4177. srcval = fetch_byte_imm();
  4178. DECODE_PRINTF2("%02x\n", srcval);
  4179. TRACE_AND_STEP();
  4180. test_byte(*destreg, srcval);
  4181. break;
  4182. case 1:
  4183. ERR_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
  4184. HALT_SYS();
  4185. break;
  4186. case 2:
  4187. DECODE_PRINTF("\n");
  4188. TRACE_AND_STEP();
  4189. *destreg = not_byte(*destreg);
  4190. break;
  4191. case 3:
  4192. DECODE_PRINTF("\n");
  4193. TRACE_AND_STEP();
  4194. *destreg = neg_byte(*destreg);
  4195. break;
  4196. case 4:
  4197. DECODE_PRINTF("\n");
  4198. TRACE_AND_STEP();
  4199. mul_byte(*destreg); /*!!! */
  4200. break;
  4201. case 5:
  4202. DECODE_PRINTF("\n");
  4203. TRACE_AND_STEP();
  4204. imul_byte(*destreg);
  4205. break;
  4206. case 6:
  4207. DECODE_PRINTF("\n");
  4208. TRACE_AND_STEP();
  4209. div_byte(*destreg);
  4210. break;
  4211. default:
  4212. DECODE_PRINTF("\n");
  4213. TRACE_AND_STEP();
  4214. idiv_byte(*destreg);
  4215. break;
  4216. }
  4217. }
  4218. DECODE_CLEAR_SEGOVR();
  4219. END_OF_INSTR();
  4220. }
  4221. /****************************************************************************
  4222. REMARKS:
  4223. Handles opcode 0xf7
  4224. ****************************************************************************/
  4225. void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
  4226. {
  4227. int mod, rl, rh;
  4228. uint destoffset;
  4229. START_OF_INSTR();
  4230. FETCH_DECODE_MODRM(mod, rh, rl);
  4231. DECODE_PRINTF(opF6_names[rh]);
  4232. if (mod < 3) {
  4233. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  4234. u32 destval, srcval;
  4235. DECODE_PRINTF("DWORD PTR ");
  4236. destoffset = decode_rmXX_address(mod, rl);
  4237. destval = fetch_data_long(destoffset);
  4238. switch (rh) {
  4239. case 0:
  4240. DECODE_PRINTF(",");
  4241. srcval = fetch_long_imm();
  4242. DECODE_PRINTF2("%x\n", srcval);
  4243. TRACE_AND_STEP();
  4244. test_long(destval, srcval);
  4245. break;
  4246. case 1:
  4247. ERR_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\n");
  4248. HALT_SYS();
  4249. break;
  4250. case 2:
  4251. DECODE_PRINTF("\n");
  4252. TRACE_AND_STEP();
  4253. destval = not_long(destval);
  4254. store_data_long(destoffset, destval);
  4255. break;
  4256. case 3:
  4257. DECODE_PRINTF("\n");
  4258. TRACE_AND_STEP();
  4259. destval = neg_long(destval);
  4260. store_data_long(destoffset, destval);
  4261. break;
  4262. case 4:
  4263. DECODE_PRINTF("\n");
  4264. TRACE_AND_STEP();
  4265. mul_long(destval);
  4266. break;
  4267. case 5:
  4268. DECODE_PRINTF("\n");
  4269. TRACE_AND_STEP();
  4270. imul_long(destval);
  4271. break;
  4272. case 6:
  4273. DECODE_PRINTF("\n");
  4274. TRACE_AND_STEP();
  4275. div_long(destval);
  4276. break;
  4277. case 7:
  4278. DECODE_PRINTF("\n");
  4279. TRACE_AND_STEP();
  4280. idiv_long(destval);
  4281. break;
  4282. }
  4283. } else {
  4284. u16 destval, srcval;
  4285. DECODE_PRINTF("WORD PTR ");
  4286. destoffset = decode_rmXX_address(mod, rl);
  4287. destval = fetch_data_word(destoffset);
  4288. switch (rh) {
  4289. case 0: /* test word imm */
  4290. DECODE_PRINTF(",");
  4291. srcval = fetch_word_imm();
  4292. DECODE_PRINTF2("%x\n", srcval);
  4293. TRACE_AND_STEP();
  4294. test_word(destval, srcval);
  4295. break;
  4296. case 1:
  4297. ERR_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\n");
  4298. HALT_SYS();
  4299. break;
  4300. case 2:
  4301. DECODE_PRINTF("\n");
  4302. TRACE_AND_STEP();
  4303. destval = not_word(destval);
  4304. store_data_word(destoffset, destval);
  4305. break;
  4306. case 3:
  4307. DECODE_PRINTF("\n");
  4308. TRACE_AND_STEP();
  4309. destval = neg_word(destval);
  4310. store_data_word(destoffset, destval);
  4311. break;
  4312. case 4:
  4313. DECODE_PRINTF("\n");
  4314. TRACE_AND_STEP();
  4315. mul_word(destval);
  4316. break;
  4317. case 5:
  4318. DECODE_PRINTF("\n");
  4319. TRACE_AND_STEP();
  4320. imul_word(destval);
  4321. break;
  4322. case 6:
  4323. DECODE_PRINTF("\n");
  4324. TRACE_AND_STEP();
  4325. div_word(destval);
  4326. break;
  4327. case 7:
  4328. DECODE_PRINTF("\n");
  4329. TRACE_AND_STEP();
  4330. idiv_word(destval);
  4331. break;
  4332. }
  4333. }
  4334. } else { /* mod=11 */
  4335. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  4336. u32 *destreg;
  4337. u32 srcval;
  4338. destreg = DECODE_RM_LONG_REGISTER(rl);
  4339. switch (rh) {
  4340. case 0: /* test word imm */
  4341. DECODE_PRINTF(",");
  4342. srcval = fetch_long_imm();
  4343. DECODE_PRINTF2("%x\n", srcval);
  4344. TRACE_AND_STEP();
  4345. test_long(*destreg, srcval);
  4346. break;
  4347. case 1:
  4348. ERR_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
  4349. HALT_SYS();
  4350. break;
  4351. case 2:
  4352. DECODE_PRINTF("\n");
  4353. TRACE_AND_STEP();
  4354. *destreg = not_long(*destreg);
  4355. break;
  4356. case 3:
  4357. DECODE_PRINTF("\n");
  4358. TRACE_AND_STEP();
  4359. *destreg = neg_long(*destreg);
  4360. break;
  4361. case 4:
  4362. DECODE_PRINTF("\n");
  4363. TRACE_AND_STEP();
  4364. mul_long(*destreg); /*!!! */
  4365. break;
  4366. case 5:
  4367. DECODE_PRINTF("\n");
  4368. TRACE_AND_STEP();
  4369. imul_long(*destreg);
  4370. break;
  4371. case 6:
  4372. DECODE_PRINTF("\n");
  4373. TRACE_AND_STEP();
  4374. div_long(*destreg);
  4375. break;
  4376. case 7:
  4377. DECODE_PRINTF("\n");
  4378. TRACE_AND_STEP();
  4379. idiv_long(*destreg);
  4380. break;
  4381. }
  4382. } else {
  4383. u16 *destreg;
  4384. u16 srcval;
  4385. destreg = DECODE_RM_WORD_REGISTER(rl);
  4386. switch (rh) {
  4387. case 0: /* test word imm */
  4388. DECODE_PRINTF(",");
  4389. srcval = fetch_word_imm();
  4390. DECODE_PRINTF2("%x\n", srcval);
  4391. TRACE_AND_STEP();
  4392. test_word(*destreg, srcval);
  4393. break;
  4394. case 1:
  4395. ERR_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
  4396. HALT_SYS();
  4397. break;
  4398. case 2:
  4399. DECODE_PRINTF("\n");
  4400. TRACE_AND_STEP();
  4401. *destreg = not_word(*destreg);
  4402. break;
  4403. case 3:
  4404. DECODE_PRINTF("\n");
  4405. TRACE_AND_STEP();
  4406. *destreg = neg_word(*destreg);
  4407. break;
  4408. case 4:
  4409. DECODE_PRINTF("\n");
  4410. TRACE_AND_STEP();
  4411. mul_word(*destreg); /*!!! */
  4412. break;
  4413. case 5:
  4414. DECODE_PRINTF("\n");
  4415. TRACE_AND_STEP();
  4416. imul_word(*destreg);
  4417. break;
  4418. case 6:
  4419. DECODE_PRINTF("\n");
  4420. TRACE_AND_STEP();
  4421. div_word(*destreg);
  4422. break;
  4423. case 7:
  4424. DECODE_PRINTF("\n");
  4425. TRACE_AND_STEP();
  4426. idiv_word(*destreg);
  4427. break;
  4428. }
  4429. }
  4430. }
  4431. DECODE_CLEAR_SEGOVR();
  4432. END_OF_INSTR();
  4433. }
  4434. /****************************************************************************
  4435. REMARKS:
  4436. Handles opcode 0xf8
  4437. ****************************************************************************/
  4438. void x86emuOp_clc(u8 X86EMU_UNUSED(op1))
  4439. {
  4440. /* clear the carry flag. */
  4441. START_OF_INSTR();
  4442. DECODE_PRINTF("CLC\n");
  4443. TRACE_AND_STEP();
  4444. CLEAR_FLAG(F_CF);
  4445. DECODE_CLEAR_SEGOVR();
  4446. END_OF_INSTR();
  4447. }
  4448. /****************************************************************************
  4449. REMARKS:
  4450. Handles opcode 0xf9
  4451. ****************************************************************************/
  4452. void x86emuOp_stc(u8 X86EMU_UNUSED(op1))
  4453. {
  4454. /* set the carry flag. */
  4455. START_OF_INSTR();
  4456. DECODE_PRINTF("STC\n");
  4457. TRACE_AND_STEP();
  4458. SET_FLAG(F_CF);
  4459. DECODE_CLEAR_SEGOVR();
  4460. END_OF_INSTR();
  4461. }
  4462. /****************************************************************************
  4463. REMARKS:
  4464. Handles opcode 0xfa
  4465. ****************************************************************************/
  4466. void x86emuOp_cli(u8 X86EMU_UNUSED(op1))
  4467. {
  4468. /* clear interrupts. */
  4469. START_OF_INSTR();
  4470. DECODE_PRINTF("CLI\n");
  4471. TRACE_AND_STEP();
  4472. CLEAR_FLAG(F_IF);
  4473. DECODE_CLEAR_SEGOVR();
  4474. END_OF_INSTR();
  4475. }
  4476. /****************************************************************************
  4477. REMARKS:
  4478. Handles opcode 0xfb
  4479. ****************************************************************************/
  4480. void x86emuOp_sti(u8 X86EMU_UNUSED(op1))
  4481. {
  4482. /* enable interrupts. */
  4483. START_OF_INSTR();
  4484. DECODE_PRINTF("STI\n");
  4485. TRACE_AND_STEP();
  4486. SET_FLAG(F_IF);
  4487. DECODE_CLEAR_SEGOVR();
  4488. END_OF_INSTR();
  4489. }
  4490. /****************************************************************************
  4491. REMARKS:
  4492. Handles opcode 0xfc
  4493. ****************************************************************************/
  4494. void x86emuOp_cld(u8 X86EMU_UNUSED(op1))
  4495. {
  4496. /* clear interrupts. */
  4497. START_OF_INSTR();
  4498. DECODE_PRINTF("CLD\n");
  4499. TRACE_AND_STEP();
  4500. CLEAR_FLAG(F_DF);
  4501. DECODE_CLEAR_SEGOVR();
  4502. END_OF_INSTR();
  4503. }
  4504. /****************************************************************************
  4505. REMARKS:
  4506. Handles opcode 0xfd
  4507. ****************************************************************************/
  4508. void x86emuOp_std(u8 X86EMU_UNUSED(op1))
  4509. {
  4510. /* clear interrupts. */
  4511. START_OF_INSTR();
  4512. DECODE_PRINTF("STD\n");
  4513. TRACE_AND_STEP();
  4514. SET_FLAG(F_DF);
  4515. DECODE_CLEAR_SEGOVR();
  4516. END_OF_INSTR();
  4517. }
  4518. /****************************************************************************
  4519. REMARKS:
  4520. Handles opcode 0xfe
  4521. ****************************************************************************/
  4522. void x86emuOp_opcFE_byte_RM(u8 X86EMU_UNUSED(op1))
  4523. {
  4524. int mod, rh, rl;
  4525. u8 destval;
  4526. uint destoffset;
  4527. u8 *destreg;
  4528. /* Yet another special case instruction. */
  4529. START_OF_INSTR();
  4530. FETCH_DECODE_MODRM(mod, rh, rl);
  4531. #ifdef CONFIG_X86EMU_DEBUG
  4532. if (DEBUG_DECODE()) {
  4533. /* XXX DECODE_PRINTF may be changed to something more
  4534. general, so that it is important to leave the strings
  4535. in the same format, even though the result is that the
  4536. above test is done twice. */
  4537. switch (rh) {
  4538. case 0:
  4539. DECODE_PRINTF("INC\t");
  4540. break;
  4541. case 1:
  4542. DECODE_PRINTF("DEC\t");
  4543. break;
  4544. case 2:
  4545. case 3:
  4546. case 4:
  4547. case 5:
  4548. case 6:
  4549. case 7:
  4550. ERR_PRINTF2("ILLEGAL OP MAJOR OP 0xFE MINOR OP %x\n", mod);
  4551. HALT_SYS();
  4552. break;
  4553. }
  4554. }
  4555. #endif
  4556. if (mod < 3) {
  4557. DECODE_PRINTF("BYTE PTR ");
  4558. destoffset = decode_rmXX_address(mod, rl);
  4559. DECODE_PRINTF("\n");
  4560. destval = fetch_data_byte(destoffset);
  4561. TRACE_AND_STEP();
  4562. if (rh == 0)
  4563. destval = inc_byte(destval);
  4564. else
  4565. destval = dec_byte(destval);
  4566. store_data_byte(destoffset, destval);
  4567. } else {
  4568. destreg = DECODE_RM_BYTE_REGISTER(rl);
  4569. DECODE_PRINTF("\n");
  4570. TRACE_AND_STEP();
  4571. if (rh == 0)
  4572. *destreg = inc_byte(*destreg);
  4573. else
  4574. *destreg = dec_byte(*destreg);
  4575. }
  4576. DECODE_CLEAR_SEGOVR();
  4577. END_OF_INSTR();
  4578. }
  4579. /****************************************************************************
  4580. REMARKS:
  4581. Handles opcode 0xff
  4582. ****************************************************************************/
  4583. void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
  4584. {
  4585. int mod, rh, rl;
  4586. uint destoffset = 0;
  4587. u16 *destreg;
  4588. u16 destval,destval2;
  4589. /* Yet another special case instruction. */
  4590. START_OF_INSTR();
  4591. FETCH_DECODE_MODRM(mod, rh, rl);
  4592. #ifdef CONFIG_X86EMU_DEBUG
  4593. if (DEBUG_DECODE()) {
  4594. /* XXX DECODE_PRINTF may be changed to something more
  4595. general, so that it is important to leave the strings
  4596. in the same format, even though the result is that the
  4597. above test is done twice. */
  4598. switch (rh) {
  4599. case 0:
  4600. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  4601. DECODE_PRINTF("INC\tDWORD PTR ");
  4602. } else {
  4603. DECODE_PRINTF("INC\tWORD PTR ");
  4604. }
  4605. break;
  4606. case 1:
  4607. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  4608. DECODE_PRINTF("DEC\tDWORD PTR ");
  4609. } else {
  4610. DECODE_PRINTF("DEC\tWORD PTR ");
  4611. }
  4612. break;
  4613. case 2:
  4614. DECODE_PRINTF("CALL\t ");
  4615. break;
  4616. case 3:
  4617. DECODE_PRINTF("CALL\tFAR ");
  4618. break;
  4619. case 4:
  4620. DECODE_PRINTF("JMP\t");
  4621. break;
  4622. case 5:
  4623. DECODE_PRINTF("JMP\tFAR ");
  4624. break;
  4625. case 6:
  4626. DECODE_PRINTF("PUSH\t");
  4627. break;
  4628. case 7:
  4629. ERR_PRINTF("ILLEGAL DECODING OF OPCODE FF\t");
  4630. HALT_SYS();
  4631. break;
  4632. }
  4633. }
  4634. #endif
  4635. if (mod < 3) {
  4636. destoffset = decode_rmXX_address(mod, rl);
  4637. DECODE_PRINTF("\n");
  4638. switch (rh) {
  4639. case 0: /* inc word ptr ... */
  4640. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  4641. u32 destval;
  4642. destval = fetch_data_long(destoffset);
  4643. TRACE_AND_STEP();
  4644. destval = inc_long(destval);
  4645. store_data_long(destoffset, destval);
  4646. } else {
  4647. u16 destval;
  4648. destval = fetch_data_word(destoffset);
  4649. TRACE_AND_STEP();
  4650. destval = inc_word(destval);
  4651. store_data_word(destoffset, destval);
  4652. }
  4653. break;
  4654. case 1: /* dec word ptr ... */
  4655. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  4656. u32 destval;
  4657. destval = fetch_data_long(destoffset);
  4658. TRACE_AND_STEP();
  4659. destval = dec_long(destval);
  4660. store_data_long(destoffset, destval);
  4661. } else {
  4662. u16 destval;
  4663. destval = fetch_data_word(destoffset);
  4664. TRACE_AND_STEP();
  4665. destval = dec_word(destval);
  4666. store_data_word(destoffset, destval);
  4667. }
  4668. break;
  4669. case 2: /* call word ptr ... */
  4670. destval = fetch_data_word(destoffset);
  4671. TRACE_AND_STEP();
  4672. push_word(M.x86.R_IP);
  4673. M.x86.R_IP = destval;
  4674. break;
  4675. case 3: /* call far ptr ... */
  4676. destval = fetch_data_word(destoffset);
  4677. destval2 = fetch_data_word(destoffset + 2);
  4678. TRACE_AND_STEP();
  4679. push_word(M.x86.R_CS);
  4680. M.x86.R_CS = destval2;
  4681. push_word(M.x86.R_IP);
  4682. M.x86.R_IP = destval;
  4683. break;
  4684. case 4: /* jmp word ptr ... */
  4685. destval = fetch_data_word(destoffset);
  4686. TRACE_AND_STEP();
  4687. M.x86.R_IP = destval;
  4688. break;
  4689. case 5: /* jmp far ptr ... */
  4690. destval = fetch_data_word(destoffset);
  4691. destval2 = fetch_data_word(destoffset + 2);
  4692. TRACE_AND_STEP();
  4693. M.x86.R_IP = destval;
  4694. M.x86.R_CS = destval2;
  4695. break;
  4696. case 6: /* push word ptr ... */
  4697. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  4698. u32 destval;
  4699. destval = fetch_data_long(destoffset);
  4700. TRACE_AND_STEP();
  4701. push_long(destval);
  4702. } else {
  4703. u16 destval;
  4704. destval = fetch_data_word(destoffset);
  4705. TRACE_AND_STEP();
  4706. push_word(destval);
  4707. }
  4708. break;
  4709. }
  4710. } else {
  4711. switch (rh) {
  4712. case 0:
  4713. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  4714. u32 *destreg;
  4715. destreg = DECODE_RM_LONG_REGISTER(rl);
  4716. DECODE_PRINTF("\n");
  4717. TRACE_AND_STEP();
  4718. *destreg = inc_long(*destreg);
  4719. } else {
  4720. u16 *destreg;
  4721. destreg = DECODE_RM_WORD_REGISTER(rl);
  4722. DECODE_PRINTF("\n");
  4723. TRACE_AND_STEP();
  4724. *destreg = inc_word(*destreg);
  4725. }
  4726. break;
  4727. case 1:
  4728. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  4729. u32 *destreg;
  4730. destreg = DECODE_RM_LONG_REGISTER(rl);
  4731. DECODE_PRINTF("\n");
  4732. TRACE_AND_STEP();
  4733. *destreg = dec_long(*destreg);
  4734. } else {
  4735. u16 *destreg;
  4736. destreg = DECODE_RM_WORD_REGISTER(rl);
  4737. DECODE_PRINTF("\n");
  4738. TRACE_AND_STEP();
  4739. *destreg = dec_word(*destreg);
  4740. }
  4741. break;
  4742. case 2: /* call word ptr ... */
  4743. destreg = DECODE_RM_WORD_REGISTER(rl);
  4744. DECODE_PRINTF("\n");
  4745. TRACE_AND_STEP();
  4746. push_word(M.x86.R_IP);
  4747. M.x86.R_IP = *destreg;
  4748. break;
  4749. case 3: /* jmp far ptr ... */
  4750. ERR_PRINTF("OPERATION UNDEFINED 0XFF\n");
  4751. TRACE_AND_STEP();
  4752. HALT_SYS();
  4753. break;
  4754. case 4: /* jmp ... */
  4755. destreg = DECODE_RM_WORD_REGISTER(rl);
  4756. DECODE_PRINTF("\n");
  4757. TRACE_AND_STEP();
  4758. M.x86.R_IP = (u16) (*destreg);
  4759. break;
  4760. case 5: /* jmp far ptr ... */
  4761. ERR_PRINTF("OPERATION UNDEFINED 0XFF\n");
  4762. TRACE_AND_STEP();
  4763. HALT_SYS();
  4764. break;
  4765. case 6:
  4766. if (M.x86.mode & SYSMODE_PREFIX_DATA) {
  4767. u32 *destreg;
  4768. destreg = DECODE_RM_LONG_REGISTER(rl);
  4769. DECODE_PRINTF("\n");
  4770. TRACE_AND_STEP();
  4771. push_long(*destreg);
  4772. } else {
  4773. u16 *destreg;
  4774. destreg = DECODE_RM_WORD_REGISTER(rl);
  4775. DECODE_PRINTF("\n");
  4776. TRACE_AND_STEP();
  4777. push_word(*destreg);
  4778. }
  4779. break;
  4780. }
  4781. }
  4782. DECODE_CLEAR_SEGOVR();
  4783. END_OF_INSTR();
  4784. }
  4785. /***************************************************************************
  4786. * Single byte operation code table:
  4787. **************************************************************************/
  4788. void (*x86emu_optab[256])(u8) =
  4789. {
  4790. /* 0x00 */ x86emuOp_genop_byte_RM_R,
  4791. /* 0x01 */ x86emuOp_genop_word_RM_R,
  4792. /* 0x02 */ x86emuOp_genop_byte_R_RM,
  4793. /* 0x03 */ x86emuOp_genop_word_R_RM,
  4794. /* 0x04 */ x86emuOp_genop_byte_AL_IMM,
  4795. /* 0x05 */ x86emuOp_genop_word_AX_IMM,
  4796. /* 0x06 */ x86emuOp_push_ES,
  4797. /* 0x07 */ x86emuOp_pop_ES,
  4798. /* 0x08 */ x86emuOp_genop_byte_RM_R,
  4799. /* 0x09 */ x86emuOp_genop_word_RM_R,
  4800. /* 0x0a */ x86emuOp_genop_byte_R_RM,
  4801. /* 0x0b */ x86emuOp_genop_word_R_RM,
  4802. /* 0x0c */ x86emuOp_genop_byte_AL_IMM,
  4803. /* 0x0d */ x86emuOp_genop_word_AX_IMM,
  4804. /* 0x0e */ x86emuOp_push_CS,
  4805. /* 0x0f */ x86emuOp_two_byte,
  4806. /* 0x10 */ x86emuOp_genop_byte_RM_R,
  4807. /* 0x11 */ x86emuOp_genop_word_RM_R,
  4808. /* 0x12 */ x86emuOp_genop_byte_R_RM,
  4809. /* 0x13 */ x86emuOp_genop_word_R_RM,
  4810. /* 0x14 */ x86emuOp_genop_byte_AL_IMM,
  4811. /* 0x15 */ x86emuOp_genop_word_AX_IMM,
  4812. /* 0x16 */ x86emuOp_push_SS,
  4813. /* 0x17 */ x86emuOp_pop_SS,
  4814. /* 0x18 */ x86emuOp_genop_byte_RM_R,
  4815. /* 0x19 */ x86emuOp_genop_word_RM_R,
  4816. /* 0x1a */ x86emuOp_genop_byte_R_RM,
  4817. /* 0x1b */ x86emuOp_genop_word_R_RM,
  4818. /* 0x1c */ x86emuOp_genop_byte_AL_IMM,
  4819. /* 0x1d */ x86emuOp_genop_word_AX_IMM,
  4820. /* 0x1e */ x86emuOp_push_DS,
  4821. /* 0x1f */ x86emuOp_pop_DS,
  4822. /* 0x20 */ x86emuOp_genop_byte_RM_R,
  4823. /* 0x21 */ x86emuOp_genop_word_RM_R,
  4824. /* 0x22 */ x86emuOp_genop_byte_R_RM,
  4825. /* 0x23 */ x86emuOp_genop_word_R_RM,
  4826. /* 0x24 */ x86emuOp_genop_byte_AL_IMM,
  4827. /* 0x25 */ x86emuOp_genop_word_AX_IMM,
  4828. /* 0x26 */ x86emuOp_segovr_ES,
  4829. /* 0x27 */ x86emuOp_daa,
  4830. /* 0x28 */ x86emuOp_genop_byte_RM_R,
  4831. /* 0x29 */ x86emuOp_genop_word_RM_R,
  4832. /* 0x2a */ x86emuOp_genop_byte_R_RM,
  4833. /* 0x2b */ x86emuOp_genop_word_R_RM,
  4834. /* 0x2c */ x86emuOp_genop_byte_AL_IMM,
  4835. /* 0x2d */ x86emuOp_genop_word_AX_IMM,
  4836. /* 0x2e */ x86emuOp_segovr_CS,
  4837. /* 0x2f */ x86emuOp_das,
  4838. /* 0x30 */ x86emuOp_genop_byte_RM_R,
  4839. /* 0x31 */ x86emuOp_genop_word_RM_R,
  4840. /* 0x32 */ x86emuOp_genop_byte_R_RM,
  4841. /* 0x33 */ x86emuOp_genop_word_R_RM,
  4842. /* 0x34 */ x86emuOp_genop_byte_AL_IMM,
  4843. /* 0x35 */ x86emuOp_genop_word_AX_IMM,
  4844. /* 0x36 */ x86emuOp_segovr_SS,
  4845. /* 0x37 */ x86emuOp_aaa,
  4846. /* 0x38 */ x86emuOp_genop_byte_RM_R,
  4847. /* 0x39 */ x86emuOp_genop_word_RM_R,
  4848. /* 0x3a */ x86emuOp_genop_byte_R_RM,
  4849. /* 0x3b */ x86emuOp_genop_word_R_RM,
  4850. /* 0x3c */ x86emuOp_genop_byte_AL_IMM,
  4851. /* 0x3d */ x86emuOp_genop_word_AX_IMM,
  4852. /* 0x3e */ x86emuOp_segovr_DS,
  4853. /* 0x3f */ x86emuOp_aas,
  4854. /* 0x40 */ x86emuOp_inc_register,
  4855. /* 0x41 */ x86emuOp_inc_register,
  4856. /* 0x42 */ x86emuOp_inc_register,
  4857. /* 0x43 */ x86emuOp_inc_register,
  4858. /* 0x44 */ x86emuOp_inc_register,
  4859. /* 0x45 */ x86emuOp_inc_register,
  4860. /* 0x46 */ x86emuOp_inc_register,
  4861. /* 0x47 */ x86emuOp_inc_register,
  4862. /* 0x48 */ x86emuOp_dec_register,
  4863. /* 0x49 */ x86emuOp_dec_register,
  4864. /* 0x4a */ x86emuOp_dec_register,
  4865. /* 0x4b */ x86emuOp_dec_register,
  4866. /* 0x4c */ x86emuOp_dec_register,
  4867. /* 0x4d */ x86emuOp_dec_register,
  4868. /* 0x4e */ x86emuOp_dec_register,
  4869. /* 0x4f */ x86emuOp_dec_register,
  4870. /* 0x50 */ x86emuOp_push_register,
  4871. /* 0x51 */ x86emuOp_push_register,
  4872. /* 0x52 */ x86emuOp_push_register,
  4873. /* 0x53 */ x86emuOp_push_register,
  4874. /* 0x54 */ x86emuOp_push_register,
  4875. /* 0x55 */ x86emuOp_push_register,
  4876. /* 0x56 */ x86emuOp_push_register,
  4877. /* 0x57 */ x86emuOp_push_register,
  4878. /* 0x58 */ x86emuOp_pop_register,
  4879. /* 0x59 */ x86emuOp_pop_register,
  4880. /* 0x5a */ x86emuOp_pop_register,
  4881. /* 0x5b */ x86emuOp_pop_register,
  4882. /* 0x5c */ x86emuOp_pop_register,
  4883. /* 0x5d */ x86emuOp_pop_register,
  4884. /* 0x5e */ x86emuOp_pop_register,
  4885. /* 0x5f */ x86emuOp_pop_register,
  4886. /* 0x60 */ x86emuOp_push_all,
  4887. /* 0x61 */ x86emuOp_pop_all,
  4888. /* 0x62 */ x86emuOp_illegal_op, /* bound */
  4889. /* 0x63 */ x86emuOp_illegal_op, /* arpl */
  4890. /* 0x64 */ x86emuOp_segovr_FS,
  4891. /* 0x65 */ x86emuOp_segovr_GS,
  4892. /* 0x66 */ x86emuOp_prefix_data,
  4893. /* 0x67 */ x86emuOp_prefix_addr,
  4894. /* 0x68 */ x86emuOp_push_word_IMM,
  4895. /* 0x69 */ x86emuOp_imul_word_IMM,
  4896. /* 0x6a */ x86emuOp_push_byte_IMM,
  4897. /* 0x6b */ x86emuOp_imul_byte_IMM,
  4898. /* 0x6c */ x86emuOp_ins_byte,
  4899. /* 0x6d */ x86emuOp_ins_word,
  4900. /* 0x6e */ x86emuOp_outs_byte,
  4901. /* 0x6f */ x86emuOp_outs_word,
  4902. /* 0x70 */ x86emuOp_jump_near_cond,
  4903. /* 0x71 */ x86emuOp_jump_near_cond,
  4904. /* 0x72 */ x86emuOp_jump_near_cond,
  4905. /* 0x73 */ x86emuOp_jump_near_cond,
  4906. /* 0x74 */ x86emuOp_jump_near_cond,
  4907. /* 0x75 */ x86emuOp_jump_near_cond,
  4908. /* 0x76 */ x86emuOp_jump_near_cond,
  4909. /* 0x77 */ x86emuOp_jump_near_cond,
  4910. /* 0x78 */ x86emuOp_jump_near_cond,
  4911. /* 0x79 */ x86emuOp_jump_near_cond,
  4912. /* 0x7a */ x86emuOp_jump_near_cond,
  4913. /* 0x7b */ x86emuOp_jump_near_cond,
  4914. /* 0x7c */ x86emuOp_jump_near_cond,
  4915. /* 0x7d */ x86emuOp_jump_near_cond,
  4916. /* 0x7e */ x86emuOp_jump_near_cond,
  4917. /* 0x7f */ x86emuOp_jump_near_cond,
  4918. /* 0x80 */ x86emuOp_opc80_byte_RM_IMM,
  4919. /* 0x81 */ x86emuOp_opc81_word_RM_IMM,
  4920. /* 0x82 */ x86emuOp_opc82_byte_RM_IMM,
  4921. /* 0x83 */ x86emuOp_opc83_word_RM_IMM,
  4922. /* 0x84 */ x86emuOp_test_byte_RM_R,
  4923. /* 0x85 */ x86emuOp_test_word_RM_R,
  4924. /* 0x86 */ x86emuOp_xchg_byte_RM_R,
  4925. /* 0x87 */ x86emuOp_xchg_word_RM_R,
  4926. /* 0x88 */ x86emuOp_mov_byte_RM_R,
  4927. /* 0x89 */ x86emuOp_mov_word_RM_R,
  4928. /* 0x8a */ x86emuOp_mov_byte_R_RM,
  4929. /* 0x8b */ x86emuOp_mov_word_R_RM,
  4930. /* 0x8c */ x86emuOp_mov_word_RM_SR,
  4931. /* 0x8d */ x86emuOp_lea_word_R_M,
  4932. /* 0x8e */ x86emuOp_mov_word_SR_RM,
  4933. /* 0x8f */ x86emuOp_pop_RM,
  4934. /* 0x90 */ x86emuOp_nop,
  4935. /* 0x91 */ x86emuOp_xchg_word_AX_register,
  4936. /* 0x92 */ x86emuOp_xchg_word_AX_register,
  4937. /* 0x93 */ x86emuOp_xchg_word_AX_register,
  4938. /* 0x94 */ x86emuOp_xchg_word_AX_register,
  4939. /* 0x95 */ x86emuOp_xchg_word_AX_register,
  4940. /* 0x96 */ x86emuOp_xchg_word_AX_register,
  4941. /* 0x97 */ x86emuOp_xchg_word_AX_register,
  4942. /* 0x98 */ x86emuOp_cbw,
  4943. /* 0x99 */ x86emuOp_cwd,
  4944. /* 0x9a */ x86emuOp_call_far_IMM,
  4945. /* 0x9b */ x86emuOp_wait,
  4946. /* 0x9c */ x86emuOp_pushf_word,
  4947. /* 0x9d */ x86emuOp_popf_word,
  4948. /* 0x9e */ x86emuOp_sahf,
  4949. /* 0x9f */ x86emuOp_lahf,
  4950. /* 0xa0 */ x86emuOp_mov_AL_M_IMM,
  4951. /* 0xa1 */ x86emuOp_mov_AX_M_IMM,
  4952. /* 0xa2 */ x86emuOp_mov_M_AL_IMM,
  4953. /* 0xa3 */ x86emuOp_mov_M_AX_IMM,
  4954. /* 0xa4 */ x86emuOp_movs_byte,
  4955. /* 0xa5 */ x86emuOp_movs_word,
  4956. /* 0xa6 */ x86emuOp_cmps_byte,
  4957. /* 0xa7 */ x86emuOp_cmps_word,
  4958. /* 0xa8 */ x86emuOp_test_AL_IMM,
  4959. /* 0xa9 */ x86emuOp_test_AX_IMM,
  4960. /* 0xaa */ x86emuOp_stos_byte,
  4961. /* 0xab */ x86emuOp_stos_word,
  4962. /* 0xac */ x86emuOp_lods_byte,
  4963. /* 0xad */ x86emuOp_lods_word,
  4964. /* 0xac */ x86emuOp_scas_byte,
  4965. /* 0xad */ x86emuOp_scas_word,
  4966. /* 0xb0 */ x86emuOp_mov_byte_register_IMM,
  4967. /* 0xb1 */ x86emuOp_mov_byte_register_IMM,
  4968. /* 0xb2 */ x86emuOp_mov_byte_register_IMM,
  4969. /* 0xb3 */ x86emuOp_mov_byte_register_IMM,
  4970. /* 0xb4 */ x86emuOp_mov_byte_register_IMM,
  4971. /* 0xb5 */ x86emuOp_mov_byte_register_IMM,
  4972. /* 0xb6 */ x86emuOp_mov_byte_register_IMM,
  4973. /* 0xb7 */ x86emuOp_mov_byte_register_IMM,
  4974. /* 0xb8 */ x86emuOp_mov_word_register_IMM,
  4975. /* 0xb9 */ x86emuOp_mov_word_register_IMM,
  4976. /* 0xba */ x86emuOp_mov_word_register_IMM,
  4977. /* 0xbb */ x86emuOp_mov_word_register_IMM,
  4978. /* 0xbc */ x86emuOp_mov_word_register_IMM,
  4979. /* 0xbd */ x86emuOp_mov_word_register_IMM,
  4980. /* 0xbe */ x86emuOp_mov_word_register_IMM,
  4981. /* 0xbf */ x86emuOp_mov_word_register_IMM,
  4982. /* 0xc0 */ x86emuOp_opcC0_byte_RM_MEM,
  4983. /* 0xc1 */ x86emuOp_opcC1_word_RM_MEM,
  4984. /* 0xc2 */ x86emuOp_ret_near_IMM,
  4985. /* 0xc3 */ x86emuOp_ret_near,
  4986. /* 0xc4 */ x86emuOp_les_R_IMM,
  4987. /* 0xc5 */ x86emuOp_lds_R_IMM,
  4988. /* 0xc6 */ x86emuOp_mov_byte_RM_IMM,
  4989. /* 0xc7 */ x86emuOp_mov_word_RM_IMM,
  4990. /* 0xc8 */ x86emuOp_enter,
  4991. /* 0xc9 */ x86emuOp_leave,
  4992. /* 0xca */ x86emuOp_ret_far_IMM,
  4993. /* 0xcb */ x86emuOp_ret_far,
  4994. /* 0xcc */ x86emuOp_int3,
  4995. /* 0xcd */ x86emuOp_int_IMM,
  4996. /* 0xce */ x86emuOp_into,
  4997. /* 0xcf */ x86emuOp_iret,
  4998. /* 0xd0 */ x86emuOp_opcD0_byte_RM_1,
  4999. /* 0xd1 */ x86emuOp_opcD1_word_RM_1,
  5000. /* 0xd2 */ x86emuOp_opcD2_byte_RM_CL,
  5001. /* 0xd3 */ x86emuOp_opcD3_word_RM_CL,
  5002. /* 0xd4 */ x86emuOp_aam,
  5003. /* 0xd5 */ x86emuOp_aad,
  5004. /* 0xd6 */ x86emuOp_illegal_op, /* Undocumented SETALC instruction */
  5005. /* 0xd7 */ x86emuOp_xlat,
  5006. /* 0xd8 */ NULL, /*x86emuOp_esc_coprocess_d8,*/
  5007. /* 0xd9 */ NULL, /*x86emuOp_esc_coprocess_d9,*/
  5008. /* 0xda */ NULL, /*x86emuOp_esc_coprocess_da,*/
  5009. /* 0xdb */ NULL, /*x86emuOp_esc_coprocess_db,*/
  5010. /* 0xdc */ NULL, /*x86emuOp_esc_coprocess_dc,*/
  5011. /* 0xdd */ NULL, /*x86emuOp_esc_coprocess_dd,*/
  5012. /* 0xde */ NULL, /*x86emuOp_esc_coprocess_de,*/
  5013. /* 0xdf */ NULL, /*x86emuOp_esc_coprocess_df,*/
  5014. /* 0xe0 */ x86emuOp_loopne,
  5015. /* 0xe1 */ x86emuOp_loope,
  5016. /* 0xe2 */ x86emuOp_loop,
  5017. /* 0xe3 */ x86emuOp_jcxz,
  5018. /* 0xe4 */ x86emuOp_in_byte_AL_IMM,
  5019. /* 0xe5 */ x86emuOp_in_word_AX_IMM,
  5020. /* 0xe6 */ x86emuOp_out_byte_IMM_AL,
  5021. /* 0xe7 */ x86emuOp_out_word_IMM_AX,
  5022. /* 0xe8 */ x86emuOp_call_near_IMM,
  5023. /* 0xe9 */ x86emuOp_jump_near_IMM,
  5024. /* 0xea */ x86emuOp_jump_far_IMM,
  5025. /* 0xeb */ x86emuOp_jump_byte_IMM,
  5026. /* 0xec */ x86emuOp_in_byte_AL_DX,
  5027. /* 0xed */ x86emuOp_in_word_AX_DX,
  5028. /* 0xee */ x86emuOp_out_byte_DX_AL,
  5029. /* 0xef */ x86emuOp_out_word_DX_AX,
  5030. /* 0xf0 */ x86emuOp_lock,
  5031. /* 0xf1 */ x86emuOp_illegal_op,
  5032. /* 0xf2 */ x86emuOp_repne,
  5033. /* 0xf3 */ x86emuOp_repe,
  5034. /* 0xf4 */ x86emuOp_halt,
  5035. /* 0xf5 */ x86emuOp_cmc,
  5036. /* 0xf6 */ x86emuOp_opcF6_byte_RM,
  5037. /* 0xf7 */ x86emuOp_opcF7_word_RM,
  5038. /* 0xf8 */ x86emuOp_clc,
  5039. /* 0xf9 */ x86emuOp_stc,
  5040. /* 0xfa */ x86emuOp_cli,
  5041. /* 0xfb */ x86emuOp_sti,
  5042. /* 0xfc */ x86emuOp_cld,
  5043. /* 0xfd */ x86emuOp_std,
  5044. /* 0xfe */ x86emuOp_opcFE_byte_RM,
  5045. /* 0xff */ x86emuOp_opcFF_word_RM,
  5046. };