bios.c 12 KB

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  1. /****************************************************************************
  2. *
  3. * BIOS emulator and interface
  4. * to Realmode X86 Emulator Library
  5. *
  6. * Copyright (C) 2007 Freescale Semiconductor, Inc.
  7. * Jason Jin <Jason.jin@freescale.com>
  8. *
  9. * Copyright (C) 1996-1999 SciTech Software, Inc.
  10. *
  11. * ========================================================================
  12. *
  13. * Permission to use, copy, modify, distribute, and sell this software and
  14. * its documentation for any purpose is hereby granted without fee,
  15. * provided that the above copyright notice appear in all copies and that
  16. * both that copyright notice and this permission notice appear in
  17. * supporting documentation, and that the name of the authors not be used
  18. * in advertising or publicity pertaining to distribution of the software
  19. * without specific, written prior permission. The authors makes no
  20. * representations about the suitability of this software for any purpose.
  21. * It is provided "as is" without express or implied warranty.
  22. *
  23. * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  24. * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  25. * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  26. * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
  27. * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
  28. * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  29. * PERFORMANCE OF THIS SOFTWARE.
  30. *
  31. * ========================================================================
  32. *
  33. * Language: ANSI C
  34. * Environment: Any
  35. * Developer: Kendall Bennett
  36. *
  37. * Description: Module implementing the BIOS specific functions.
  38. *
  39. * Jason ported this file to u-boot to run the ATI video card
  40. * video BIOS.
  41. *
  42. ****************************************************************************/
  43. #define __io
  44. #include <common.h>
  45. #include <asm/io.h>
  46. #include "biosemui.h"
  47. /*----------------------------- Implementation ----------------------------*/
  48. /****************************************************************************
  49. PARAMETERS:
  50. intno - Interrupt number being serviced
  51. REMARKS:
  52. Handler for undefined interrupts.
  53. ****************************************************************************/
  54. static void X86API undefined_intr(int intno)
  55. {
  56. if (BE_rdw(intno * 4 + 2) == BIOS_SEG) {
  57. DB(printf("biosEmu: undefined interrupt %xh called!\n", intno);)
  58. } else
  59. X86EMU_prepareForInt(intno);
  60. }
  61. /****************************************************************************
  62. PARAMETERS:
  63. intno - Interrupt number being serviced
  64. REMARKS:
  65. This function handles the default system BIOS Int 10h (the default is stored
  66. in the Int 42h vector by the system BIOS at bootup). We only need to handle
  67. a small number of special functions used by the BIOS during POST time.
  68. ****************************************************************************/
  69. static void X86API int42(int intno)
  70. {
  71. if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) {
  72. if (M.x86.R_AL == 0) {
  73. /* Enable CPU accesses to video memory */
  74. PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8) 0x02);
  75. return;
  76. } else if (M.x86.R_AL == 1) {
  77. /* Disable CPU accesses to video memory */
  78. PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8) ~ 0x02);
  79. return;
  80. }
  81. #ifdef CONFIG_X86EMU_DEBUG
  82. else {
  83. printf("int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",
  84. M.x86.R_AL);
  85. }
  86. #endif
  87. }
  88. #ifdef CONFIG_X86EMU_DEBUG
  89. else {
  90. printf("int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",
  91. M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
  92. }
  93. #endif
  94. }
  95. /****************************************************************************
  96. PARAMETERS:
  97. intno - Interrupt number being serviced
  98. REMARKS:
  99. This function handles the default system BIOS Int 10h. If the POST code
  100. has not yet re-vectored the Int 10h BIOS interrupt vector, we handle this
  101. by simply calling the int42 interrupt handler above. Very early in the
  102. BIOS POST process, the vector gets replaced and we simply let the real
  103. mode interrupt handler process the interrupt.
  104. ****************************************************************************/
  105. static void X86API int10(int intno)
  106. {
  107. if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
  108. int42(intno);
  109. else
  110. X86EMU_prepareForInt(intno);
  111. }
  112. /* Result codes returned by the PCI BIOS */
  113. #define SUCCESSFUL 0x00
  114. #define FUNC_NOT_SUPPORT 0x81
  115. #define BAD_VENDOR_ID 0x83
  116. #define DEVICE_NOT_FOUND 0x86
  117. #define BAD_REGISTER_NUMBER 0x87
  118. #define SET_FAILED 0x88
  119. #define BUFFER_TOO_SMALL 0x89
  120. /****************************************************************************
  121. PARAMETERS:
  122. intno - Interrupt number being serviced
  123. REMARKS:
  124. This function handles the default Int 1Ah interrupt handler for the real
  125. mode code, which provides support for the PCI BIOS functions. Since we only
  126. want to allow the real mode BIOS code *only* see the PCI config space for
  127. its own device, we only return information for the specific PCI config
  128. space that we have passed in to the init function. This solves problems
  129. when using the BIOS to warm boot a secondary adapter when there is an
  130. identical adapter before it on the bus (some BIOS'es get confused in this
  131. case).
  132. ****************************************************************************/
  133. static void X86API int1A(int unused)
  134. {
  135. u16 pciSlot;
  136. #ifdef __KERNEL__
  137. u8 interface, subclass, baseclass;
  138. /* Initialise the PCI slot number */
  139. pciSlot = ((int)_BE_env.vgaInfo.bus << 8) |
  140. ((int)_BE_env.vgaInfo.device << 3) | (int)_BE_env.vgaInfo.function;
  141. #else
  142. /* Fail if no PCI device information has been registered */
  143. if (!_BE_env.vgaInfo.pciInfo)
  144. return;
  145. pciSlot = (u16) (_BE_env.vgaInfo.pciInfo->slot.i >> 8);
  146. #endif
  147. switch (M.x86.R_AX) {
  148. case 0xB101: /* PCI bios present? */
  149. M.x86.R_AL = 0x00; /* no config space/special cycle generation support */
  150. M.x86.R_EDX = 0x20494350; /* " ICP" */
  151. M.x86.R_BX = 0x0210; /* Version 2.10 */
  152. M.x86.R_CL = 0; /* Max bus number in system */
  153. CLEAR_FLAG(F_CF);
  154. break;
  155. case 0xB102: /* Find PCI device */
  156. M.x86.R_AH = DEVICE_NOT_FOUND;
  157. #ifdef __KERNEL__
  158. if (M.x86.R_DX == _BE_env.vgaInfo.VendorID &&
  159. M.x86.R_CX == _BE_env.vgaInfo.DeviceID && M.x86.R_SI == 0) {
  160. #else
  161. if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
  162. M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
  163. M.x86.R_SI == 0) {
  164. #endif
  165. M.x86.R_AH = SUCCESSFUL;
  166. M.x86.R_BX = pciSlot;
  167. }
  168. CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
  169. break;
  170. case 0xB103: /* Find PCI class code */
  171. M.x86.R_AH = DEVICE_NOT_FOUND;
  172. #ifdef __KERNEL__
  173. #ifdef CONFIG_DM_PCI
  174. dm_pci_read_config8(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG,
  175. &interface);
  176. dm_pci_read_config8(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE,
  177. &subclass);
  178. dm_pci_read_config8(_BE_env.vgaInfo.pcidev,
  179. PCI_CLASS_DEVICE + 1, &baseclass);
  180. #else
  181. pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG,
  182. &interface);
  183. pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE,
  184. &subclass);
  185. pci_read_config_byte(_BE_env.vgaInfo.pcidev,
  186. PCI_CLASS_DEVICE + 1, &baseclass);
  187. #endif
  188. if (M.x86.R_CL == interface && M.x86.R_CH == subclass
  189. && (u8) (M.x86.R_ECX >> 16) == baseclass) {
  190. #else
  191. if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
  192. M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
  193. (u8) (M.x86.R_ECX >> 16) ==
  194. _BE_env.vgaInfo.pciInfo->BaseClass) {
  195. #endif
  196. M.x86.R_AH = SUCCESSFUL;
  197. M.x86.R_BX = pciSlot;
  198. }
  199. CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
  200. break;
  201. case 0xB108: /* Read configuration byte */
  202. M.x86.R_AH = BAD_REGISTER_NUMBER;
  203. if (M.x86.R_BX == pciSlot) {
  204. M.x86.R_AH = SUCCESSFUL;
  205. #ifdef __KERNEL__
  206. # ifdef CONFIG_DM_PCI
  207. dm_pci_read_config8(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
  208. &M.x86.R_CL);
  209. # else
  210. pci_read_config_byte(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
  211. &M.x86.R_CL);
  212. # endif
  213. #else
  214. M.x86.R_CL =
  215. (u8) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_BYTE,
  216. _BE_env.vgaInfo.pciInfo);
  217. #endif
  218. }
  219. CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
  220. break;
  221. case 0xB109: /* Read configuration word */
  222. M.x86.R_AH = BAD_REGISTER_NUMBER;
  223. if (M.x86.R_BX == pciSlot) {
  224. M.x86.R_AH = SUCCESSFUL;
  225. #ifdef __KERNEL__
  226. # ifdef CONFIG_DM_PCI
  227. dm_pci_read_config16(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
  228. &M.x86.R_CX);
  229. # else
  230. pci_read_config_word(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
  231. &M.x86.R_CX);
  232. # endif
  233. #else
  234. M.x86.R_CX =
  235. (u16) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_WORD,
  236. _BE_env.vgaInfo.pciInfo);
  237. #endif
  238. }
  239. CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
  240. break;
  241. case 0xB10A: /* Read configuration dword */
  242. M.x86.R_AH = BAD_REGISTER_NUMBER;
  243. if (M.x86.R_BX == pciSlot) {
  244. M.x86.R_AH = SUCCESSFUL;
  245. #ifdef __KERNEL__
  246. # ifdef CONFIG_DM_PCI
  247. dm_pci_read_config32(_BE_env.vgaInfo.pcidev,
  248. M.x86.R_DI, &M.x86.R_ECX);
  249. # else
  250. pci_read_config_dword(_BE_env.vgaInfo.pcidev,
  251. M.x86.R_DI, &M.x86.R_ECX);
  252. # endif
  253. #else
  254. M.x86.R_ECX =
  255. (u32) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_DWORD,
  256. _BE_env.vgaInfo.pciInfo);
  257. #endif
  258. }
  259. CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
  260. break;
  261. case 0xB10B: /* Write configuration byte */
  262. M.x86.R_AH = BAD_REGISTER_NUMBER;
  263. if (M.x86.R_BX == pciSlot) {
  264. M.x86.R_AH = SUCCESSFUL;
  265. #ifdef __KERNEL__
  266. # ifdef CONFIG_DM_PCI
  267. dm_pci_write_config8(_BE_env.vgaInfo.pcidev,
  268. M.x86.R_DI, M.x86.R_CL);
  269. # else
  270. pci_write_config_byte(_BE_env.vgaInfo.pcidev,
  271. M.x86.R_DI, M.x86.R_CL);
  272. # endif
  273. #else
  274. PCI_accessReg(M.x86.R_DI, M.x86.R_CL, PCI_WRITE_BYTE,
  275. _BE_env.vgaInfo.pciInfo);
  276. #endif
  277. }
  278. CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
  279. break;
  280. case 0xB10C: /* Write configuration word */
  281. M.x86.R_AH = BAD_REGISTER_NUMBER;
  282. if (M.x86.R_BX == pciSlot) {
  283. M.x86.R_AH = SUCCESSFUL;
  284. #ifdef __KERNEL__
  285. # ifdef CONFIG_DM_PCI
  286. dm_pci_write_config32(_BE_env.vgaInfo.pcidev,
  287. M.x86.R_DI, M.x86.R_CX);
  288. # else
  289. pci_write_config_word(_BE_env.vgaInfo.pcidev,
  290. M.x86.R_DI, M.x86.R_CX);
  291. # endif
  292. #else
  293. PCI_accessReg(M.x86.R_DI, M.x86.R_CX, PCI_WRITE_WORD,
  294. _BE_env.vgaInfo.pciInfo);
  295. #endif
  296. }
  297. CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
  298. break;
  299. case 0xB10D: /* Write configuration dword */
  300. M.x86.R_AH = BAD_REGISTER_NUMBER;
  301. if (M.x86.R_BX == pciSlot) {
  302. M.x86.R_AH = SUCCESSFUL;
  303. #ifdef __KERNEL__
  304. # ifdef CONFIG_DM_PCI
  305. dm_pci_write_config32(_BE_env.vgaInfo.pcidev,
  306. M.x86.R_DI, M.x86.R_ECX);
  307. # else
  308. pci_write_config_dword(_BE_env.vgaInfo.pcidev,
  309. M.x86.R_DI, M.x86.R_ECX);
  310. # endif
  311. #else
  312. PCI_accessReg(M.x86.R_DI, M.x86.R_ECX, PCI_WRITE_DWORD,
  313. _BE_env.vgaInfo.pciInfo);
  314. #endif
  315. }
  316. CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
  317. break;
  318. default:
  319. printf("biosEmu/bios.int1a: unknown function AX=%#04x\n",
  320. M.x86.R_AX);
  321. }
  322. }
  323. /****************************************************************************
  324. REMARKS:
  325. This function initialises the BIOS emulation functions for the specific
  326. PCI display device. We insulate the real mode BIOS from any other devices
  327. on the bus, so that it will work correctly thinking that it is the only
  328. device present on the bus (ie: avoiding any adapters present in from of
  329. the device we are trying to control).
  330. ****************************************************************************/
  331. #define BE_constLE_32(v) ((((((v)&0xff00)>>8)|(((v)&0xff)<<8))<<16)|(((((v)&0xff000000)>>8)|(((v)&0x00ff0000)<<8))>>16))
  332. void _BE_bios_init(u32 * intrTab)
  333. {
  334. int i;
  335. X86EMU_intrFuncs bios_intr_tab[256];
  336. for (i = 0; i < 256; ++i) {
  337. intrTab[i] = BE_constLE_32(BIOS_SEG << 16);
  338. bios_intr_tab[i] = undefined_intr;
  339. }
  340. bios_intr_tab[0x10] = int10;
  341. bios_intr_tab[0x1A] = int1A;
  342. bios_intr_tab[0x42] = int42;
  343. bios_intr_tab[0x6D] = int10;
  344. X86EMU_setupIntrFuncs(bios_intr_tab);
  345. }