besys.c 22 KB

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  1. /****************************************************************************
  2. *
  3. * BIOS emulator and interface
  4. * to Realmode X86 Emulator Library
  5. *
  6. * ========================================================================
  7. *
  8. * Copyright (C) 2007 Freescale Semiconductor, Inc.
  9. * Jason Jin<Jason.jin@freescale.com>
  10. *
  11. * Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
  12. *
  13. * This file may be distributed and/or modified under the terms of the
  14. * GNU General Public License version 2.0 as published by the Free
  15. * Software Foundation and appearing in the file LICENSE.GPL included
  16. * in the packaging of this file.
  17. *
  18. * Licensees holding a valid Commercial License for this product from
  19. * SciTech Software, Inc. may use this file in accordance with the
  20. * Commercial License Agreement provided with the Software.
  21. *
  22. * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
  23. * THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  24. * PURPOSE.
  25. *
  26. * See http://www.scitechsoft.com/license/ for information about
  27. * the licensing options available and how to purchase a Commercial
  28. * License Agreement.
  29. *
  30. * Contact license@scitechsoft.com if any conditions of this licensing
  31. * are not clear to you, or you have questions about licensing options.
  32. *
  33. * ========================================================================
  34. *
  35. * Language: ANSI C
  36. * Environment: Any
  37. * Developer: Kendall Bennett
  38. *
  39. * Description: This file includes BIOS emulator I/O and memory access
  40. * functions.
  41. *
  42. * Jason ported this file to u-boot to run the ATI video card
  43. * BIOS in u-boot. Removed some emulate functions such as the
  44. * timer port access. Made all the VGA port except reading 0x3c3
  45. * be emulated. Seems like reading 0x3c3 should return the high
  46. * 16 bit of the io port.
  47. *
  48. ****************************************************************************/
  49. #define __io
  50. #include <common.h>
  51. #include <asm/io.h>
  52. #include "biosemui.h"
  53. /*------------------------- Global Variables ------------------------------*/
  54. #ifndef CONFIG_X86EMU_RAW_IO
  55. static char *BE_biosDate = "08/14/99";
  56. static u8 BE_model = 0xFC;
  57. static u8 BE_submodel = 0x00;
  58. #endif
  59. #undef DEBUG_IO_ACCESS
  60. #ifdef DEBUG_IO_ACCESS
  61. #define debug_io(fmt, ...) printf(fmt, ##__VA_ARGS__)
  62. #else
  63. #define debug_io(x, b...)
  64. #endif
  65. /*----------------------------- Implementation ----------------------------*/
  66. /****************************************************************************
  67. PARAMETERS:
  68. addr - Emulator memory address to convert
  69. RETURNS:
  70. Actual memory address to read or write the data
  71. REMARKS:
  72. This function converts an emulator memory address in a 32-bit range to
  73. a real memory address that we wish to access. It handles splitting up the
  74. memory address space appropriately to access the emulator BIOS image, video
  75. memory and system BIOS etc.
  76. ****************************************************************************/
  77. static u8 *BE_memaddr(u32 addr)
  78. {
  79. if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
  80. return (u8*)(_BE_env.biosmem_base + addr - 0xC0000);
  81. } else if (addr > _BE_env.biosmem_limit && addr < 0xD0000) {
  82. DB(printf("BE_memaddr: address %#lx may be invalid!\n",
  83. (ulong)addr);)
  84. return (u8 *)M.mem_base;
  85. } else if (addr >= 0xA0000 && addr <= 0xBFFFF) {
  86. return (u8*)(_BE_env.busmem_base + addr - 0xA0000);
  87. }
  88. #ifdef CONFIG_X86EMU_RAW_IO
  89. else if (addr >= 0xD0000 && addr <= 0xFFFFF) {
  90. /* We map the real System BIOS directly on real PC's */
  91. DB(printf("BE_memaddr: System BIOS address %#lx\n",
  92. (ulong)addr);)
  93. return (u8 *)_BE_env.busmem_base + addr - 0xA0000;
  94. }
  95. #else
  96. else if (addr >= 0xFFFF5 && addr < 0xFFFFE) {
  97. /* Return a faked BIOS date string for non-x86 machines */
  98. debug_io("BE_memaddr - Returning BIOS date\n");
  99. return (u8 *)(BE_biosDate + addr - 0xFFFF5);
  100. } else if (addr == 0xFFFFE) {
  101. /* Return system model identifier for non-x86 machines */
  102. debug_io("BE_memaddr - Returning model\n");
  103. return &BE_model;
  104. } else if (addr == 0xFFFFF) {
  105. /* Return system submodel identifier for non-x86 machines */
  106. debug_io("BE_memaddr - Returning submodel\n");
  107. return &BE_submodel;
  108. }
  109. #endif
  110. else if (addr > M.mem_size - 1) {
  111. HALT_SYS();
  112. return (u8 *)M.mem_base;
  113. }
  114. return (u8 *)(M.mem_base + addr);
  115. }
  116. /****************************************************************************
  117. PARAMETERS:
  118. addr - Emulator memory address to read
  119. RETURNS:
  120. Byte value read from emulator memory.
  121. REMARKS:
  122. Reads a byte value from the emulator memory. We have three distinct memory
  123. regions that are handled differently, which this function handles.
  124. ****************************************************************************/
  125. u8 X86API BE_rdb(u32 addr)
  126. {
  127. if (_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)
  128. return 0;
  129. else {
  130. u8 val = readb_le(BE_memaddr(addr));
  131. return val;
  132. }
  133. }
  134. /****************************************************************************
  135. PARAMETERS:
  136. addr - Emulator memory address to read
  137. RETURNS:
  138. Word value read from emulator memory.
  139. REMARKS:
  140. Reads a word value from the emulator memory. We have three distinct memory
  141. regions that are handled differently, which this function handles.
  142. ****************************************************************************/
  143. u16 X86API BE_rdw(u32 addr)
  144. {
  145. if (_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)
  146. return 0;
  147. else {
  148. u8 *base = BE_memaddr(addr);
  149. u16 val = readw_le(base);
  150. return val;
  151. }
  152. }
  153. /****************************************************************************
  154. PARAMETERS:
  155. addr - Emulator memory address to read
  156. RETURNS:
  157. Long value read from emulator memory.
  158. REMARKS:
  159. Reads a 32-bit value from the emulator memory. We have three distinct memory
  160. regions that are handled differently, which this function handles.
  161. ****************************************************************************/
  162. u32 X86API BE_rdl(u32 addr)
  163. {
  164. if (_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)
  165. return 0;
  166. else {
  167. u8 *base = BE_memaddr(addr);
  168. u32 val = readl_le(base);
  169. return val;
  170. }
  171. }
  172. /****************************************************************************
  173. PARAMETERS:
  174. addr - Emulator memory address to read
  175. val - Value to store
  176. REMARKS:
  177. Writes a byte value to emulator memory. We have three distinct memory
  178. regions that are handled differently, which this function handles.
  179. ****************************************************************************/
  180. void X86API BE_wrb(u32 addr, u8 val)
  181. {
  182. if (!(_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)) {
  183. writeb_le(BE_memaddr(addr), val);
  184. }
  185. }
  186. /****************************************************************************
  187. PARAMETERS:
  188. addr - Emulator memory address to read
  189. val - Value to store
  190. REMARKS:
  191. Writes a word value to emulator memory. We have three distinct memory
  192. regions that are handled differently, which this function handles.
  193. ****************************************************************************/
  194. void X86API BE_wrw(u32 addr, u16 val)
  195. {
  196. if (!(_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)) {
  197. u8 *base = BE_memaddr(addr);
  198. writew_le(base, val);
  199. }
  200. }
  201. /****************************************************************************
  202. PARAMETERS:
  203. addr - Emulator memory address to read
  204. val - Value to store
  205. REMARKS:
  206. Writes a 32-bit value to emulator memory. We have three distinct memory
  207. regions that are handled differently, which this function handles.
  208. ****************************************************************************/
  209. void X86API BE_wrl(u32 addr, u32 val)
  210. {
  211. if (!(_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)) {
  212. u8 *base = BE_memaddr(addr);
  213. writel_le(base, val);
  214. }
  215. }
  216. #if !defined(CONFIG_X86EMU_RAW_IO)
  217. /* For Non-Intel machines we may need to emulate some I/O port accesses that
  218. * the BIOS may try to access, such as the PCI config registers.
  219. */
  220. #define IS_TIMER_PORT(port) (0x40 <= port && port <= 0x43)
  221. #define IS_CMOS_PORT(port) (0x70 <= port && port <= 0x71)
  222. /*#define IS_VGA_PORT(port) (_BE_env.emulateVGA && 0x3C0 <= port && port <= 0x3DA)*/
  223. #define IS_VGA_PORT(port) (0x3C0 <= port && port <= 0x3DA)
  224. #define IS_PCI_PORT(port) (0xCF8 <= port && port <= 0xCFF)
  225. #define IS_SPKR_PORT(port) (port == 0x61)
  226. /****************************************************************************
  227. PARAMETERS:
  228. port - Port to read from
  229. type - Type of access to perform
  230. REMARKS:
  231. Performs an emulated read from the Standard VGA I/O ports. If the target
  232. hardware does not support mapping the VGA I/O and memory (such as some
  233. PowerPC systems), we emulate the VGA so that the BIOS will still be able to
  234. set NonVGA display modes such as on ATI hardware.
  235. ****************************************************************************/
  236. static u8 VGA_inpb (const int port)
  237. {
  238. u8 val = 0xff;
  239. debug_io("vga_inb.%04X -> ", (u16) port);
  240. switch (port) {
  241. case 0x3C0:
  242. /* 3C0 has funky characteristics because it can act as either
  243. a data register or index register depending on the state
  244. of an internal flip flop in the hardware. Hence we have
  245. to emulate that functionality in here. */
  246. if (_BE_env.flipFlop3C0 == 0) {
  247. /* Access 3C0 as index register */
  248. val = _BE_env.emu3C0;
  249. } else {
  250. /* Access 3C0 as data register */
  251. if (_BE_env.emu3C0 < ATT_C)
  252. val = _BE_env.emu3C1[_BE_env.emu3C0];
  253. }
  254. _BE_env.flipFlop3C0 ^= 1;
  255. break;
  256. case 0x3C1:
  257. if (_BE_env.emu3C0 < ATT_C)
  258. return _BE_env.emu3C1[_BE_env.emu3C0];
  259. break;
  260. case 0x3CC:
  261. return _BE_env.emu3C2;
  262. case 0x3C4:
  263. return _BE_env.emu3C4;
  264. case 0x3C5:
  265. if (_BE_env.emu3C4 < ATT_C)
  266. return _BE_env.emu3C5[_BE_env.emu3C4];
  267. break;
  268. case 0x3C6:
  269. return _BE_env.emu3C6;
  270. case 0x3C7:
  271. return _BE_env.emu3C7;
  272. case 0x3C8:
  273. return _BE_env.emu3C8;
  274. case 0x3C9:
  275. if (_BE_env.emu3C7 < PAL_C)
  276. return _BE_env.emu3C9[_BE_env.emu3C7++];
  277. break;
  278. case 0x3CE:
  279. return _BE_env.emu3CE;
  280. case 0x3CF:
  281. if (_BE_env.emu3CE < GRA_C)
  282. return _BE_env.emu3CF[_BE_env.emu3CE];
  283. break;
  284. case 0x3D4:
  285. if (_BE_env.emu3C2 & 0x1)
  286. return _BE_env.emu3D4;
  287. break;
  288. case 0x3D5:
  289. if ((_BE_env.emu3C2 & 0x1) && (_BE_env.emu3D4 < CRT_C))
  290. return _BE_env.emu3D5[_BE_env.emu3D4];
  291. break;
  292. case 0x3DA:
  293. _BE_env.flipFlop3C0 = 0;
  294. val = _BE_env.emu3DA;
  295. _BE_env.emu3DA ^= 0x9;
  296. break;
  297. }
  298. return val;
  299. }
  300. /****************************************************************************
  301. PARAMETERS:
  302. port - Port to write to
  303. type - Type of access to perform
  304. REMARKS:
  305. Performs an emulated write to one of the 8253 timer registers. For now
  306. we only emulate timer 0 which is the only timer that the BIOS code appears
  307. to use.
  308. ****************************************************************************/
  309. static void VGA_outpb (int port, u8 val)
  310. {
  311. switch (port) {
  312. case 0x3C0:
  313. /* 3C0 has funky characteristics because it can act as either
  314. a data register or index register depending on the state
  315. of an internal flip flop in the hardware. Hence we have
  316. to emulate that functionality in here. */
  317. if (_BE_env.flipFlop3C0 == 0) {
  318. /* Access 3C0 as index register */
  319. _BE_env.emu3C0 = val;
  320. } else {
  321. /* Access 3C0 as data register */
  322. if (_BE_env.emu3C0 < ATT_C)
  323. _BE_env.emu3C1[_BE_env.emu3C0] = val;
  324. }
  325. _BE_env.flipFlop3C0 ^= 1;
  326. break;
  327. case 0x3C2:
  328. _BE_env.emu3C2 = val;
  329. break;
  330. case 0x3C4:
  331. _BE_env.emu3C4 = val;
  332. break;
  333. case 0x3C5:
  334. if (_BE_env.emu3C4 < ATT_C)
  335. _BE_env.emu3C5[_BE_env.emu3C4] = val;
  336. break;
  337. case 0x3C6:
  338. _BE_env.emu3C6 = val;
  339. break;
  340. case 0x3C7:
  341. _BE_env.emu3C7 = (int) val *3;
  342. break;
  343. case 0x3C8:
  344. _BE_env.emu3C8 = (int) val *3;
  345. break;
  346. case 0x3C9:
  347. if (_BE_env.emu3C8 < PAL_C)
  348. _BE_env.emu3C9[_BE_env.emu3C8++] = val;
  349. break;
  350. case 0x3CE:
  351. _BE_env.emu3CE = val;
  352. break;
  353. case 0x3CF:
  354. if (_BE_env.emu3CE < GRA_C)
  355. _BE_env.emu3CF[_BE_env.emu3CE] = val;
  356. break;
  357. case 0x3D4:
  358. if (_BE_env.emu3C2 & 0x1)
  359. _BE_env.emu3D4 = val;
  360. break;
  361. case 0x3D5:
  362. if ((_BE_env.emu3C2 & 0x1) && (_BE_env.emu3D4 < CRT_C))
  363. _BE_env.emu3D5[_BE_env.emu3D4] = val;
  364. break;
  365. }
  366. }
  367. /****************************************************************************
  368. PARAMETERS:
  369. regOffset - Offset into register space for non-DWORD accesses
  370. value - Value to write to register for PCI_WRITE_* operations
  371. func - Function to perform (PCIAccessRegFlags)
  372. RETURNS:
  373. Value read from configuration register for PCI_READ_* operations
  374. REMARKS:
  375. Accesses a PCI configuration space register by decoding the value currently
  376. stored in the _BE_env.configAddress variable and passing it through to the
  377. portable PCI_accessReg function.
  378. ****************************************************************************/
  379. static u32 BE_accessReg(int regOffset, u32 value, int func)
  380. {
  381. #ifdef __KERNEL__
  382. int function, device, bus;
  383. u8 val8;
  384. u16 val16;
  385. u32 val32;
  386. /* Decode the configuration register values for the register we wish to
  387. * access
  388. */
  389. regOffset += (_BE_env.configAddress & 0xFF);
  390. function = (_BE_env.configAddress >> 8) & 0x7;
  391. device = (_BE_env.configAddress >> 11) & 0x1F;
  392. bus = (_BE_env.configAddress >> 16) & 0xFF;
  393. /* Ignore accesses to all devices other than the one we're POSTing */
  394. if ((function == _BE_env.vgaInfo.function) &&
  395. (device == _BE_env.vgaInfo.device) &&
  396. (bus == _BE_env.vgaInfo.bus)) {
  397. switch (func) {
  398. case REG_READ_BYTE:
  399. pci_read_config_byte(_BE_env.vgaInfo.pcidev, regOffset,
  400. &val8);
  401. return val8;
  402. case REG_READ_WORD:
  403. pci_read_config_word(_BE_env.vgaInfo.pcidev, regOffset,
  404. &val16);
  405. return val16;
  406. case REG_READ_DWORD:
  407. pci_read_config_dword(_BE_env.vgaInfo.pcidev, regOffset,
  408. &val32);
  409. return val32;
  410. case REG_WRITE_BYTE:
  411. pci_write_config_byte(_BE_env.vgaInfo.pcidev, regOffset,
  412. value);
  413. return 0;
  414. case REG_WRITE_WORD:
  415. pci_write_config_word(_BE_env.vgaInfo.pcidev, regOffset,
  416. value);
  417. return 0;
  418. case REG_WRITE_DWORD:
  419. pci_write_config_dword(_BE_env.vgaInfo.pcidev,
  420. regOffset, value);
  421. return 0;
  422. }
  423. }
  424. return 0;
  425. #else
  426. PCIDeviceInfo pciInfo;
  427. pciInfo.mech1 = 1;
  428. pciInfo.slot.i = 0;
  429. pciInfo.slot.p.Function = (_BE_env.configAddress >> 8) & 0x7;
  430. pciInfo.slot.p.Device = (_BE_env.configAddress >> 11) & 0x1F;
  431. pciInfo.slot.p.Bus = (_BE_env.configAddress >> 16) & 0xFF;
  432. pciInfo.slot.p.Enable = 1;
  433. /* Ignore accesses to all devices other than the one we're POSTing */
  434. if ((pciInfo.slot.p.Function ==
  435. _BE_env.vgaInfo.pciInfo->slot.p.Function)
  436. && (pciInfo.slot.p.Device == _BE_env.vgaInfo.pciInfo->slot.p.Device)
  437. && (pciInfo.slot.p.Bus == _BE_env.vgaInfo.pciInfo->slot.p.Bus))
  438. return PCI_accessReg((_BE_env.configAddress & 0xFF) + regOffset,
  439. value, func, &pciInfo);
  440. return 0;
  441. #endif
  442. }
  443. /****************************************************************************
  444. PARAMETERS:
  445. port - Port to read from
  446. type - Type of access to perform
  447. REMARKS:
  448. Performs an emulated read from one of the PCI configuration space registers.
  449. We emulate this using our PCI_accessReg function which will access the PCI
  450. configuration space registers in a portable fashion.
  451. ****************************************************************************/
  452. static u32 PCI_inp(int port, int type)
  453. {
  454. switch (type) {
  455. case REG_READ_BYTE:
  456. if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
  457. && port <= 0xCFF)
  458. return BE_accessReg(port - 0xCFC, 0, REG_READ_BYTE);
  459. break;
  460. case REG_READ_WORD:
  461. if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
  462. && port <= 0xCFF)
  463. return BE_accessReg(port - 0xCFC, 0, REG_READ_WORD);
  464. break;
  465. case REG_READ_DWORD:
  466. if (port == 0xCF8)
  467. return _BE_env.configAddress;
  468. else if ((_BE_env.configAddress & 0x80000000) && port == 0xCFC)
  469. return BE_accessReg(0, 0, REG_READ_DWORD);
  470. break;
  471. }
  472. return 0;
  473. }
  474. /****************************************************************************
  475. PARAMETERS:
  476. port - Port to write to
  477. type - Type of access to perform
  478. REMARKS:
  479. Performs an emulated write to one of the PCI control registers.
  480. ****************************************************************************/
  481. static void PCI_outp(int port, u32 val, int type)
  482. {
  483. switch (type) {
  484. case REG_WRITE_BYTE:
  485. if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
  486. && port <= 0xCFF)
  487. BE_accessReg(port - 0xCFC, val, REG_WRITE_BYTE);
  488. break;
  489. case REG_WRITE_WORD:
  490. if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
  491. && port <= 0xCFF)
  492. BE_accessReg(port - 0xCFC, val, REG_WRITE_WORD);
  493. break;
  494. case REG_WRITE_DWORD:
  495. if (port == 0xCF8)
  496. {
  497. _BE_env.configAddress = val & 0x80FFFFFC;
  498. }
  499. else if ((_BE_env.configAddress & 0x80000000) && port == 0xCFC)
  500. BE_accessReg(0, val, REG_WRITE_DWORD);
  501. break;
  502. }
  503. }
  504. #endif
  505. /****************************************************************************
  506. PARAMETERS:
  507. port - Port to write to
  508. RETURNS:
  509. Value read from the I/O port
  510. REMARKS:
  511. Performs an emulated 8-bit read from an I/O port. We handle special cases
  512. that we need to emulate in here, and fall through to reflecting the write
  513. through to the real hardware if we don't need to special case it.
  514. ****************************************************************************/
  515. u8 X86API BE_inb(X86EMU_pioAddr port)
  516. {
  517. u8 val = 0;
  518. #if !defined(CONFIG_X86EMU_RAW_IO)
  519. if (IS_VGA_PORT(port)){
  520. /*seems reading port 0x3c3 return the high 16 bit of io port*/
  521. if(port == 0x3c3)
  522. val = LOG_inpb(port);
  523. else
  524. val = VGA_inpb(port);
  525. }
  526. else if (IS_TIMER_PORT(port))
  527. DB(printf("Can not interept TIMER port now!\n");)
  528. else if (IS_SPKR_PORT(port))
  529. DB(printf("Can not interept SPEAKER port now!\n");)
  530. else if (IS_CMOS_PORT(port))
  531. DB(printf("Can not interept CMOS port now!\n");)
  532. else if (IS_PCI_PORT(port))
  533. val = PCI_inp(port, REG_READ_BYTE);
  534. else if (port < 0x100) {
  535. DB(printf("WARN: INVALID inb.%04X -> %02X\n", (u16) port, val);)
  536. val = LOG_inpb(port);
  537. } else
  538. #endif
  539. {
  540. debug_io("inb.%04X -> ", (u16) port);
  541. val = LOG_inpb(port);
  542. debug_io("%02X\n", val);
  543. }
  544. return val;
  545. }
  546. /****************************************************************************
  547. PARAMETERS:
  548. port - Port to write to
  549. RETURNS:
  550. Value read from the I/O port
  551. REMARKS:
  552. Performs an emulated 16-bit read from an I/O port. We handle special cases
  553. that we need to emulate in here, and fall through to reflecting the write
  554. through to the real hardware if we don't need to special case it.
  555. ****************************************************************************/
  556. u16 X86API BE_inw(X86EMU_pioAddr port)
  557. {
  558. u16 val = 0;
  559. #if !defined(CONFIG_X86EMU_RAW_IO)
  560. if (IS_PCI_PORT(port))
  561. val = PCI_inp(port, REG_READ_WORD);
  562. else if (port < 0x100) {
  563. DB(printf("WARN: Maybe INVALID inw.%04X -> %04X\n", (u16) port, val);)
  564. val = LOG_inpw(port);
  565. } else
  566. #endif
  567. {
  568. debug_io("inw.%04X -> ", (u16) port);
  569. val = LOG_inpw(port);
  570. debug_io("%04X\n", val);
  571. }
  572. return val;
  573. }
  574. /****************************************************************************
  575. PARAMETERS:
  576. port - Port to write to
  577. RETURNS:
  578. Value read from the I/O port
  579. REMARKS:
  580. Performs an emulated 32-bit read from an I/O port. We handle special cases
  581. that we need to emulate in here, and fall through to reflecting the write
  582. through to the real hardware if we don't need to special case it.
  583. ****************************************************************************/
  584. u32 X86API BE_inl(X86EMU_pioAddr port)
  585. {
  586. u32 val = 0;
  587. #if !defined(CONFIG_X86EMU_RAW_IO)
  588. if (IS_PCI_PORT(port))
  589. val = PCI_inp(port, REG_READ_DWORD);
  590. else if (port < 0x100) {
  591. val = LOG_inpd(port);
  592. } else
  593. #endif
  594. {
  595. debug_io("inl.%04X -> ", (u16) port);
  596. val = LOG_inpd(port);
  597. debug_io("%08X\n", val);
  598. }
  599. return val;
  600. }
  601. /****************************************************************************
  602. PARAMETERS:
  603. port - Port to write to
  604. val - Value to write to port
  605. REMARKS:
  606. Performs an emulated 8-bit write to an I/O port. We handle special cases
  607. that we need to emulate in here, and fall through to reflecting the write
  608. through to the real hardware if we don't need to special case it.
  609. ****************************************************************************/
  610. void X86API BE_outb(X86EMU_pioAddr port, u8 val)
  611. {
  612. #if !defined(CONFIG_X86EMU_RAW_IO)
  613. if (IS_VGA_PORT(port))
  614. VGA_outpb(port, val);
  615. else if (IS_TIMER_PORT(port))
  616. DB(printf("Can not interept TIMER port now!\n");)
  617. else if (IS_SPKR_PORT(port))
  618. DB(printf("Can not interept SPEAKER port now!\n");)
  619. else if (IS_CMOS_PORT(port))
  620. DB(printf("Can not interept CMOS port now!\n");)
  621. else if (IS_PCI_PORT(port))
  622. PCI_outp(port, val, REG_WRITE_BYTE);
  623. else if (port < 0x100) {
  624. DB(printf("WARN:Maybe INVALID outb.%04X <- %02X\n", (u16) port, val);)
  625. LOG_outpb(port, val);
  626. } else
  627. #endif
  628. {
  629. debug_io("outb.%04X <- %02X", (u16) port, val);
  630. LOG_outpb(port, val);
  631. debug_io("\n");
  632. }
  633. }
  634. /****************************************************************************
  635. PARAMETERS:
  636. port - Port to write to
  637. val - Value to write to port
  638. REMARKS:
  639. Performs an emulated 16-bit write to an I/O port. We handle special cases
  640. that we need to emulate in here, and fall through to reflecting the write
  641. through to the real hardware if we don't need to special case it.
  642. ****************************************************************************/
  643. void X86API BE_outw(X86EMU_pioAddr port, u16 val)
  644. {
  645. #if !defined(CONFIG_X86EMU_RAW_IO)
  646. if (IS_VGA_PORT(port)) {
  647. VGA_outpb(port, val);
  648. VGA_outpb(port + 1, val >> 8);
  649. } else if (IS_PCI_PORT(port)) {
  650. PCI_outp(port, val, REG_WRITE_WORD);
  651. } else if (port < 0x100) {
  652. DB(printf("WARN: MAybe INVALID outw.%04X <- %04X\n", (u16)port,
  653. val);)
  654. LOG_outpw(port, val);
  655. } else
  656. #endif
  657. {
  658. debug_io("outw.%04X <- %04X", (u16) port, val);
  659. LOG_outpw(port, val);
  660. debug_io("\n");
  661. }
  662. }
  663. /****************************************************************************
  664. PARAMETERS:
  665. port - Port to write to
  666. val - Value to write to port
  667. REMARKS:
  668. Performs an emulated 32-bit write to an I/O port. We handle special cases
  669. that we need to emulate in here, and fall through to reflecting the write
  670. through to the real hardware if we don't need to special case it.
  671. ****************************************************************************/
  672. void X86API BE_outl(X86EMU_pioAddr port, u32 val)
  673. {
  674. #if !defined(CONFIG_X86EMU_RAW_IO)
  675. if (IS_PCI_PORT(port)) {
  676. PCI_outp(port, val, REG_WRITE_DWORD);
  677. } else if (port < 0x100) {
  678. DB(printf("WARN: INVALID outl.%04X <- %08X\n", (u16) port,val);)
  679. LOG_outpd(port, val);
  680. } else
  681. #endif
  682. {
  683. debug_io("outl.%04X <- %08X", (u16) port, val);
  684. LOG_outpd(port, val);
  685. debug_io("\n");
  686. }
  687. }