mediatek,mtk-xhci.txt 1.4 KB

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  1. MediaTek xHCI
  2. The device node for USB3 host controller on MediaTek SoCs.
  3. Required properties:
  4. - compatible : should be "mediatek,mtk-xhci"
  5. - reg : specifies physical base address and size of the registers
  6. - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
  7. - power-domains : a phandle to USB power domain node to control USB's
  8. MTCMOS
  9. - vusb33-supply : regulator of USB avdd3.3v
  10. - clocks : a list of phandle + clock-specifier pairs, one for each
  11. entry in clock-names
  12. - clock-names : must contain
  13. "sys_ck": controller clock used by normal mode,
  14. the following ones are optional:
  15. "ref_ck": reference clock used by low power mode etc,
  16. "mcu_ck": mcu_bus clock for register access,
  17. "dma_ck": dma_bus clock for data transfer by DMA,
  18. "xhci_ck": controller clock
  19. - phys : list of all the USB PHYs on this HCD
  20. - phy-names: name specifier for the USB PHY
  21. Optional properties:
  22. - vbus-supply : reference to the VBUS regulator;
  23. Example:
  24. xhci: usb@1a0c0000 {
  25. compatible = "mediatek,mt7629-xhci", "mediatek,mtk-xhci";
  26. reg = <0x1a0c0000 0x1000>, <0x1a0c3e00 0x0100>;
  27. reg-names = "mac", "ippc";
  28. power-domains = <&scpsys MT7629_POWER_DOMAIN_HIF1>;
  29. clocks = <&ssusbsys CLK_SSUSB_SYS_EN>, <&ssusbsys CLK_SSUSB_REF_EN>,
  30. <&ssusbsys CLK_SSUSB_MCU_EN>, <&ssusbsys CLK_SSUSB_DMA_EN>;
  31. clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
  32. phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>;
  33. status = "disabled";
  34. };