spi-atcspi200.txt 1.1 KB

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  1. Andestech ATCSPI200 SPI controller Device Tree Bindings
  2. -------------------------------------------------------
  3. ATCSPI200 is a Serial Peripheral Interface (SPI) controller
  4. which serves as a SPI master or a SPI slave.
  5. It is often be embedded in AE3XX and AE250 platforms.
  6. Required properties:
  7. - compatible: has to be "andestech,atcspi200".
  8. - reg: Base address and size of the controllers memory area.
  9. - #address-cells: <1>, as required by generic SPI binding.
  10. - #size-cells: <0>, also as required by generic SPI binding.
  11. - interrupts: Property with a value describing the interrupt number.
  12. - clocks: Clock phandles (see clock bindings for details).
  13. - spi-max-frequency: Maximum SPI clocking speed of device in Hz.
  14. Optional properties:
  15. - num-cs: Number of chip selects used.
  16. Example:
  17. spi: spi@f0b00000 {
  18. compatible = "andestech,atcspi200";
  19. reg = <0xf0b00000 0x1000>;
  20. #address-cells = <1>;
  21. #size-cells = <0>;
  22. num-cs = <1>;
  23. clocks = <&spiclk>;
  24. interrupts = <3 4>;
  25. flash@0 {
  26. compatible = "jedec,spi-nor";
  27. spi-max-frequency = <50000000>;
  28. reg = <0>;
  29. spi-cpol;
  30. spi-cpha;
  31. };
  32. };