intel-lpc.txt 1.8 KB

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  1. Intel LPC Device Binding
  2. ========================
  3. The device tree node which describes the operation of the Intel Low Pin
  4. Count device is as follows:
  5. Required properties :
  6. - compatible = "intel,lpc"
  7. - intel,alt-gp-smi-enable : Enable SMI sources. This cell is written to the
  8. ALT_GP_SMI_EN register
  9. - intel,gen-dec : Specifies the values for the gen-dec registers. Up to four
  10. cell pairs can be provided - the first of each pair is the base address and
  11. the second is the size. These are written into the GENx_DEC registers of
  12. the LPC device
  13. - intel,gpi-routing : Specifies the GPI routing. There are 16 cells, valid
  14. values are:
  15. 0 No effect (default)
  16. 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
  17. 2 SCI (if corresponding GPIO_EN bit is also set)
  18. - intel,pirq-routing : Speciffies the routing IRQ number for each of PIRQA-H,
  19. one cell for each.
  20. 0x00 - 0000 = Reserved
  21. 0x01 - 0001 = Reserved
  22. 0x02 - 0010 = Reserved
  23. 0x03 - 0011 = IRQ3
  24. 0x04 - 0100 = IRQ4
  25. 0x05 - 0101 = IRQ5
  26. 0x06 - 0110 = IRQ6
  27. 0x07 - 0111 = IRQ7
  28. 0x08 - 1000 = Reserved
  29. 0x09 - 1001 = IRQ9
  30. 0x0A - 1010 = IRQ10
  31. 0x0B - 1011 = IRQ11
  32. 0x0C - 1100 = IRQ12
  33. 0x0D - 1101 = Reserved
  34. 0x0E - 1110 = IRQ14
  35. 0x0F - 1111 = IRQ15
  36. PIRQ[n]_ROUT[7] - PIRQ Routing Control
  37. 0x80 - The PIRQ is not routed.
  38. Example
  39. -------
  40. lpc {
  41. compatible = "intel,lpc";
  42. #address-cells = <1>;
  43. #size-cells = <1>;
  44. intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
  45. intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
  46. 0x80 0x80 0x80 0x80>;
  47. /*
  48. * GPI routing
  49. * 0 No effect (default)
  50. * 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is
  51. * also set)
  52. * 2 SCI (if corresponding GPIO_EN bit is also set)
  53. */
  54. intel,gpi-routing = <0 0 0 0 0 0 0 2
  55. 1 0 0 0 0 0 0 0>;
  56. /* Enable EC SMI source */
  57. intel,alt-gp-smi-enable = <0x0100>;
  58. };