intel,baytrail-fsp.txt 3.7 KB

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  1. Intel Bay Trail FSP UPD Binding
  2. ===============================
  3. The device tree node which describes the overriding of the Intel Bay Trail FSP
  4. UPD data for configuring the SoC.
  5. All properties can be found within the `upd-region` struct in
  6. arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h, under the same names, and in
  7. Intel's FSP Binary Configuration Tool for Bay Trail. This list of properties
  8. is matched up to Intel's E3800 FSPv4 release.
  9. # Boolean properties:
  10. - fsp,enable-sdio
  11. - fsp,enable-sdcard
  12. - fsp,enable-hsuart0
  13. - fsp,enable-hsuart1
  14. - fsp,enable-spi
  15. - fsp,enable-sata
  16. - fsp,enable-azalia
  17. - fsp,enable-xhci
  18. - fsp,enable-dma0
  19. - fsp,enable-dma1
  20. - fsp,enable-i2-c0
  21. - fsp,enable-i2-c1
  22. - fsp,enable-i2-c2
  23. - fsp,enable-i2-c3
  24. - fsp,enable-i2-c4
  25. - fsp,enable-i2-c5
  26. - fsp,enable-i2-c6
  27. - fsp,enable-pwm0
  28. - fsp,enable-pwm1
  29. - fsp,enable-hsi
  30. - fsp,mrc-debug-msg
  31. - fsp,isp-enable
  32. - fsp,igd-render-standby
  33. - fsp,txe-uma-enable
  34. - fsp,emmc45-ddr50-enabled
  35. - fsp,emmc45-hs200-enabled
  36. - fsp,enable-igd
  37. - fsp,enable-memory-down
  38. If you set "fsp,enable-memory-down" you are strongly encouraged to provide an
  39. "fsp,memory-down-params{};" to specify how your memory is configured. If you
  40. do not set "fsp,enable-memory-down", then the DIMM SPD information will be
  41. discovered by the FSP and used to setup main memory.
  42. # Integer properties:
  43. - fsp,mrc-init-tseg-size
  44. - fsp,mrc-init-mmio-size
  45. - fsp,mrc-init-spd-addr1
  46. - fsp,mrc-init-spd-addr2
  47. - fsp,emmc-boot-mode
  48. - fsp,sata-mode
  49. - fsp,lpe-mode
  50. - fsp,lpss-sio-mode
  51. - fsp,igd-dvmt50-pre-alloc
  52. - fsp,aperture-size
  53. - fsp,gtt-size
  54. - fsp,scc-mode
  55. - fsp,os-selection
  56. - fsp,emmc45-retune-timer-value
  57. - fsp,memory-down-params {
  58. # Boolean properties:
  59. - fsp,dimm-0-enable
  60. - fsp,dimm-1-enable
  61. # Integer properties:
  62. - fsp,dram-speed
  63. - fsp,dram-type
  64. - fsp,dimm-width
  65. - fsp,dimm-density
  66. - fsp,dimm-bus-width
  67. - fsp,dimm-sides
  68. - fsp,dimm-tcl
  69. - fsp,dimm-trpt-rcd
  70. - fsp,dimm-twr
  71. - fsp,dimm-twtr
  72. - fsp,dimm-trrd
  73. - fsp,dimm-trtp
  74. - fsp,dimm-tfaw
  75. };
  76. For all integer properties, available options are listed in fsp_configs.h in
  77. arch/x86/include/asm/arch-baytrail/fsp directory (eg: MRC_INIT_TSEG_SIZE_1MB).
  78. Example (from MinnowMax Dual Core):
  79. -----------------------------------
  80. / {
  81. ...
  82. fsp {
  83. compatible = "intel,baytrail-fsp";
  84. fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
  85. fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
  86. fsp,mrc-init-spd-addr1 = <0xa0>;
  87. fsp,mrc-init-spd-addr2 = <0xa2>;
  88. fsp,emmc-boot-mode = <EMMC_BOOT_MODE_AUTO>;
  89. fsp,enable-sdio;
  90. fsp,enable-sdcard;
  91. fsp,enable-hsuart1;
  92. fsp,enable-spi;
  93. fsp,enable-sata;
  94. fsp,sata-mode = <SATA_MODE_AHCI>;
  95. fsp,lpe-mode = <LPE_MODE_PCI>;
  96. fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
  97. fsp,enable-dma0;
  98. fsp,enable-dma1;
  99. fsp,enable-i2c0;
  100. fsp,enable-i2c1;
  101. fsp,enable-i2c2;
  102. fsp,enable-i2c3;
  103. fsp,enable-i2c4;
  104. fsp,enable-i2c5;
  105. fsp,enable-i2c6;
  106. fsp,enable-pwm0;
  107. fsp,enable-pwm1;
  108. fsp,igd-dvmt50-pre-alloc = <IGD_DVMT50_PRE_ALLOC_64MB>;
  109. fsp,aperture-size = <APERTURE_SIZE_256MB>;
  110. fsp,gtt-size = <GTT_SIZE_2MB>;
  111. fsp,scc-mode = <SCC_MODE_PCI>;
  112. fsp,os-selection = <OS_SELECTION_LINUX>;
  113. fsp,emmc45-ddr50-enabled;
  114. fsp,emmc45-retune-timer-value = <8>;
  115. fsp,enable-igd;
  116. fsp,enable-memory-down;
  117. fsp,memory-down-params {
  118. compatible = "intel,baytrail-fsp-mdp";
  119. fsp,dram-speed = <DRAM_SPEED_1066MTS>;
  120. fsp,dram-type = <DRAM_TYPE_DDR3L>;
  121. fsp,dimm-0-enable;
  122. fsp,dimm-width = <DIMM_WIDTH_X16>;
  123. fsp,dimm-density = <DIMM_DENSITY_4GBIT>;
  124. fsp,dimm-bus-width = <DIMM_BUS_WIDTH_64BITS>;
  125. fsp,dimm-sides = <DIMM_SIDES_1RANKS>;
  126. fsp,dimm-tcl = <0xb>;
  127. fsp,dimm-trpt-rcd = <0xb>;
  128. fsp,dimm-twr = <0xc>;
  129. fsp,dimm-twtr = <6>;
  130. fsp,dimm-trrd = <6>;
  131. fsp,dimm-trtp = <6>;
  132. fsp,dimm-tfaw = <0x14>;
  133. };
  134. };
  135. ...
  136. };