gpio.txt 13 KB

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  1. Specifying GPIO information for devices
  2. ============================================
  3. 1) gpios property
  4. -----------------
  5. GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
  6. of this GPIO for the device. While a non-existent <name> is considered valid
  7. for compatibility reasons (resolving to the "gpios" property), it is not allowed
  8. for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
  9. bindings use it, but are only supported for compatibility reasons and should not
  10. be used for newer bindings since it has been deprecated.
  11. GPIO properties can contain one or more GPIO phandles, but only in exceptional
  12. cases should they contain more than one. If your device uses several GPIOs with
  13. distinct functions, reference each of them under its own property, giving it a
  14. meaningful name. The only case where an array of GPIOs is accepted is when
  15. several GPIOs serve the same function (e.g. a parallel data line).
  16. The exact purpose of each gpios property must be documented in the device tree
  17. binding of the device.
  18. The following example could be used to describe GPIO pins used as device enable
  19. and bit-banged data signals:
  20. gpio1: gpio1 {
  21. gpio-controller;
  22. #gpio-cells = <2>;
  23. };
  24. [...]
  25. data-gpios = <&gpio1 12 0>,
  26. <&gpio1 13 0>,
  27. <&gpio1 14 0>,
  28. <&gpio1 15 0>;
  29. In the above example, &gpio1 uses 2 cells to specify a gpio. The first cell is
  30. a local offset to the GPIO line and the second cell represent consumer flags,
  31. such as if the consumer desire the line to be active low (inverted) or open
  32. drain. This is the recommended practice.
  33. The exact meaning of each specifier cell is controller specific, and must be
  34. documented in the device tree binding for the device, but it is strongly
  35. recommended to use the two-cell approach.
  36. Most controllers are specifying a generic flag bitfield in the last cell, so
  37. for these, use the macros defined in
  38. include/dt-bindings/gpio/gpio.h whenever possible:
  39. Example of a node using GPIOs:
  40. node {
  41. enable-gpios = <&qe_pio_e 18 GPIO_ACTIVE_HIGH>;
  42. };
  43. GPIO_ACTIVE_HIGH is 0, so in this example gpio-specifier is "18 0" and encodes
  44. GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller.
  45. Optional standard bitfield specifiers for the last cell:
  46. - Bit 0: 0 means active high, 1 means active low
  47. - Bit 1: 0 mean push-pull wiring, see:
  48. https://en.wikipedia.org/wiki/Push-pull_output
  49. 1 means single-ended wiring, see:
  50. https://en.wikipedia.org/wiki/Single-ended_triode
  51. - Bit 2: 0 means open-source, 1 means open drain, see:
  52. https://en.wikipedia.org/wiki/Open_collector
  53. - Bit 3: 0 means the output should be maintained during sleep/low-power mode
  54. 1 means the output state can be lost during sleep/low-power mode
  55. - Bit 4: 0 means no pull-up resistor should be enabled
  56. 1 means a pull-up resistor should be enabled
  57. This setting only applies to hardware with a simple on/off
  58. control for pull-up configuration. If the hardware has more
  59. elaborate pull-up configuration, it should be represented
  60. using a pin control binding.
  61. - Bit 5: 0 means no pull-down resistor should be enabled
  62. 1 means a pull-down resistor should be enabled
  63. This setting only applies to hardware with a simple on/off
  64. control for pull-down configuration. If the hardware has more
  65. elaborate pull-down configuration, it should be represented
  66. using a pin control binding.
  67. 1.1) GPIO specifier best practices
  68. ----------------------------------
  69. A gpio-specifier should contain a flag indicating the GPIO polarity; active-
  70. high or active-low. If it does, the following best practices should be
  71. followed:
  72. The gpio-specifier's polarity flag should represent the physical level at the
  73. GPIO controller that achieves (or represents, for inputs) a logically asserted
  74. value at the device. The exact definition of logically asserted should be
  75. defined by the binding for the device. If the board inverts the signal between
  76. the GPIO controller and the device, then the gpio-specifier will represent the
  77. opposite physical level than the signal at the device's pin.
  78. When the device's signal polarity is configurable, the binding for the
  79. device must either:
  80. a) Define a single static polarity for the signal, with the expectation that
  81. any software using that binding would statically program the device to use
  82. that signal polarity.
  83. The static choice of polarity may be either:
  84. a1) (Preferred) Dictated by a binding-specific DT property.
  85. or:
  86. a2) Defined statically by the DT binding itself.
  87. In particular, the polarity cannot be derived from the gpio-specifier, since
  88. that would prevent the DT from separately representing the two orthogonal
  89. concepts of configurable signal polarity in the device, and possible board-
  90. level signal inversion.
  91. or:
  92. b) Pick a single option for device signal polarity, and document this choice
  93. in the binding. The gpio-specifier should represent the polarity of the signal
  94. (at the GPIO controller) assuming that the device is configured for this
  95. particular signal polarity choice. If software chooses to program the device
  96. to generate or receive a signal of the opposite polarity, software will be
  97. responsible for correctly interpreting (inverting) the GPIO signal at the GPIO
  98. controller.
  99. 2) gpio-controller nodes
  100. ------------------------
  101. Every GPIO controller node must contain both an empty "gpio-controller"
  102. property, and a #gpio-cells integer property, which indicates the number of
  103. cells in a gpio-specifier.
  104. Some system-on-chips (SoCs) use the concept of GPIO banks. A GPIO bank is an
  105. instance of a hardware IP core on a silicon die, usually exposed to the
  106. programmer as a coherent range of I/O addresses. Usually each such bank is
  107. exposed in the device tree as an individual gpio-controller node, reflecting
  108. the fact that the hardware was synthesized by reusing the same IP block a
  109. few times over.
  110. Optionally, a GPIO controller may have a "ngpios" property. This property
  111. indicates the number of in-use slots of available slots for GPIOs. The
  112. typical example is something like this: the hardware register is 32 bits
  113. wide, but only 18 of the bits have a physical counterpart. The driver is
  114. generally written so that all 32 bits can be used, but the IP block is reused
  115. in a lot of designs, some using all 32 bits, some using 18 and some using
  116. 12. In this case, setting "ngpios = <18>;" informs the driver that only the
  117. first 18 GPIOs, at local offset 0 .. 17, are in use.
  118. If these GPIOs do not happen to be the first N GPIOs at offset 0...N-1, an
  119. additional set of tuples is needed to specify which GPIOs are unusable, with
  120. the gpio-reserved-ranges binding. This property indicates the start and size
  121. of the GPIOs that can't be used.
  122. Optionally, a GPIO controller may have a "gpio-line-names" property. This is
  123. an array of strings defining the names of the GPIO lines going out of the
  124. GPIO controller. This name should be the most meaningful producer name
  125. for the system, such as a rail name indicating the usage. Package names
  126. such as pin name are discouraged: such lines have opaque names (since they
  127. are by definition generic purpose) and such names are usually not very
  128. helpful. For example "MMC-CD", "Red LED Vdd" and "ethernet reset" are
  129. reasonable line names as they describe what the line is used for. "GPIO0"
  130. is not a good name to give to a GPIO line. Placeholders are discouraged:
  131. rather use the "" (blank string) if the use of the GPIO line is undefined
  132. in your design. The names are assigned starting from line offset 0 from
  133. left to right from the passed array. An incomplete array (where the number
  134. of passed named are less than ngpios) will still be used up until the last
  135. provided valid line index.
  136. Example:
  137. gpio-controller@00000000 {
  138. compatible = "foo";
  139. reg = <0x00000000 0x1000>;
  140. gpio-controller;
  141. #gpio-cells = <2>;
  142. ngpios = <18>;
  143. gpio-reserved-ranges = <0 4>, <12 2>;
  144. gpio-line-names = "MMC-CD", "MMC-WP", "VDD eth", "RST eth", "LED R",
  145. "LED G", "LED B", "Col A", "Col B", "Col C", "Col D",
  146. "Row A", "Row B", "Row C", "Row D", "NMI button",
  147. "poweroff", "reset";
  148. }
  149. The GPIO chip may contain GPIO hog definitions. GPIO hogging is a mechanism
  150. providing automatic GPIO request and configuration as part of the
  151. gpio-controller's driver probe function.
  152. Each GPIO hog definition is represented as a child node of the GPIO controller.
  153. Required properties:
  154. - gpio-hog: A property specifying that this child node represents a GPIO hog.
  155. - gpios: Store the GPIO information (id, flags, ...) for each GPIO to
  156. affect. Shall contain an integer multiple of the number of cells
  157. specified in its parent node (GPIO controller node).
  158. Only one of the following properties scanned in the order shown below.
  159. This means that when multiple properties are present they will be searched
  160. in the order presented below and the first match is taken as the intended
  161. configuration.
  162. - input: A property specifying to set the GPIO direction as input.
  163. - output-low A property specifying to set the GPIO direction as output with
  164. the value low.
  165. - output-high A property specifying to set the GPIO direction as output with
  166. the value high.
  167. Optional properties:
  168. - line-name: The GPIO label name. If not present the node name is used.
  169. Example of two SOC GPIO banks defined as gpio-controller nodes:
  170. qe_pio_a: gpio-controller@1400 {
  171. compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank";
  172. reg = <0x1400 0x18>;
  173. gpio-controller;
  174. #gpio-cells = <2>;
  175. };
  176. qe_pio_e: gpio-controller@1460 {
  177. compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
  178. reg = <0x1460 0x18>;
  179. gpio-controller;
  180. #gpio-cells = <2>;
  181. };
  182. 2.1) gpio- and pin-controller interaction
  183. -----------------------------------------
  184. Some or all of the GPIOs provided by a GPIO controller may be routed to pins
  185. on the package via a pin controller. This allows muxing those pins between
  186. GPIO and other functions. It is a fairly common practice among silicon
  187. engineers.
  188. 2.2) Ordinary (numerical) GPIO ranges
  189. -------------------------------------
  190. It is useful to represent which GPIOs correspond to which pins on which pin
  191. controllers. The gpio-ranges property described below represents this with
  192. a discrete set of ranges mapping pins from the pin controller local number space
  193. to pins in the GPIO controller local number space.
  194. The format is: <[pin controller phandle], [GPIO controller offset],
  195. [pin controller offset], [number of pins]>;
  196. The GPIO controller offset pertains to the GPIO controller node containing the
  197. range definition.
  198. The pin controller node referenced by the phandle must conform to the bindings
  199. described in pinctrl/pinctrl-bindings.txt.
  200. Each offset runs from 0 to N. It is perfectly fine to pile any number of
  201. ranges with just one pin-to-GPIO line mapping if the ranges are concocted, but
  202. in practice these ranges are often lumped in discrete sets.
  203. Example:
  204. gpio-ranges = <&foo 0 20 10>, <&bar 10 50 20>;
  205. This means:
  206. - pins 20..29 on pin controller "foo" is mapped to GPIO line 0..9 and
  207. - pins 50..69 on pin controller "bar" is mapped to GPIO line 10..29
  208. Verbose example:
  209. qe_pio_e: gpio-controller@1460 {
  210. #gpio-cells = <2>;
  211. compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
  212. reg = <0x1460 0x18>;
  213. gpio-controller;
  214. gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 20>;
  215. };
  216. Here, a single GPIO controller has GPIOs 0..9 routed to pin controller
  217. pinctrl1's pins 20..29, and GPIOs 10..29 routed to pin controller pinctrl2's
  218. pins 50..69.
  219. 2.3) GPIO ranges from named pin groups
  220. --------------------------------------
  221. It is also possible to use pin groups for gpio ranges when pin groups are the
  222. easiest and most convenient mapping.
  223. Both both <pinctrl-base> and <count> must set to 0 when using named pin groups
  224. names.
  225. The property gpio-ranges-group-names must contain exactly one string for each
  226. range.
  227. Elements of gpio-ranges-group-names must contain the name of a pin group
  228. defined in the respective pin controller. The number of pins/GPIO lines in the
  229. range is the number of pins in that pin group. The number of pins of that
  230. group is defined int the implementation and not in the device tree.
  231. If numerical and named pin groups are mixed, the string corresponding to a
  232. numerical pin range in gpio-ranges-group-names must be empty.
  233. Example:
  234. gpio_pio_i: gpio-controller@14b0 {
  235. #gpio-cells = <2>;
  236. compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
  237. reg = <0x1480 0x18>;
  238. gpio-controller;
  239. gpio-ranges = <&pinctrl1 0 20 10>,
  240. <&pinctrl2 10 0 0>,
  241. <&pinctrl1 15 0 10>,
  242. <&pinctrl2 25 0 0>;
  243. gpio-ranges-group-names = "",
  244. "foo",
  245. "",
  246. "bar";
  247. };
  248. Here, three GPIO ranges are defined referring to two pin controllers.
  249. pinctrl1 GPIO ranges are defined using pin numbers whereas the GPIO ranges
  250. in pinctrl2 are defined using the pin groups named "foo" and "bar".
  251. Previous versions of this binding required all pin controller nodes that
  252. were referenced by any gpio-ranges property to contain a property named
  253. #gpio-range-cells with value <3>. This requirement is now deprecated.
  254. However, that property may still exist in older device trees for
  255. compatibility reasons, and would still be required even in new device
  256. trees that need to be compatible with older software.