README.rockchip 22 KB

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  1. # SPDX-License-Identifier: GPL-2.0+
  2. #
  3. # Copyright (C) 2015 Google. Inc
  4. # Written by Simon Glass <sjg@chromium.org>
  5. U-Boot on Rockchip
  6. ==================
  7. A wide range of Rockchip SoCs are supported in mainline U-Boot
  8. Warning
  9. =======
  10. This document is being moved to doc/board/rockchip, so information on it
  11. might be incomplete or outdated.
  12. Prerequisites
  13. =============
  14. You will need:
  15. - Firefly RK3288 board or something else with a supported RockChip SoC
  16. - Power connection to 5V using the supplied micro-USB power cable
  17. - Separate USB serial cable attached to your computer and the Firefly
  18. (connect to the micro-USB connector below the logo)
  19. - rkflashtool [3]
  20. - openssl (sudo apt-get install openssl)
  21. - Serial UART connection [4]
  22. - Suitable ARM cross compiler, e.g.:
  23. sudo apt-get install gcc-4.7-arm-linux-gnueabi
  24. Building
  25. ========
  26. 1. To build RK3288 board:
  27. CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
  28. (or you can use another cross compiler if you prefer)
  29. 2. To build RK3308 board:
  30. - Get the rkbin
  31. => git clone https://github.com/rockchip-linux/rkbin.git
  32. - Compile U-Boot
  33. => cd /path/to/u-boot
  34. => export BL31=/path/to/rkbin/bin/rk33/rk3308_bl31_v2.22.elf
  35. => make roc-cc-rk3308_defconfig
  36. => make CROSS_COMPILE=aarch64-linux-gnu- all
  37. => ./tools/mkimage -n rk3308 -T rksd -d /path/to/rkbin/bin/rk33/rk3308_ddr_589MHz_uart2_m0_v1.26.bin idbloader.img
  38. => cat spl/u-boot-spl.bin >> idbloader.img
  39. 3. To build RK3399 board:
  40. Option 1: Package the image with Rockchip miniloader:
  41. - Compile U-Boot
  42. => cd /path/to/u-boot
  43. => make nanopi-neo4-rk3399_defconfig
  44. => make
  45. - Get the rkbin
  46. => git clone https://github.com/rockchip-linux/rkbin.git
  47. - Create trust.img
  48. => cd /path/to/rkbin
  49. => ./tools/trust_merger RKTRUST/RK3399TRUST.ini
  50. - Create uboot.img
  51. => cd /path/to/rkbin
  52. => ./tools/loaderimage --pack --uboot /path/to/u-boot/u-boot-dtb.bin uboot.img
  53. (Get trust.img and uboot.img)
  54. Option 2: Package the image with SPL:
  55. - Export cross compiler path for aarch64
  56. - Compile ATF
  57. For Puma board.
  58. => git clone git://git.theobroma-systems.com/arm-trusted-firmware.git
  59. => cd arm-trusted-firmware
  60. => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31
  61. (export bl31.bin)
  62. => export BL31=/path/to/arm-trusted-firmware/build/rk3399/release/bl31/bl31.bin
  63. For rest of rk3399 boards.
  64. => git clone https://github.com/ARM-software/arm-trusted-firmware.git
  65. => cd arm-trusted-firmware
  66. (export cross compiler path for Cortex-M0 MCU likely arm-none-eabi-)
  67. => make realclean
  68. => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399
  69. (export bl31.elf)
  70. => export BL31=/path/to/arm-trusted-firmware/build/rk3399/release/bl31/bl31.elf
  71. - Compile PMU M0 firmware
  72. This is optional for most of the rk3399 boards and required only for Puma board.
  73. => git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git
  74. => cd rk3399-cortex-m0
  75. (export cross compiler path for Cortex-M0 PMU)
  76. => make CROSS_COMPILE=arm-cortex_m0-eabi-
  77. (export rk3399m0.bin)
  78. => export PMUM0=/path/to/rk3399-cortex-m0/rk3399m0.bin
  79. - Compile U-Boot
  80. => cd /path/to/u-boot
  81. => make orangepi-rk3399_defconfig
  82. => make
  83. (Get spl/u-boot-spl-dtb.bin, u-boot.itb images and some boards would get
  84. spl/u-boot-spl.bin since it doesn't enable CONFIG_SPL_OF_CONTROL
  85. If TPL enabled on the target, get tpl/u-boot-tpl-dtb.bin or tpl/u-boot-tpl.bin
  86. if CONFIG_TPL_OF_CONTROL not enabled)
  87. Writing to the board with USB
  88. =============================
  89. For USB to work you must get your board into ROM boot mode, either by erasing
  90. your MMC or (perhaps) holding the recovery button when you boot the board.
  91. To erase your MMC, you can boot into Linux and type (as root)
  92. dd if=/dev/zero of=/dev/mmcblk0 bs=1M
  93. Connect your board's OTG port to your computer.
  94. To create a suitable image and write it to the board:
  95. ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
  96. ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
  97. cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
  98. If all goes well you should something like:
  99. U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
  100. Card did not respond to voltage select!
  101. spl: mmc init failed with error: -17
  102. ### ERROR ### Please RESET the board ###
  103. You will need to reset the board before each time you try. Yes, that's all
  104. it does so far. If support for the Rockchip USB protocol or DFU were added
  105. in SPL then we could in principle load U-Boot and boot to a prompt from USB
  106. as several other platforms do. However it does not seem to be possible to
  107. use the existing boot ROM code from SPL.
  108. Writing to the eMMC with USB on ROC-RK3308-CC
  109. =============================================
  110. For USB to work you must get your board into Bootrom mode,
  111. either by erasing the eMMC or short circuit the GND and D0
  112. on core board.
  113. Connect the board to your computer via tyepc.
  114. => rkdeveloptool db rk3308_loader_v1.26.117.bin
  115. => rkdeveloptool wl 0x40 idbloader.img
  116. => rkdeveloptool wl 0x4000 u-boot.itb
  117. => rkdeveloptool rd
  118. Then you will see the boot log from Debug UART at baud rate 1500000:
  119. DDR Version V1.26
  120. REGFB: 0x00000032, 0x00000032
  121. In
  122. 589MHz
  123. DDR3
  124. Col=10 Bank=8 Row=14 Size=256MB
  125. msch:1
  126. Returning to boot ROM...
  127. U-Boot SPL 2020.01-rc1-00225-g34b681327f (Nov 14 2019 - 10:58:04 +0800)
  128. Trying to boot from MMC1
  129. INFO: Preloader serial: 2
  130. NOTICE: BL31: v1.3(release):30f1405
  131. NOTICE: BL31: Built : 17:08:28, Sep 23 2019
  132. INFO: Lastlog: last=0x100000, realtime=0x102000, size=0x2000
  133. INFO: ARM GICv2 driver initialized
  134. INFO: Using opteed sec cpu_context!
  135. INFO: boot cpu mask: 1
  136. INFO: plat_rockchip_pmu_init: pd status 0xe b
  137. INFO: BL31: Initializing runtime services
  138. WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will rK
  139. ERROR: Error initializing runtime service opteed_fast
  140. INFO: BL31: Preparing for EL3 exit to normal world
  141. INFO: Entry point address = 0x600000
  142. INFO: SPSR = 0x3c9
  143. U-Boot 2020.01-rc1-00225-g34b681327f (Nov 14 2019 - 10:58:47 +0800)
  144. Model: Firefly ROC-RK3308-CC board
  145. DRAM: 254 MiB
  146. MMC: dwmmc@ff480000: 0, dwmmc@ff490000: 1
  147. rockchip_dnl_key_pressed read adc key val failed
  148. Net: No ethernet found.
  149. Hit any key to stop autoboot: 0
  150. Card did not respond to voltage select!
  151. switch to partitions #0, OK
  152. mmc1(part 0) is current device
  153. Scanning mmc 1:4...
  154. Found /extlinux/extlinux.conf
  155. Retrieving file: /extlinux/extlinux.conf
  156. 151 bytes read in 3 ms (48.8 KiB/s)
  157. 1: kernel-mainline
  158. Retrieving file: /Image
  159. 14737920 bytes read in 377 ms (37.3 MiB/s)
  160. append: earlycon=uart8250,mmio32,0xff0c0000 console=ttyS2,1500000n8
  161. Retrieving file: /rk3308-roc-cc.dtb
  162. 28954 bytes read in 4 ms (6.9 MiB/s)
  163. Flattened Device Tree blob at 01f00000
  164. Booting using the fdt blob at 0x1f00000
  165. ## Loading Device Tree to 000000000df3a000, end 000000000df44119 ... OK
  166. Starting kernel ...
  167. [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd042]
  168. [ 0.000000] Linux version 5.4.0-rc1-00040-g4dc2d508fa47-dirty (andy@B150) (gcc version 6.3.1 20170404 (Linaro GCC 6.3-209
  169. [ 0.000000] Machine model: Firefly ROC-RK3308-CC board
  170. [ 0.000000] earlycon: uart8250 at MMIO32 0x00000000ff0c0000 (options '')
  171. [ 0.000000] printk: bootconsole [uart8250] enabled
  172. Booting from an SD card
  173. =======================
  174. To write an image that boots from an SD card (assumed to be /dev/sdc):
  175. ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
  176. firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
  177. sudo dd if=out of=/dev/sdc seek=64 && \
  178. sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=16384
  179. This puts the Rockchip header and SPL image first and then places the U-Boot
  180. image at block 16384 (i.e. 8MB from the start of the SD card). This
  181. corresponds with this setting in U-Boot:
  182. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x4000
  183. Put this SD (or micro-SD) card into your board and reset it. You should see
  184. something like:
  185. U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700)
  186. Model: Radxa Rock 2 Square
  187. DRAM: 2 GiB
  188. MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1
  189. *** Warning - bad CRC, using default environment
  190. In: serial
  191. Out: vop@ff940000.vidconsole
  192. Err: serial
  193. Net: Net Initialization Skipped
  194. No ethernet found.
  195. Hit any key to stop autoboot: 0
  196. =>
  197. The rockchip bootrom can load and boot an initial spl, then continue to
  198. load a second-stage bootloader (ie. U-Boot) as soon as the control is returned
  199. to the bootrom. Both the RK3288 and the RK3036 use this special boot sequence.
  200. The configuration option enabling this is:
  201. CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
  202. You can create the image via the following operations:
  203. ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
  204. firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
  205. cat firefly-rk3288/u-boot-dtb.bin >> out && \
  206. sudo dd if=out of=/dev/sdc seek=64
  207. Or:
  208. ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
  209. firefly-rk3288/spl/u-boot-spl-dtb.bin:firefly-rk3288/u-boot-dtb.bin \
  210. out && \
  211. sudo dd if=out of=/dev/sdc seek=64
  212. If you have an HDMI cable attached you should see a video console.
  213. For evb_rk3036 board:
  214. ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
  215. cat evb-rk3036/u-boot-dtb.bin >> out && \
  216. sudo dd if=out of=/dev/sdc seek=64
  217. Or:
  218. ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d \
  219. evb-rk3036/spl/u-boot-spl.bin:evb-rk3036/u-boot-dtb.bin out && \
  220. sudo dd if=out of=/dev/sdc seek=64
  221. Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
  222. debug uart must be disabled
  223. Booting from an SD card on RK3288 with TPL
  224. ==========================================
  225. Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add
  226. new SPL features like Falcon mode or etc.
  227. So introduce TPL so-that adding new features to SPL is possible because now TPL should
  228. run minimal with code like DDR, clock etc and rest of new features in SPL.
  229. As of now TPL is added on Vyasa-RK3288 board.
  230. To write an image that boots from an SD card (assumed to be /dev/mmcblk0):
  231. sudo dd if=idbloader.img of=/dev/mmcblk0 seek=64 &&
  232. sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=16384
  233. Booting from an SD card on RK3188
  234. =================================
  235. For rk3188 boards the general storage onto the card stays the same as
  236. described above, but the image creation needs a bit more care.
  237. The bootrom of rk3188 expects to find a small 1kb loader which returns
  238. control to the bootrom, after which it will load the real loader, which
  239. can then be up to 29kb in size and does the regular ddr init. This is
  240. handled by a single image (built as the SPL stage) that tests whether
  241. it is handled for the first or second time via code executed from the
  242. boot0-hook.
  243. Additionally the rk3188 requires everything the bootrom loads to be
  244. rc4-encrypted. Except for the very first stage the bootrom always reads
  245. and decodes 2kb pages, so files should be sized accordingly.
  246. # copy tpl, pad to 1020 bytes and append spl
  247. tools/mkimage -n rk3188 -T rksd -d spl/u-boot-spl.bin out
  248. # truncate, encode and append u-boot.bin
  249. truncate -s %2048 u-boot.bin
  250. cat u-boot.bin | split -b 512 --filter='openssl rc4 -K 7C4E0304550509072D2C7B38170D1711' >> out
  251. Booting from an SD card on Pine64 Rock64 (RK3328)
  252. =================================================
  253. For Rock64 rk3328 board the following three parts are required:
  254. TPL, SPL, and the u-boot image tree blob.
  255. - Write TPL/SPL image at 64 sector
  256. => sudo dd if=idbloader.img of=/dev/mmcblk0 seek=64
  257. - Write u-boot image tree blob at 16384 sector
  258. => sudo dd if=u-boot.itb of=/dev/mmcblk0 seek=16384
  259. Booting from an SD card on RK3399
  260. =================================
  261. To write an image that boots from an SD card (assumed to be /dev/sdc):
  262. Option 1: Package the image with Rockchip miniloader:
  263. - Create idbloader.img
  264. => cd /path/to/u-boot
  265. => ./tools/mkimage -n rk3399 -T rksd -d /path/to/rkbin/bin/rk33/rk3399_ddr_800MHz_v1.20.bin idbloader.img
  266. => cat /path/to/rkbin/bin/rk33/rk3399_miniloader_v1.19.bin >> idbloader.img
  267. - Write idbloader.img at 64 sector
  268. => sudo dd if=idbloader.img of=/dev/sdc seek=64
  269. - Write trust.img at 24576
  270. => sudo dd if=trust.img of=/dev/sdc seek=24576
  271. - Write uboot.img at 16384 sector
  272. => sudo dd if=uboot.img of=/dev/sdc seek=16384
  273. => sync
  274. Put this SD (or micro-SD) card into your board and reset it. You should see
  275. something like:
  276. DDR Version 1.20 20190314
  277. In
  278. Channel 0: DDR3, 933MHz
  279. Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB
  280. no stride
  281. ch 0 ddrconfig = 0x101, ddrsize = 0x20
  282. pmugrf_os_reg[2] = 0x10006281, stride = 0x17
  283. OUT
  284. Boot1: 2019-03-14, version: 1.19
  285. CPUId = 0x0
  286. ChipType = 0x10, 239
  287. mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
  288. mmc: ERROR: Card did not respond to voltage select!
  289. emmc reinit
  290. mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
  291. mmc: ERROR: Card did not respond to voltage select!
  292. emmc reinit
  293. mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
  294. mmc: ERROR: Card did not respond to voltage select!
  295. SdmmcInit=2 1
  296. mmc0:cmd5,20
  297. SdmmcInit=0 0
  298. BootCapSize=0
  299. UserCapSize=60543MB
  300. FwPartOffset=2000 , 0
  301. StorageInit ok = 45266
  302. SecureMode = 0
  303. SecureInit read PBA: 0x4
  304. SecureInit read PBA: 0x404
  305. SecureInit read PBA: 0x804
  306. SecureInit read PBA: 0xc04
  307. SecureInit read PBA: 0x1004
  308. SecureInit read PBA: 0x1404
  309. SecureInit read PBA: 0x1804
  310. SecureInit read PBA: 0x1c04
  311. SecureInit ret = 0, SecureMode = 0
  312. atags_set_bootdev: ret:(0)
  313. GPT 0x3380ec0 signature is wrong
  314. recovery gpt...
  315. GPT 0x3380ec0 signature is wrong
  316. recovery gpt fail!
  317. LoadTrust Addr:0x4000
  318. No find bl30.bin
  319. Load uboot, ReadLba = 2000
  320. hdr 0000000003380880 + 0x0:0x88,0x41,0x3e,0x97,0xe6,0x61,0x54,0x23,0xe9,0x5a,0xd1,0x2b,0xdc,0x2f,0xf9,0x35,
  321. Load OK, addr=0x200000, size=0x9c9c0
  322. RunBL31 0x10000
  323. NOTICE: BL31: v1.3(debug):370ab80
  324. NOTICE: BL31: Built : 09:23:41, Mar 4 2019
  325. NOTICE: BL31: Rockchip release version: v1.1
  326. INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
  327. INFO: Using opteed sec cpu_context!
  328. INFO: boot cpu mask: 0
  329. INFO: plat_rockchip_pmu_init(1181): pd status 3e
  330. INFO: BL31: Initializing runtime services
  331. INFO: BL31: Initializing BL32
  332. INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-195-g8f090d20 #6 Fri Dec 7 06:11:20 UTC 2018 aarch64)
  333. INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2
  334. INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
  335. INFO: BL31: Preparing for EL3 exit to normal world
  336. INFO: Entry point address = 0x200000
  337. INFO: SPSR = 0x3c9
  338. U-Boot 2019.04-rc4-00136-gfd121f9641-dirty (Apr 16 2019 - 14:02:47 +0530)
  339. Model: FriendlyARM NanoPi NEO4
  340. DRAM: 1022 MiB
  341. MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
  342. Loading Environment from MMC... *** Warning - bad CRC, using default environment
  343. In: serial@ff1a0000
  344. Out: serial@ff1a0000
  345. Err: serial@ff1a0000
  346. Model: FriendlyARM NanoPi NEO4
  347. Net: eth0: ethernet@fe300000
  348. Hit any key to stop autoboot: 0
  349. =>
  350. Option 2: Package the image with SPL:
  351. - Prefix rk3399 header to SPL image
  352. => cd /path/to/u-boot
  353. => ./tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl-dtb.bin out
  354. - Write prefixed SPL at 64th sector
  355. => sudo dd if=out of=/dev/sdc seek=64
  356. - Write U-Boot proper at 16384 sector
  357. => sudo dd if=u-boot.itb of=/dev/sdc seek=16384
  358. => sync
  359. Put this SD (or micro-SD) card into your board and reset it. You should see
  360. something like:
  361. U-Boot SPL board init
  362. Trying to boot from MMC1
  363. U-Boot 2019.01-00004-g14db5ee998 (Mar 11 2019 - 13:18:41 +0530)
  364. Model: Orange Pi RK3399 Board
  365. DRAM: 2 GiB
  366. MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
  367. Loading Environment from MMC... OK
  368. In: serial@ff1a0000
  369. Out: serial@ff1a0000
  370. Err: serial@ff1a0000
  371. Model: Orange Pi RK3399 Board
  372. Net: eth0: ethernet@fe300000
  373. Hit any key to stop autoboot: 0
  374. =>
  375. Option 3: Package the image with TPL:
  376. - Write tpl+spl at 64th sector
  377. => sudo dd if=idbloader.img of=/dev/sdc seek=64
  378. - Write U-Boot proper at 16384 sector
  379. => sudo dd if=u-boot.itb of=/dev/sdc seek=16384
  380. => sync
  381. Put this SD (or micro-SD) card into your board and reset it. You should see
  382. something like:
  383. U-Boot TPL board init
  384. Trying to boot from BOOTROM
  385. Returning to boot ROM...
  386. U-Boot SPL board init
  387. Trying to boot from MMC1
  388. U-Boot 2019.07-rc1-00241-g5b3244767a (May 08 2019 - 10:51:06 +0530)
  389. Model: Orange Pi RK3399 Board
  390. DRAM: 2 GiB
  391. MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
  392. Loading Environment from MMC... OK
  393. In: serial@ff1a0000
  394. Out: serial@ff1a0000
  395. Err: serial@ff1a0000
  396. Model: Orange Pi RK3399 Board
  397. Net: eth0: ethernet@fe300000
  398. Hit any key to stop autoboot: 0
  399. =>
  400. Using fastboot on rk3288
  401. ========================
  402. - Write GPT partition layout to mmc device which fastboot want to use it to
  403. store the image
  404. => gpt write mmc 1 $partitions
  405. - Invoke fastboot command to prepare
  406. => fastboot 1
  407. - Start fastboot request on PC
  408. fastboot -i 0x2207 flash loader evb-rk3288/spl/u-boot-spl-dtb.bin
  409. You should see something like:
  410. => fastboot 1
  411. WARNING: unknown variable: partition-type:loader
  412. Starting download of 357796 bytes
  413. ..
  414. downloading of 357796 bytes finished
  415. Flashing Raw Image
  416. ........ wrote 357888 bytes to 'loader'
  417. Booting from SPI
  418. ================
  419. To write an image that boots from SPI flash (e.g. for the Haier Chromebook or
  420. Bob):
  421. ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
  422. -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
  423. dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
  424. cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
  425. dd if=out.bin of=out.bin.pad bs=4M conv=sync
  426. This converts the SPL image to the required SPI format by adding the Rockchip
  427. header and skipping every second 2KB block. Then the U-Boot image is written at
  428. offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
  429. The position of U-Boot is controlled with this setting in U-Boot:
  430. #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
  431. If you have a Dediprog em100pro connected then you can write the image with:
  432. sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
  433. When booting you should see something like:
  434. U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
  435. U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
  436. Model: Google Jerry
  437. DRAM: 2 GiB
  438. MMC:
  439. Using default environment
  440. In: serial@ff690000
  441. Out: serial@ff690000
  442. Err: serial@ff690000
  443. =>
  444. Future work
  445. ===========
  446. Immediate priorities are:
  447. - USB host
  448. - USB device
  449. - Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
  450. - NAND flash
  451. - Boot U-Boot proper over USB OTG (at present only SPL works)
  452. Development Notes
  453. =================
  454. There are plenty of patches in the links below to help with this work.
  455. [1] https://github.com/rkchrome/uboot.git
  456. [2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
  457. [3] https://github.com/linux-rockchip/rkflashtool.git
  458. [4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
  459. rkimage
  460. -------
  461. rkimage.c produces an SPL image suitable for sending directly to the boot ROM
  462. over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
  463. followed by u-boot-spl-dtb.bin.
  464. The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
  465. starts at 0xff700000 and extends to 0xff718000 where we put the stack.
  466. rksd
  467. ----
  468. rksd.c produces an image consisting of 32KB of empty space, a header and
  469. u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
  470. most of the fields are unused by U-Boot. We just need to specify the
  471. signature, a flag and the block offset and size of the SPL image.
  472. The header occupies a single block but we pad it out to 4 blocks. The header
  473. is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
  474. image can be encoded too but we don't do that.
  475. The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
  476. or 0x40 blocks. This is a severe and annoying limitation. There may be a way
  477. around this limitation, since there is plenty of SRAM, but at present the
  478. board refuses to boot if this limit is exceeded.
  479. The image produced is padded up to a block boundary (512 bytes). It should be
  480. written to the start of an SD card using dd.
  481. Since this image is set to load U-Boot from the SD card at block offset,
  482. CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
  483. u-boot-dtb.img to the SD card at that offset. See above for instructions.
  484. rkspi
  485. -----
  486. rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
  487. resulting image is then spread out so that only the first 2KB of each 4KB
  488. sector is used. The header is the same as with rksd and the maximum size is
  489. also 32KB (before spreading). The image should be written to the start of
  490. SPI flash.
  491. See above for instructions on how to write a SPI image.
  492. rkmux.py
  493. --------
  494. You can use this script to create #defines for SoC register access. See the
  495. script for usage.
  496. Device tree and driver model
  497. ----------------------------
  498. Where possible driver model is used to provide a structure to the
  499. functionality. Device tree is used for configuration. However these have an
  500. overhead and in SPL with a 32KB size limit some shortcuts have been taken.
  501. In general all Rockchip drivers should use these features, with SPL-specific
  502. modifications where required.
  503. GPT partition layout
  504. ----------------------------
  505. Rockchip use a unified GPT partition layout in open source support.
  506. With this GPT partition layout, uboot can be compatilbe with other components,
  507. like miniloader, trusted-os, arm-trust-firmware.
  508. There are some documents about partitions in the links below.
  509. http://rockchip.wikidot.com/partitions
  510. --
  511. Jagan Teki <jagan@amarulasolutions.com>
  512. 27 Mar 2019
  513. Simon Glass <sjg@chromium.org>
  514. 24 June 2015