board_f.c 24 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. * (C) Copyright 2002-2006
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * (C) Copyright 2002
  8. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  9. * Marius Groeger <mgroeger@sysgo.de>
  10. */
  11. #include <common.h>
  12. #include <bloblist.h>
  13. #include <bootstage.h>
  14. #include <clock_legacy.h>
  15. #include <console.h>
  16. #include <cpu.h>
  17. #include <cpu_func.h>
  18. #include <dm.h>
  19. #include <env.h>
  20. #include <env_internal.h>
  21. #include <fdtdec.h>
  22. #include <fs.h>
  23. #include <hang.h>
  24. #include <i2c.h>
  25. #include <init.h>
  26. #include <initcall.h>
  27. #include <lcd.h>
  28. #include <log.h>
  29. #include <malloc.h>
  30. #include <mapmem.h>
  31. #include <os.h>
  32. #include <post.h>
  33. #include <relocate.h>
  34. #include <serial.h>
  35. #ifdef CONFIG_SPL
  36. #include <spl.h>
  37. #endif
  38. #include <status_led.h>
  39. #include <sysreset.h>
  40. #include <timer.h>
  41. #include <trace.h>
  42. #include <video.h>
  43. #include <watchdog.h>
  44. #include <asm/cache.h>
  45. #ifdef CONFIG_MACH_TYPE
  46. #include <asm/mach-types.h>
  47. #endif
  48. #if defined(CONFIG_MP) && defined(CONFIG_PPC)
  49. #include <asm/mp.h>
  50. #endif
  51. #include <asm/io.h>
  52. #include <asm/sections.h>
  53. #include <dm/root.h>
  54. #include <linux/errno.h>
  55. /*
  56. * Pointer to initial global data area
  57. *
  58. * Here we initialize it if needed.
  59. */
  60. #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  61. #undef XTRN_DECLARE_GLOBAL_DATA_PTR
  62. #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
  63. DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
  64. #else
  65. DECLARE_GLOBAL_DATA_PTR;
  66. #endif
  67. /*
  68. * TODO(sjg@chromium.org): IMO this code should be
  69. * refactored to a single function, something like:
  70. *
  71. * void led_set_state(enum led_colour_t colour, int on);
  72. */
  73. /************************************************************************
  74. * Coloured LED functionality
  75. ************************************************************************
  76. * May be supplied by boards if desired
  77. */
  78. __weak void coloured_LED_init(void) {}
  79. __weak void red_led_on(void) {}
  80. __weak void red_led_off(void) {}
  81. __weak void green_led_on(void) {}
  82. __weak void green_led_off(void) {}
  83. __weak void yellow_led_on(void) {}
  84. __weak void yellow_led_off(void) {}
  85. __weak void blue_led_on(void) {}
  86. __weak void blue_led_off(void) {}
  87. /*
  88. * Why is gd allocated a register? Prior to reloc it might be better to
  89. * just pass it around to each function in this file?
  90. *
  91. * After reloc one could argue that it is hardly used and doesn't need
  92. * to be in a register. Or if it is it should perhaps hold pointers to all
  93. * global data for all modules, so that post-reloc we can avoid the massive
  94. * literal pool we get on ARM. Or perhaps just encourage each module to use
  95. * a structure...
  96. */
  97. #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
  98. static int init_func_watchdog_init(void)
  99. {
  100. # if defined(CONFIG_HW_WATCHDOG) && \
  101. (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
  102. defined(CONFIG_SH) || \
  103. defined(CONFIG_DESIGNWARE_WATCHDOG) || \
  104. defined(CONFIG_IMX_WATCHDOG))
  105. hw_watchdog_init();
  106. puts(" Watchdog enabled\n");
  107. # endif
  108. WATCHDOG_RESET();
  109. return 0;
  110. }
  111. int init_func_watchdog_reset(void)
  112. {
  113. WATCHDOG_RESET();
  114. return 0;
  115. }
  116. #endif /* CONFIG_WATCHDOG */
  117. __weak void board_add_ram_info(int use_default)
  118. {
  119. /* please define platform specific board_add_ram_info() */
  120. }
  121. static int init_baud_rate(void)
  122. {
  123. gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
  124. return 0;
  125. }
  126. static int display_text_info(void)
  127. {
  128. #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
  129. ulong bss_start, bss_end, text_base;
  130. bss_start = (ulong)&__bss_start;
  131. bss_end = (ulong)&__bss_end;
  132. #ifdef CONFIG_SYS_TEXT_BASE
  133. text_base = CONFIG_SYS_TEXT_BASE;
  134. #else
  135. text_base = CONFIG_SYS_MONITOR_BASE;
  136. #endif
  137. debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
  138. text_base, bss_start, bss_end);
  139. #endif
  140. return 0;
  141. }
  142. #ifdef CONFIG_SYSRESET
  143. static int print_resetinfo(void)
  144. {
  145. struct udevice *dev;
  146. char status[256];
  147. int ret;
  148. ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
  149. if (ret) {
  150. debug("%s: No sysreset device found (error: %d)\n",
  151. __func__, ret);
  152. /* Not all boards have sysreset drivers available during early
  153. * boot, so don't fail if one can't be found.
  154. */
  155. return 0;
  156. }
  157. if (!sysreset_get_status(dev, status, sizeof(status)))
  158. printf("%s", status);
  159. return 0;
  160. }
  161. #endif
  162. #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
  163. static int print_cpuinfo(void)
  164. {
  165. struct udevice *dev;
  166. char desc[512];
  167. int ret;
  168. dev = cpu_get_current_dev();
  169. if (!dev) {
  170. debug("%s: Could not get CPU device\n",
  171. __func__);
  172. return -ENODEV;
  173. }
  174. ret = cpu_get_desc(dev, desc, sizeof(desc));
  175. if (ret) {
  176. debug("%s: Could not get CPU description (err = %d)\n",
  177. dev->name, ret);
  178. return ret;
  179. }
  180. printf("CPU: %s\n", desc);
  181. return 0;
  182. }
  183. #endif
  184. static int announce_dram_init(void)
  185. {
  186. puts("DRAM: ");
  187. return 0;
  188. }
  189. static int show_dram_config(void)
  190. {
  191. unsigned long long size;
  192. int i;
  193. debug("\nRAM Configuration:\n");
  194. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  195. size += gd->bd->bi_dram[i].size;
  196. debug("Bank #%d: %llx ", i,
  197. (unsigned long long)(gd->bd->bi_dram[i].start));
  198. #ifdef DEBUG
  199. print_size(gd->bd->bi_dram[i].size, "\n");
  200. #endif
  201. }
  202. debug("\nDRAM: ");
  203. print_size(size, "");
  204. board_add_ram_info(0);
  205. putc('\n');
  206. return 0;
  207. }
  208. __weak int dram_init_banksize(void)
  209. {
  210. gd->bd->bi_dram[0].start = gd->ram_base;
  211. gd->bd->bi_dram[0].size = get_effective_memsize();
  212. return 0;
  213. }
  214. #if defined(CONFIG_SYS_I2C)
  215. static int init_func_i2c(void)
  216. {
  217. puts("I2C: ");
  218. i2c_init_all();
  219. puts("ready\n");
  220. return 0;
  221. }
  222. #endif
  223. #if defined(CONFIG_VID)
  224. __weak int init_func_vid(void)
  225. {
  226. return 0;
  227. }
  228. #endif
  229. static int setup_mon_len(void)
  230. {
  231. #if defined(__ARM__) || defined(__MICROBLAZE__)
  232. gd->mon_len = (ulong)&__bss_end - (ulong)_start;
  233. #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
  234. gd->mon_len = (ulong)&_end - (ulong)_init;
  235. #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
  236. gd->mon_len = CONFIG_SYS_MONITOR_LEN;
  237. #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
  238. gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
  239. #elif defined(CONFIG_SYS_MONITOR_BASE)
  240. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  241. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  242. #endif
  243. return 0;
  244. }
  245. static int setup_spl_handoff(void)
  246. {
  247. #if CONFIG_IS_ENABLED(HANDOFF)
  248. gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
  249. sizeof(struct spl_handoff));
  250. debug("Found SPL hand-off info %p\n", gd->spl_handoff);
  251. #endif
  252. return 0;
  253. }
  254. __weak int arch_cpu_init(void)
  255. {
  256. return 0;
  257. }
  258. __weak int mach_cpu_init(void)
  259. {
  260. return 0;
  261. }
  262. /* Get the top of usable RAM */
  263. __weak ulong board_get_usable_ram_top(ulong total_size)
  264. {
  265. #if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
  266. /*
  267. * Detect whether we have so much RAM that it goes past the end of our
  268. * 32-bit address space. If so, clip the usable RAM so it doesn't.
  269. */
  270. if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
  271. /*
  272. * Will wrap back to top of 32-bit space when reservations
  273. * are made.
  274. */
  275. return 0;
  276. #endif
  277. return gd->ram_top;
  278. }
  279. static int setup_dest_addr(void)
  280. {
  281. debug("Monitor len: %08lX\n", gd->mon_len);
  282. /*
  283. * Ram is setup, size stored in gd !!
  284. */
  285. debug("Ram size: %08lX\n", (ulong)gd->ram_size);
  286. #if defined(CONFIG_SYS_MEM_TOP_HIDE)
  287. /*
  288. * Subtract specified amount of memory to hide so that it won't
  289. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  290. * the Linux kernel should now get passed the now "corrected"
  291. * memory size and won't touch it either. This should work
  292. * for arch/ppc and arch/powerpc. Only Linux board ports in
  293. * arch/powerpc with bootwrapper support, that recalculate the
  294. * memory size from the SDRAM controller setup will have to
  295. * get fixed.
  296. */
  297. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  298. #endif
  299. #ifdef CONFIG_SYS_SDRAM_BASE
  300. gd->ram_base = CONFIG_SYS_SDRAM_BASE;
  301. #endif
  302. gd->ram_top = gd->ram_base + get_effective_memsize();
  303. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  304. gd->relocaddr = gd->ram_top;
  305. debug("Ram top: %08lX\n", (ulong)gd->ram_top);
  306. #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  307. /*
  308. * We need to make sure the location we intend to put secondary core
  309. * boot code is reserved and not used by any part of u-boot
  310. */
  311. if (gd->relocaddr > determine_mp_bootpg(NULL)) {
  312. gd->relocaddr = determine_mp_bootpg(NULL);
  313. debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
  314. }
  315. #endif
  316. return 0;
  317. }
  318. #ifdef CONFIG_PRAM
  319. /* reserve protected RAM */
  320. static int reserve_pram(void)
  321. {
  322. ulong reg;
  323. reg = env_get_ulong("pram", 10, CONFIG_PRAM);
  324. gd->relocaddr -= (reg << 10); /* size is in kB */
  325. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  326. gd->relocaddr);
  327. return 0;
  328. }
  329. #endif /* CONFIG_PRAM */
  330. /* Round memory pointer down to next 4 kB limit */
  331. static int reserve_round_4k(void)
  332. {
  333. gd->relocaddr &= ~(4096 - 1);
  334. return 0;
  335. }
  336. __weak int arch_reserve_mmu(void)
  337. {
  338. return 0;
  339. }
  340. static int reserve_video(void)
  341. {
  342. #ifdef CONFIG_DM_VIDEO
  343. ulong addr;
  344. int ret;
  345. addr = gd->relocaddr;
  346. ret = video_reserve(&addr);
  347. if (ret)
  348. return ret;
  349. debug("Reserving %luk for video at: %08lx\n",
  350. (unsigned long)gd->relocaddr - addr, addr);
  351. gd->relocaddr = addr;
  352. #elif defined(CONFIG_LCD)
  353. # ifdef CONFIG_FB_ADDR
  354. gd->fb_base = CONFIG_FB_ADDR;
  355. # else
  356. /* reserve memory for LCD display (always full pages) */
  357. gd->relocaddr = lcd_setmem(gd->relocaddr);
  358. gd->fb_base = gd->relocaddr;
  359. # endif /* CONFIG_FB_ADDR */
  360. #endif
  361. return 0;
  362. }
  363. static int reserve_trace(void)
  364. {
  365. #ifdef CONFIG_TRACE
  366. gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
  367. gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
  368. debug("Reserving %luk for trace data at: %08lx\n",
  369. (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
  370. #endif
  371. return 0;
  372. }
  373. static int reserve_uboot(void)
  374. {
  375. if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
  376. /*
  377. * reserve memory for U-Boot code, data & bss
  378. * round down to next 4 kB limit
  379. */
  380. gd->relocaddr -= gd->mon_len;
  381. gd->relocaddr &= ~(4096 - 1);
  382. #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
  383. /* round down to next 64 kB limit so that IVPR stays aligned */
  384. gd->relocaddr &= ~(65536 - 1);
  385. #endif
  386. debug("Reserving %ldk for U-Boot at: %08lx\n",
  387. gd->mon_len >> 10, gd->relocaddr);
  388. }
  389. gd->start_addr_sp = gd->relocaddr;
  390. return 0;
  391. }
  392. /*
  393. * reserve after start_addr_sp the requested size and make the stack pointer
  394. * 16-byte aligned, this alignment is needed for cast on the reserved memory
  395. * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
  396. * = ARMv8 Instruction Set Overview: quad word, 16 bytes
  397. */
  398. static unsigned long reserve_stack_aligned(size_t size)
  399. {
  400. return ALIGN_DOWN(gd->start_addr_sp - size, 16);
  401. }
  402. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  403. static int reserve_noncached(void)
  404. {
  405. /*
  406. * The value of gd->start_addr_sp must match the value of malloc_start
  407. * calculated in boatrd_f.c:initr_malloc(), which is passed to
  408. * board_r.c:mem_malloc_init() and then used by
  409. * cache.c:noncached_init()
  410. *
  411. * These calculations must match the code in cache.c:noncached_init()
  412. */
  413. gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
  414. MMU_SECTION_SIZE;
  415. gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
  416. MMU_SECTION_SIZE);
  417. debug("Reserving %dM for noncached_alloc() at: %08lx\n",
  418. CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
  419. return 0;
  420. }
  421. #endif
  422. /* reserve memory for malloc() area */
  423. static int reserve_malloc(void)
  424. {
  425. gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
  426. debug("Reserving %dk for malloc() at: %08lx\n",
  427. TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
  428. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  429. reserve_noncached();
  430. #endif
  431. return 0;
  432. }
  433. /* (permanently) allocate a Board Info struct */
  434. static int reserve_board(void)
  435. {
  436. if (!gd->bd) {
  437. gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
  438. gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
  439. sizeof(struct bd_info));
  440. memset(gd->bd, '\0', sizeof(struct bd_info));
  441. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  442. sizeof(struct bd_info), gd->start_addr_sp);
  443. }
  444. return 0;
  445. }
  446. static int setup_machine(void)
  447. {
  448. #ifdef CONFIG_MACH_TYPE
  449. gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
  450. #endif
  451. return 0;
  452. }
  453. static int reserve_global_data(void)
  454. {
  455. gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
  456. gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
  457. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  458. sizeof(gd_t), gd->start_addr_sp);
  459. return 0;
  460. }
  461. static int reserve_fdt(void)
  462. {
  463. #ifndef CONFIG_OF_EMBED
  464. /*
  465. * If the device tree is sitting immediately above our image then we
  466. * must relocate it. If it is embedded in the data section, then it
  467. * will be relocated with other data.
  468. */
  469. if (gd->fdt_blob) {
  470. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
  471. gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
  472. gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
  473. debug("Reserving %lu Bytes for FDT at: %08lx\n",
  474. gd->fdt_size, gd->start_addr_sp);
  475. }
  476. #endif
  477. return 0;
  478. }
  479. static int reserve_bootstage(void)
  480. {
  481. #ifdef CONFIG_BOOTSTAGE
  482. int size = bootstage_get_size();
  483. gd->start_addr_sp = reserve_stack_aligned(size);
  484. gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
  485. debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
  486. gd->start_addr_sp);
  487. #endif
  488. return 0;
  489. }
  490. __weak int arch_reserve_stacks(void)
  491. {
  492. return 0;
  493. }
  494. static int reserve_stacks(void)
  495. {
  496. /* make stack pointer 16-byte aligned */
  497. gd->start_addr_sp = reserve_stack_aligned(16);
  498. /*
  499. * let the architecture-specific code tailor gd->start_addr_sp and
  500. * gd->irq_sp
  501. */
  502. return arch_reserve_stacks();
  503. }
  504. static int reserve_bloblist(void)
  505. {
  506. #ifdef CONFIG_BLOBLIST
  507. /* Align to a 4KB boundary for easier reading of addresses */
  508. gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp - CONFIG_BLOBLIST_SIZE,
  509. 0x1000);
  510. gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
  511. #endif
  512. return 0;
  513. }
  514. static int display_new_sp(void)
  515. {
  516. debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
  517. return 0;
  518. }
  519. __weak int arch_setup_bdinfo(void)
  520. {
  521. return 0;
  522. }
  523. int setup_bdinfo(void)
  524. {
  525. struct bd_info *bd = gd->bd;
  526. if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
  527. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  528. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  529. }
  530. return arch_setup_bdinfo();
  531. }
  532. #ifdef CONFIG_POST
  533. static int init_post(void)
  534. {
  535. post_bootmode_init();
  536. post_run(NULL, POST_ROM | post_bootmode_get(0));
  537. return 0;
  538. }
  539. #endif
  540. static int reloc_fdt(void)
  541. {
  542. #ifndef CONFIG_OF_EMBED
  543. if (gd->flags & GD_FLG_SKIP_RELOC)
  544. return 0;
  545. if (gd->new_fdt) {
  546. memcpy(gd->new_fdt, gd->fdt_blob, fdt_totalsize(gd->fdt_blob));
  547. gd->fdt_blob = gd->new_fdt;
  548. }
  549. #endif
  550. return 0;
  551. }
  552. static int reloc_bootstage(void)
  553. {
  554. #ifdef CONFIG_BOOTSTAGE
  555. if (gd->flags & GD_FLG_SKIP_RELOC)
  556. return 0;
  557. if (gd->new_bootstage) {
  558. int size = bootstage_get_size();
  559. debug("Copying bootstage from %p to %p, size %x\n",
  560. gd->bootstage, gd->new_bootstage, size);
  561. memcpy(gd->new_bootstage, gd->bootstage, size);
  562. gd->bootstage = gd->new_bootstage;
  563. bootstage_relocate();
  564. }
  565. #endif
  566. return 0;
  567. }
  568. static int reloc_bloblist(void)
  569. {
  570. #ifdef CONFIG_BLOBLIST
  571. if (gd->flags & GD_FLG_SKIP_RELOC)
  572. return 0;
  573. if (gd->new_bloblist) {
  574. int size = CONFIG_BLOBLIST_SIZE;
  575. debug("Copying bloblist from %p to %p, size %x\n",
  576. gd->bloblist, gd->new_bloblist, size);
  577. memcpy(gd->new_bloblist, gd->bloblist, size);
  578. gd->bloblist = gd->new_bloblist;
  579. }
  580. #endif
  581. return 0;
  582. }
  583. static int setup_reloc(void)
  584. {
  585. if (gd->flags & GD_FLG_SKIP_RELOC) {
  586. debug("Skipping relocation due to flag\n");
  587. return 0;
  588. }
  589. #ifdef CONFIG_SYS_TEXT_BASE
  590. #ifdef ARM
  591. gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
  592. #elif defined(CONFIG_M68K)
  593. /*
  594. * On all ColdFire arch cpu, monitor code starts always
  595. * just after the default vector table location, so at 0x400
  596. */
  597. gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
  598. #elif !defined(CONFIG_SANDBOX)
  599. gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
  600. #endif
  601. #endif
  602. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  603. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  604. debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
  605. gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
  606. gd->start_addr_sp);
  607. return 0;
  608. }
  609. #ifdef CONFIG_OF_BOARD_FIXUP
  610. static int fix_fdt(void)
  611. {
  612. return board_fix_fdt((void *)gd->fdt_blob);
  613. }
  614. #endif
  615. /* ARM calls relocate_code from its crt0.S */
  616. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  617. !CONFIG_IS_ENABLED(X86_64)
  618. static int jump_to_copy(void)
  619. {
  620. if (gd->flags & GD_FLG_SKIP_RELOC)
  621. return 0;
  622. /*
  623. * x86 is special, but in a nice way. It uses a trampoline which
  624. * enables the dcache if possible.
  625. *
  626. * For now, other archs use relocate_code(), which is implemented
  627. * similarly for all archs. When we do generic relocation, hopefully
  628. * we can make all archs enable the dcache prior to relocation.
  629. */
  630. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  631. /*
  632. * SDRAM and console are now initialised. The final stack can now
  633. * be setup in SDRAM. Code execution will continue in Flash, but
  634. * with the stack in SDRAM and Global Data in temporary memory
  635. * (CPU cache)
  636. */
  637. arch_setup_gd(gd->new_gd);
  638. board_init_f_r_trampoline(gd->start_addr_sp);
  639. #else
  640. relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
  641. #endif
  642. return 0;
  643. }
  644. #endif
  645. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  646. static int initf_bootstage(void)
  647. {
  648. bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
  649. IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
  650. int ret;
  651. ret = bootstage_init(!from_spl);
  652. if (ret)
  653. return ret;
  654. if (from_spl) {
  655. const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
  656. CONFIG_BOOTSTAGE_STASH_SIZE);
  657. ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
  658. if (ret && ret != -ENOENT) {
  659. debug("Failed to unstash bootstage: err=%d\n", ret);
  660. return ret;
  661. }
  662. }
  663. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  664. return 0;
  665. }
  666. static int initf_console_record(void)
  667. {
  668. #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  669. return console_record_init();
  670. #else
  671. return 0;
  672. #endif
  673. }
  674. static int initf_dm(void)
  675. {
  676. #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  677. int ret;
  678. bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
  679. ret = dm_init_and_scan(true);
  680. bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
  681. if (ret)
  682. return ret;
  683. #endif
  684. #ifdef CONFIG_TIMER_EARLY
  685. ret = dm_timer_init();
  686. if (ret)
  687. return ret;
  688. #endif
  689. return 0;
  690. }
  691. /* Architecture-specific memory reservation */
  692. __weak int reserve_arch(void)
  693. {
  694. return 0;
  695. }
  696. __weak int arch_cpu_init_dm(void)
  697. {
  698. return 0;
  699. }
  700. #if defined(CONFIG_TARGET_STARFIVE_VIC7100)
  701. extern int board_hw_init(void);
  702. #endif
  703. __weak int checkcpu(void)
  704. {
  705. return 0;
  706. }
  707. __weak int clear_bss(void)
  708. {
  709. return 0;
  710. }
  711. static const init_fnc_t init_sequence_f[] = {
  712. setup_mon_len,
  713. #ifdef CONFIG_OF_CONTROL
  714. fdtdec_setup,
  715. #endif
  716. #ifdef CONFIG_TRACE_EARLY
  717. trace_early_init,
  718. #endif
  719. initf_malloc,
  720. log_init,
  721. initf_bootstage, /* uses its own timer, so does not need DM */
  722. #ifdef CONFIG_BLOBLIST
  723. bloblist_init,
  724. #endif
  725. setup_spl_handoff,
  726. initf_console_record,
  727. #if defined(CONFIG_HAVE_FSP)
  728. arch_fsp_init,
  729. #endif
  730. arch_cpu_init, /* basic arch cpu dependent setup */
  731. mach_cpu_init, /* SoC/machine dependent CPU setup */
  732. initf_dm,
  733. arch_cpu_init_dm,
  734. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  735. board_early_init_f,
  736. #endif
  737. #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
  738. /* get CPU and bus clocks according to the environment variable */
  739. get_clocks, /* get CPU and bus clocks (etc.) */
  740. #endif
  741. #if !defined(CONFIG_M68K)
  742. timer_init, /* initialize timer */
  743. #endif
  744. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  745. board_postclk_init,
  746. #endif
  747. env_init, /* initialize environment */
  748. init_baud_rate, /* initialze baudrate settings */
  749. serial_init, /* serial communications setup */
  750. console_init_f, /* stage 1 init of console */
  751. display_options, /* say that we are here */
  752. display_text_info, /* show debugging info if required */
  753. checkcpu,
  754. #if defined(CONFIG_SYSRESET)
  755. print_resetinfo,
  756. #endif
  757. #if defined(CONFIG_DISPLAY_CPUINFO)
  758. print_cpuinfo, /* display cpu info (and speed) */
  759. #endif
  760. #if defined(CONFIG_DTB_RESELECT)
  761. embedded_dtb_select,
  762. #endif
  763. #if defined(CONFIG_DISPLAY_BOARDINFO)
  764. show_board_info,
  765. #endif
  766. INIT_FUNC_WATCHDOG_INIT
  767. #if defined(CONFIG_MISC_INIT_F)
  768. misc_init_f,
  769. #endif
  770. INIT_FUNC_WATCHDOG_RESET
  771. #if defined(CONFIG_SYS_I2C)
  772. init_func_i2c,
  773. #endif
  774. #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
  775. init_func_vid,
  776. #endif
  777. announce_dram_init,
  778. dram_init, /* configure available RAM banks */
  779. #ifdef CONFIG_POST
  780. post_init_f,
  781. #endif
  782. INIT_FUNC_WATCHDOG_RESET
  783. #if defined(CONFIG_SYS_DRAM_TEST)
  784. testdram,
  785. #endif /* CONFIG_SYS_DRAM_TEST */
  786. INIT_FUNC_WATCHDOG_RESET
  787. #ifdef CONFIG_POST
  788. init_post,
  789. #endif
  790. INIT_FUNC_WATCHDOG_RESET
  791. /*
  792. * Now that we have DRAM mapped and working, we can
  793. * relocate the code and continue running from DRAM.
  794. *
  795. * Reserve memory at end of RAM for (top down in that order):
  796. * - area that won't get touched by U-Boot and Linux (optional)
  797. * - kernel log buffer
  798. * - protected RAM
  799. * - LCD framebuffer
  800. * - monitor code
  801. * - board info struct
  802. */
  803. setup_dest_addr,
  804. #ifdef CONFIG_OF_BOARD_FIXUP
  805. fix_fdt,
  806. #endif
  807. #ifdef CONFIG_PRAM
  808. reserve_pram,
  809. #endif
  810. reserve_round_4k,
  811. arch_reserve_mmu,
  812. reserve_video,
  813. reserve_trace,
  814. reserve_uboot,
  815. reserve_malloc,
  816. reserve_board,
  817. setup_machine,
  818. reserve_global_data,
  819. reserve_fdt,
  820. reserve_bootstage,
  821. reserve_bloblist,
  822. reserve_arch,
  823. reserve_stacks,
  824. dram_init_banksize,
  825. show_dram_config,
  826. INIT_FUNC_WATCHDOG_RESET
  827. setup_bdinfo,
  828. display_new_sp,
  829. INIT_FUNC_WATCHDOG_RESET
  830. reloc_fdt,
  831. reloc_bootstage,
  832. reloc_bloblist,
  833. setup_reloc,
  834. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  835. copy_uboot_to_ram,
  836. do_elf_reloc_fixups,
  837. #endif
  838. clear_bss,
  839. #if defined(CONFIG_TARGET_STARFIVE_VIC7100)
  840. board_hw_init,
  841. #endif
  842. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  843. !CONFIG_IS_ENABLED(X86_64)
  844. jump_to_copy,
  845. #endif
  846. NULL,
  847. };
  848. void board_init_f(ulong boot_flags)
  849. {
  850. gd->flags = boot_flags;
  851. gd->have_console = 0;
  852. if (initcall_run_list(init_sequence_f))
  853. hang();
  854. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  855. !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
  856. !defined(CONFIG_ARC)
  857. /* NOTREACHED - jump_to_copy() does not return */
  858. hang();
  859. #endif
  860. }
  861. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  862. /*
  863. * For now this code is only used on x86.
  864. *
  865. * init_sequence_f_r is the list of init functions which are run when
  866. * U-Boot is executing from Flash with a semi-limited 'C' environment.
  867. * The following limitations must be considered when implementing an
  868. * '_f_r' function:
  869. * - 'static' variables are read-only
  870. * - Global Data (gd->xxx) is read/write
  871. *
  872. * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
  873. * supported). It _should_, if possible, copy global data to RAM and
  874. * initialise the CPU caches (to speed up the relocation process)
  875. *
  876. * NOTE: At present only x86 uses this route, but it is intended that
  877. * all archs will move to this when generic relocation is implemented.
  878. */
  879. static const init_fnc_t init_sequence_f_r[] = {
  880. #if !CONFIG_IS_ENABLED(X86_64)
  881. init_cache_f_r,
  882. #endif
  883. NULL,
  884. };
  885. void board_init_f_r(void)
  886. {
  887. if (initcall_run_list(init_sequence_f_r))
  888. hang();
  889. /*
  890. * The pre-relocation drivers may be using memory that has now gone
  891. * away. Mark serial as unavailable - this will fall back to the debug
  892. * UART if available.
  893. *
  894. * Do the same with log drivers since the memory may not be available.
  895. */
  896. gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
  897. #ifdef CONFIG_TIMER
  898. gd->timer = NULL;
  899. #endif
  900. /*
  901. * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
  902. * Transfer execution from Flash to RAM by calculating the address
  903. * of the in-RAM copy of board_init_r() and calling it
  904. */
  905. (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
  906. /* NOTREACHED - board_init_r() does not return */
  907. hang();
  908. }
  909. #endif /* CONFIG_X86 */