warp.c 3.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2014, 2015 O.S. Systems Software LTDA.
  4. * Copyright (C) 2014 Kynetics LLC.
  5. * Copyright (C) 2014 Revolution Robotics, Inc.
  6. *
  7. * Author: Otavio Salvador <otavio@ossystems.com.br>
  8. */
  9. #include <init.h>
  10. #include <asm/arch/clock.h>
  11. #include <asm/arch/iomux.h>
  12. #include <asm/arch/imx-regs.h>
  13. #include <asm/arch/mx6-pins.h>
  14. #include <asm/arch/sys_proto.h>
  15. #include <asm/gpio.h>
  16. #include <asm/mach-imx/iomux-v3.h>
  17. #include <asm/mach-imx/mxc_i2c.h>
  18. #include <asm/io.h>
  19. #include <linux/sizes.h>
  20. #include <common.h>
  21. #include <watchdog.h>
  22. #include <fsl_esdhc_imx.h>
  23. #include <i2c.h>
  24. #include <mmc.h>
  25. #include <usb.h>
  26. #include <power/pmic.h>
  27. #include <power/max77696_pmic.h>
  28. DECLARE_GLOBAL_DATA_PTR;
  29. #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
  30. PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
  31. PAD_CTL_SRE_FAST | PAD_CTL_HYS | \
  32. PAD_CTL_LVE)
  33. #define USDHC_PAD_CTRL (PAD_CTL_PUS_22K_UP | \
  34. PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
  35. PAD_CTL_SRE_FAST | PAD_CTL_HYS | \
  36. PAD_CTL_LVE)
  37. #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
  38. PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
  39. PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
  40. PAD_CTL_ODE | PAD_CTL_SRE_FAST)
  41. int dram_init(void)
  42. {
  43. gd->ram_size = imx_ddr_size();
  44. return 0;
  45. }
  46. static void setup_iomux_uart(void)
  47. {
  48. static iomux_v3_cfg_t const uart1_pads[] = {
  49. MX6_PAD_UART1_TXD__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
  50. MX6_PAD_UART1_RXD__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
  51. };
  52. imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
  53. }
  54. static struct fsl_esdhc_cfg usdhc_cfg[1] = {
  55. {USDHC2_BASE_ADDR, 0, 0, 0, 1},
  56. };
  57. int board_mmc_getcd(struct mmc *mmc)
  58. {
  59. return 1; /* Assume boot SD always present */
  60. }
  61. int board_mmc_init(struct bd_info *bis)
  62. {
  63. static iomux_v3_cfg_t const usdhc2_pads[] = {
  64. MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  65. MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  66. MX6_PAD_SD2_RST__USDHC2_RST | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  67. MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  68. MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  69. MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  70. MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  71. MX6_PAD_SD2_DAT4__USDHC2_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  72. MX6_PAD_SD2_DAT5__USDHC2_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  73. MX6_PAD_SD2_DAT6__USDHC2_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  74. MX6_PAD_SD2_DAT7__USDHC2_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  75. };
  76. imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
  77. usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
  78. return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
  79. }
  80. int board_usb_phy_mode(int port)
  81. {
  82. return USB_INIT_DEVICE;
  83. }
  84. /* I2C1 for PMIC */
  85. #define I2C_PMIC 0
  86. #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
  87. struct i2c_pads_info i2c_pad_info1 = {
  88. .sda = {
  89. .i2c_mode = MX6_PAD_I2C1_SDA__I2C1_SDA | PC,
  90. .gpio_mode = MX6_PAD_I2C1_SDA__GPIO_3_13 | PC,
  91. .gp = IMX_GPIO_NR(3, 13),
  92. },
  93. .scl = {
  94. .i2c_mode = MX6_PAD_I2C1_SCL__I2C1_SCL | PC,
  95. .gpio_mode = MX6_PAD_I2C1_SCL__GPIO_3_12 | PC,
  96. .gp = IMX_GPIO_NR(3, 12),
  97. },
  98. };
  99. int power_init_board(void)
  100. {
  101. struct pmic *p;
  102. int ret;
  103. unsigned int reg;
  104. ret = power_max77696_init(I2C_PMIC);
  105. if (ret)
  106. return ret;
  107. p = pmic_get("MAX77696");
  108. if (!p)
  109. return -EINVAL;
  110. ret = pmic_reg_read(p, CID, &reg);
  111. if (ret)
  112. return ret;
  113. printf("PMIC: MAX77696 detected, rev=0x%x\n", reg);
  114. return pmic_probe(p);
  115. }
  116. int board_early_init_f(void)
  117. {
  118. setup_iomux_uart();
  119. return 0;
  120. }
  121. int board_init(void)
  122. {
  123. /* address of boot parameters */
  124. gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
  125. setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
  126. return 0;
  127. }
  128. int board_late_init(void)
  129. {
  130. #ifdef CONFIG_HW_WATCHDOG
  131. hw_watchdog_init();
  132. #endif
  133. return 0;
  134. }
  135. int checkboard(void)
  136. {
  137. puts("Board: WaRP Board\n");
  138. return 0;
  139. }