cyrus.c 2.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Based on corenet_ds.c
  4. */
  5. #include <common.h>
  6. #include <command.h>
  7. #include <env.h>
  8. #include <fdt_support.h>
  9. #include <image.h>
  10. #include <init.h>
  11. #include <netdev.h>
  12. #include <linux/compiler.h>
  13. #include <asm/mmu.h>
  14. #include <asm/processor.h>
  15. #include <asm/cache.h>
  16. #include <asm/immap_85xx.h>
  17. #include <asm/fsl_law.h>
  18. #include <asm/fsl_serdes.h>
  19. #include <asm/fsl_portals.h>
  20. #include <asm/fsl_liodn.h>
  21. #include <fm_eth.h>
  22. #include <pci.h>
  23. #include "cyrus.h"
  24. #include "../common/eeprom.h"
  25. #define GPIO_OPENDRAIN 0x30000000
  26. #define GPIO_DIR 0x3c000004
  27. #define GPIO_INITIAL 0x30000000
  28. #define GPIO_VGA_SWITCH 0x00001000
  29. int checkboard(void)
  30. {
  31. printf("Board: CYRUS\n");
  32. return 0;
  33. }
  34. int board_early_init_f(void)
  35. {
  36. ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  37. ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
  38. /*
  39. * Only use DDR1_MCK0/3 and DDR2_MCK0/3
  40. * disable DDR1_MCK1/2/4/5 and DDR2_MCK1/2/4/5 to reduce
  41. * the noise introduced by these unterminated and unused clock pairs.
  42. */
  43. setbits_be32(&gur->ddrclkdr, 0x001B001B);
  44. /* Set GPIO reset lines to open-drain, tristate */
  45. setbits_be32(&pgpio->gpdat, GPIO_INITIAL);
  46. setbits_be32(&pgpio->gpodr, GPIO_OPENDRAIN);
  47. /* Set GPIO Direction */
  48. setbits_be32(&pgpio->gpdir, GPIO_DIR);
  49. return 0;
  50. }
  51. int board_early_init_r(void)
  52. {
  53. fsl_lbc_t *lbc = LBC_BASE_ADDR;
  54. out_be32(&lbc->lbcr, 0);
  55. /* 1 clock LALE cycle */
  56. out_be32(&lbc->lcrr, 0x80000000 | CONFIG_SYS_LBC_LCRR);
  57. set_liodns();
  58. #ifdef CONFIG_SYS_DPAA_QBMAN
  59. setup_qbman_portals();
  60. #endif
  61. print_lbc_regs();
  62. return 0;
  63. }
  64. int misc_init_r(void)
  65. {
  66. return 0;
  67. }
  68. int ft_board_setup(void *blob, struct bd_info *bd)
  69. {
  70. phys_addr_t base;
  71. phys_size_t size;
  72. ft_cpu_setup(blob, bd);
  73. base = env_get_bootm_low();
  74. size = env_get_bootm_size();
  75. fdt_fixup_memory(blob, (u64)base, (u64)size);
  76. #ifdef CONFIG_PCI
  77. pci_of_setup(blob, bd);
  78. #endif
  79. fdt_fixup_liodn(blob);
  80. fsl_fdt_fixup_dr_usb(blob, bd);
  81. #ifdef CONFIG_SYS_DPAA_FMAN
  82. fdt_fixup_fman_ethernet(blob);
  83. #endif
  84. return 0;
  85. }
  86. int mac_read_from_eeprom(void)
  87. {
  88. init_eeprom(CONFIG_SYS_EEPROM_BUS_NUM,
  89. CONFIG_SYS_I2C_EEPROM_ADDR,
  90. CONFIG_SYS_I2C_EEPROM_ADDR_LEN);
  91. return mac_read_from_eeprom_common();
  92. }