verdin-imx8mm.c 4.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2020 Toradex
  4. */
  5. #include <common.h>
  6. #include <init.h>
  7. #include <asm/arch/clock.h>
  8. #include <asm/arch/sys_proto.h>
  9. #include <asm/io.h>
  10. #include <i2c.h>
  11. #include <miiphy.h>
  12. #include <netdev.h>
  13. #include <micrel.h>
  14. #include "../common/tdx-cfg-block.h"
  15. DECLARE_GLOBAL_DATA_PTR;
  16. #define I2C_PMIC 0
  17. enum pcb_rev_t {
  18. PCB_VERSION_1_0,
  19. PCB_VERSION_1_1
  20. };
  21. #if IS_ENABLED(CONFIG_FEC_MXC)
  22. static int setup_fec(void)
  23. {
  24. struct iomuxc_gpr_base_regs *gpr =
  25. (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
  26. /* Use 125M anatop REF_CLK1 for ENET1, not from external */
  27. clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
  28. return 0;
  29. }
  30. int board_phy_config(struct phy_device *phydev)
  31. {
  32. int tmp;
  33. switch (ksz9xx1_phy_get_id(phydev) & MII_KSZ9x31_SILICON_REV_MASK) {
  34. case PHY_ID_KSZ9031:
  35. /*
  36. * The PHY adds 1.2ns for the RXC and 0ns for TXC clock by
  37. * default. The MAC and the layout don't add a skew between
  38. * clock and data.
  39. * Add 0.3ns for the RXC path and 0.96 + 0.42 ns (1.38 ns) for
  40. * the TXC path to get the required clock skews.
  41. */
  42. /* control data pad skew - devaddr = 0x02, register = 0x04 */
  43. ksz9031_phy_extended_write(phydev, 0x02,
  44. MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
  45. MII_KSZ9031_MOD_DATA_NO_POST_INC,
  46. 0x0070);
  47. /* rx data pad skew - devaddr = 0x02, register = 0x05 */
  48. ksz9031_phy_extended_write(phydev, 0x02,
  49. MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
  50. MII_KSZ9031_MOD_DATA_NO_POST_INC,
  51. 0x7777);
  52. /* tx data pad skew - devaddr = 0x02, register = 0x06 */
  53. ksz9031_phy_extended_write(phydev, 0x02,
  54. MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
  55. MII_KSZ9031_MOD_DATA_NO_POST_INC,
  56. 0x0000);
  57. /* gtx and rx clock pad skew - devaddr = 0x02,register = 0x08 */
  58. ksz9031_phy_extended_write(phydev, 0x02,
  59. MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
  60. MII_KSZ9031_MOD_DATA_NO_POST_INC,
  61. 0x03f4);
  62. break;
  63. case PHY_ID_KSZ9131:
  64. default:
  65. /* read rxc dll control - devaddr = 0x2, register = 0x4c */
  66. tmp = ksz9031_phy_extended_read(phydev, 0x02,
  67. MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL,
  68. MII_KSZ9031_MOD_DATA_NO_POST_INC);
  69. /* disable rxdll bypass (enable 2ns skew delay on RXC) */
  70. tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS;
  71. /* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4c */
  72. tmp = ksz9031_phy_extended_write(phydev, 0x02,
  73. MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL,
  74. MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp);
  75. /* read txc dll control - devaddr = 0x02, register = 0x4d */
  76. tmp = ksz9031_phy_extended_read(phydev, 0x02,
  77. MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL,
  78. MII_KSZ9031_MOD_DATA_NO_POST_INC);
  79. /* disable txdll bypass (enable 2ns skew delay on TXC) */
  80. tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS;
  81. /* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4d */
  82. tmp = ksz9031_phy_extended_write(phydev, 0x02,
  83. MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL,
  84. MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp);
  85. break;
  86. }
  87. if (phydev->drv->config)
  88. phydev->drv->config(phydev);
  89. return 0;
  90. }
  91. #endif
  92. int board_init(void)
  93. {
  94. if (IS_ENABLED(CONFIG_FEC_MXC))
  95. setup_fec();
  96. return 0;
  97. }
  98. int board_mmc_get_env_dev(int devno)
  99. {
  100. return devno;
  101. }
  102. static enum pcb_rev_t get_pcb_revision(void)
  103. {
  104. struct udevice *bus;
  105. struct udevice *i2c_dev = NULL;
  106. int ret;
  107. u8 is_bd71837 = 0;
  108. ret = uclass_get_device_by_seq(UCLASS_I2C, I2C_PMIC, &bus);
  109. if (!ret)
  110. ret = dm_i2c_probe(bus, 0x4b, 0, &i2c_dev);
  111. if (!ret)
  112. ret = dm_i2c_read(i2c_dev, 0x0, &is_bd71837, 1);
  113. /* BD71837_REV, High Nibble is major version, fix 1010 */
  114. is_bd71837 = !ret && ((is_bd71837 & 0xf0) == 0xa0);
  115. return is_bd71837 ? PCB_VERSION_1_0 : PCB_VERSION_1_1;
  116. }
  117. static void select_dt_from_module_version(void)
  118. {
  119. char variant[32];
  120. char *env_variant = env_get("variant");
  121. int is_wifi = 0;
  122. if (IS_ENABLED(CONFIG_TDX_CFG_BLOCK)) {
  123. /*
  124. * If we have a valid config block and it says we are a
  125. * module with Wi-Fi/Bluetooth make sure we use the -wifi
  126. * device tree.
  127. */
  128. is_wifi = (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_WIFI_BT_IT) ||
  129. (tdx_hw_tag.prodid == VERDIN_IMX8MMDL_WIFI_BT_IT);
  130. }
  131. switch (get_pcb_revision()) {
  132. case PCB_VERSION_1_0:
  133. printf("Detected a V1.0 module\n");
  134. if (is_wifi)
  135. strncpy(&variant[0], "wifi", sizeof(variant));
  136. else
  137. strncpy(&variant[0], "nonwifi", sizeof(variant));
  138. break;
  139. default:
  140. if (is_wifi)
  141. strncpy(&variant[0], "wifi-v1.1", sizeof(variant));
  142. else
  143. strncpy(&variant[0], "nonwifi-v1.1", sizeof(variant));
  144. break;
  145. }
  146. if (strcmp(variant, env_variant)) {
  147. printf("Setting variant to %s\n", variant);
  148. env_set("variant", variant);
  149. if (IS_ENABLED(CONFIG_ENV_IS_NOWHERE))
  150. env_save();
  151. }
  152. }
  153. int board_late_init(void)
  154. {
  155. select_dt_from_module_version();
  156. return 0;
  157. }
  158. int board_phys_sdram_size(phys_size_t *size)
  159. {
  160. if (!size)
  161. return -EINVAL;
  162. *size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
  163. return 0;
  164. }
  165. #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
  166. int ft_board_setup(void *blob, struct bd_info *bd)
  167. {
  168. return 0;
  169. }
  170. #endif