emsdp.c 3.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018 Synopsys, Inc. All rights reserved.
  4. */
  5. #include <common.h>
  6. #include <command.h>
  7. #include <cpu_func.h>
  8. #include <dwmmc.h>
  9. #include <init.h>
  10. #include <malloc.h>
  11. #include <linux/bitops.h>
  12. #include <asm/arcregs.h>
  13. DECLARE_GLOBAL_DATA_PTR;
  14. #define ARC_PERIPHERAL_BASE 0xF0000000
  15. #define CGU_ARC_FMEAS_ARC (void *)(ARC_PERIPHERAL_BASE + 0x84)
  16. #define CGU_ARC_FMEAS_ARC_START BIT(31)
  17. #define CGU_ARC_FMEAS_ARC_DONE BIT(30)
  18. #define CGU_ARC_FMEAS_ARC_CNT_MASK GENMASK(14, 0)
  19. #define CGU_ARC_FMEAS_ARC_RCNT_OFFSET 0
  20. #define CGU_ARC_FMEAS_ARC_FCNT_OFFSET 15
  21. #define SDIO_BASE (void *)(ARC_PERIPHERAL_BASE + 0x10000)
  22. int mach_cpu_init(void)
  23. {
  24. int rcnt, fcnt;
  25. u32 data;
  26. /* Start frequency measurement */
  27. writel(CGU_ARC_FMEAS_ARC_START, CGU_ARC_FMEAS_ARC);
  28. /* Poll DONE bit */
  29. do {
  30. data = readl(CGU_ARC_FMEAS_ARC);
  31. } while (!(data & CGU_ARC_FMEAS_ARC_DONE));
  32. /* Amount of reference 100 MHz clocks */
  33. rcnt = ((data >> CGU_ARC_FMEAS_ARC_RCNT_OFFSET) &
  34. CGU_ARC_FMEAS_ARC_CNT_MASK);
  35. /* Amount of CPU clocks */
  36. fcnt = ((data >> CGU_ARC_FMEAS_ARC_FCNT_OFFSET) &
  37. CGU_ARC_FMEAS_ARC_CNT_MASK);
  38. gd->cpu_clk = ((100 * fcnt) / rcnt) * 1000000;
  39. return 0;
  40. }
  41. int board_early_init_r(void)
  42. {
  43. #define EMSDP_PSRAM_BASE 0xf2001000
  44. #define PSRAM_FLASH_CONFIG_REG_0 (void *)(EMSDP_PSRAM_BASE + 0x10)
  45. #define PSRAM_FLASH_CONFIG_REG_1 (void *)(EMSDP_PSRAM_BASE + 0x14)
  46. #define CRE_ENABLE BIT(31)
  47. #define CRE_DRIVE_CMD BIT(6)
  48. #define PSRAM_RCR_DPD BIT(1)
  49. #define PSRAM_RCR_PAGE_MODE BIT(7)
  50. /*
  51. * PSRAM_FLASH_CONFIG_REG_x[30:15] to the address lines[16:1] of flash,
  52. * thus "<< 1".
  53. */
  54. #define PSRAM_RCR_SETUP ((PSRAM_RCR_DPD | PSRAM_RCR_PAGE_MODE) << 1)
  55. // Switch PSRAM controller to command mode
  56. writel(CRE_ENABLE | CRE_DRIVE_CMD, PSRAM_FLASH_CONFIG_REG_0);
  57. // Program Refresh Configuration Register (RCR) for BANK0
  58. writew(0, (void *)(0x10000000 + PSRAM_RCR_SETUP));
  59. // Switch PSRAM controller back to memory mode
  60. writel(0, PSRAM_FLASH_CONFIG_REG_0);
  61. // Switch PSRAM controller to command mode
  62. writel(CRE_ENABLE | CRE_DRIVE_CMD, PSRAM_FLASH_CONFIG_REG_1);
  63. // Program Refresh Configuration Register (RCR) for BANK1
  64. writew(0, (void *)(0x10800000 + PSRAM_RCR_SETUP));
  65. // Switch PSRAM controller back to memory mode
  66. writel(0, PSRAM_FLASH_CONFIG_REG_1);
  67. printf("PSRAM initialized.\n");
  68. return 0;
  69. }
  70. #define CREG_BASE 0xF0001000
  71. #define CREG_BOOT (void *)(CREG_BASE + 0x0FF0)
  72. #define CREG_IP_SW_RESET (void *)(CREG_BASE + 0x0FF0)
  73. #define CREG_IP_VERSION (void *)(CREG_BASE + 0x0FF8)
  74. /* Bits in CREG_BOOT register */
  75. #define CREG_BOOT_WP_BIT BIT(8)
  76. void reset_cpu(ulong addr)
  77. {
  78. writel(1, CREG_IP_SW_RESET);
  79. while (1)
  80. ; /* loop forever till reset */
  81. }
  82. static int do_emsdp_rom(struct cmd_tbl *cmdtp, int flag, int argc,
  83. char *const argv[])
  84. {
  85. u32 creg_boot = readl(CREG_BOOT);
  86. if (!strcmp(argv[1], "unlock"))
  87. creg_boot &= ~CREG_BOOT_WP_BIT;
  88. else if (!strcmp(argv[1], "lock"))
  89. creg_boot |= CREG_BOOT_WP_BIT;
  90. else
  91. return CMD_RET_USAGE;
  92. writel(creg_boot, CREG_BOOT);
  93. return CMD_RET_SUCCESS;
  94. }
  95. struct cmd_tbl cmd_emsdp[] = {
  96. U_BOOT_CMD_MKENT(rom, 2, 0, do_emsdp_rom, "", ""),
  97. };
  98. static int do_emsdp(struct cmd_tbl *cmdtp, int flag, int argc,
  99. char *const argv[])
  100. {
  101. struct cmd_tbl *c;
  102. c = find_cmd_tbl(argv[1], cmd_emsdp, ARRAY_SIZE(cmd_emsdp));
  103. /* Strip off leading 'emsdp' command */
  104. argc--;
  105. argv++;
  106. if (c == NULL || argc > c->maxargs)
  107. return CMD_RET_USAGE;
  108. return c->cmd(cmdtp, flag, argc, argv);
  109. }
  110. U_BOOT_CMD(
  111. emsdp, CONFIG_SYS_MAXARGS, 0, do_emsdp,
  112. "Synopsys EMSDP specific commands",
  113. "rom unlock - Unlock non-volatile memory for writing\n"
  114. "emsdp rom lock - Lock non-volatile memory to prevent writing\n"
  115. );
  116. int checkboard(void)
  117. {
  118. int version = readl(CREG_IP_VERSION);
  119. printf("Board: ARC EM Software Development Platform v%d.%d\n",
  120. (version >> 16) & 0xff, version & 0xff);
  121. return 0;
  122. };