cpld.h 7.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Stout board CPLD definition
  4. *
  5. * Copyright (C) 2015 Renesas Electronics Europe GmbH
  6. * Copyright (C) 2015 Renesas Electronics Corporation
  7. * Copyright (C) 2015 Cogent Embedded, Inc.
  8. */
  9. #ifndef _CPLD_H_
  10. #define _CPLD_H_
  11. /* power-up behaviour */
  12. #define MODE_MSK_FREE_RUN 0x00000001
  13. #define MODE_VAL_FREE_RUN 0x00000000
  14. #define MODE_MSK_STEP_UP 0x00000001
  15. #define MODE_VAL_STEP_UP 0x00000000
  16. /* boot source */
  17. #define MODE_MSK_BOOT_SQPI_16KB_FAST 0x0000000E
  18. #define MODE_VAL_BOOT_SQPI_16KB_FAST 0x00000004
  19. #define MODE_MSK_BOOT_SQPI_16KB_SLOW 0x0000000E
  20. #define MODE_VAL_BOOT_SQPI_16KB_SLOW 0x00000008
  21. #define MODE_MSK_BOOT_SQPI_4KB_SLOW 0x0000000E
  22. #define MODE_VAL_BOOT_SQPI_4KB_SLOW 0x0000000C
  23. /* booting CPU */
  24. #define MODE_MSK_BOOT_CA15 0x000000C0
  25. #define MODE_VAL_BOOT_CA15 0x00000000
  26. #define MODE_MSK_BOOT_CA7 0x000000C0
  27. #define MODE_VAL_BOOT_CA7 0x00000040
  28. #define MODE_MSK_BOOT_SH4 0x000000C0
  29. #define MODE_VAL_BOOT_SH4 0x000000C0
  30. /* JTAG connection */
  31. #define MODE_MSK_JTAG_CORESIGHT 0xC0301C00
  32. #define MODE_VAL_JTAG_CORESIGHT 0x00200000
  33. #define MODE_MSK_JTAG_SH4 0xC0301C00
  34. #define MODE_VAL_JTAG_SH4 0x00300000
  35. /* DDR3 (PLL) speed */
  36. #define MODE_MSK_DDR3_1600 0x00080000
  37. #define MODE_VAL_DDR3_1600 0x00000000
  38. #define MODE_MSK_DDR3_1333 0x00080000
  39. #define MODE_VAL_DDR3_1333 0x00080000
  40. /* ComboPhy0 mode */
  41. #define MODE_MSK_PHY0_SATA0 0x01000000
  42. #define MODE_VAL_PHY0_SATA0 0x00000000
  43. #define MODE_MSK_PHY0_PCIE 0x01000000
  44. #define MODE_VAL_PHY0_PCIE 0x01000000
  45. /* ComboPhy1 mode */
  46. #define MODE_MSK_PHY1_SATA1 0x00800000
  47. #define MODE_VAL_PHY1_SATA1 0x00000000
  48. #define MODE_MSK_PHY1_USB3 0x00800000
  49. #define MODE_VAL_PHY1_USB3 0x00800000
  50. /*
  51. * Illegal multiplexer combinations.
  52. * MUX Conflicts
  53. * name with any one of
  54. * VIN0_BT656 VIN0_full, SD2
  55. * VIN0_full VIN0_BT656, SD2, AVB, VIN2_(all)
  56. * VIN1_BT656 VIN1_(others), SD0
  57. * VIN1_10bit VIN1_(others), SD0, VIN3_with*, I2C1
  58. * VIN1_12bit VIN1_(others), SD0, VIN3_with*, I2C1, SCIFA0_(all)
  59. * VIN2_BT656 VIN0_full, VIN2_(others), AVB,
  60. * VIN2_withSYNC VIN0_full, VIN2_(others), AVB, I2C1, SCIFA0_(all),
  61. * VIN3_with*
  62. * VIN2_withFIELD VIN0_full, VIN2_(others), AVB, SQPI_(all)
  63. * VIN2_withSYNCandFIELD VIN0_full, VIN2_(others), AVB, SQPI_(all), I2C1,
  64. * SCIFA0_(all), VIN3_with*
  65. * VIN3_BT656 VIN3_(others), IRQ3
  66. * VIN3_withFIELD VIN3_(others), IRQ3, VIN1_12bit, VIN2_withSYNC,
  67. * VIN2_withSYNCandFIELD, VIN1_10bit
  68. * VIN3_withSYNCandFIELD VIN3_(others), IRQ3, VIN1_12bit, VIN2_withSYNC,
  69. * VIN2_withSYNCandFIELD, VIN1_10bit, I2C1
  70. * AVB VIN0_full, VIN2_(all)
  71. * QSPI_ONBOARD VIN2_withFIELD, VIN2_withSYNCandFIELD, QSPI_COMEXPRESS
  72. * QSPI_COMEXPRESS VIN2_withFIELD, VIN2_withSYNCandFIELD, QSPI_ONBOARD
  73. * I2C1 VIN1_12bit, VIN2_withSYNC, VIN2_withSYNCandFIELD,
  74. * VIN3_withSYNCandFIELD
  75. * IRQ3 VIN3_(all)
  76. * SCIFA0_USB VIN1_12bit, VIN2_withSYNC, VIN2_withSYNCandFIELD,
  77. * SCIFA0_COMEXPRESS
  78. * SCIFA0_COMEXPRESS VIN1_12bit, VIN2_withSYNC, VIN2_withSYNCandFIELD,
  79. * SCIFA0_USB
  80. * SCIFA2 PWM210
  81. * ETH_ONBOARD ETH_COMEXPRESS
  82. * ETH_COMEXPRESS ETH_ONBOARD
  83. * SD0 VIN1_(all)
  84. * SD2 VIN0_(all)
  85. * PWM210 SCIFA2
  86. */
  87. /* connected to COM Express connector and CN6 for camera, BT656 only */
  88. #define MUX_MSK_VIN0_BT656 0x00001001
  89. #define MUX_VAL_VIN0_BT656 0x00000000
  90. /* connected to COM Express connector and CN6 for camera, all modes */
  91. #define MUX_MSK_VIN0_full 0x00001007
  92. #define MUX_VAL_VIN0_full 0x00000002
  93. /* connected to COM Express connector, BT656 only */
  94. #define MUX_MSK_VIN1_BT656 0x00000801
  95. #define MUX_VAL_VIN1_BT656 0x00000800
  96. /* connected to COM Express connector, all 10-bit modes */
  97. #define MUX_MSK_VIN1_10bit 0x00000821
  98. #define MUX_VAL_VIN1_10bit 0x00000800
  99. /* connected to COM Express connector, all 12-bit modes */
  100. #define MUX_MSK_VIN1_12bit 0x000008A1
  101. #define MUX_VAL_VIN1_12bit 0x00000880
  102. /* connected to COM Express connector, BT656 only */
  103. #define MUX_MSK_VIN2_BT656 0x00000007
  104. #define MUX_VAL_VIN2_BT656 0x00000006
  105. /* connected to COM Express connector, modes with sync signals */
  106. #define MUX_MSK_VIN2_withSYNC 0x000000A7
  107. #define MUX_VAL_VIN2_withSYNC 0x00000086
  108. /* connected to COM Express connector, modes with field, clken signals */
  109. #define MUX_MSK_VIN2_withFIELD 0x0000000F
  110. #define MUX_VAL_VIN2_withFIELD 0x0000000E
  111. /* connected to COM Express connector, modes with sync, field, clken signals */
  112. #define MUX_MSK_VIN2_withSYNCandFIELD 0x000000AF
  113. #define MUX_VAL_VIN2_withSYNCandFIELD 0x0000008E
  114. /* connected to COM Express connector, BT656 only */
  115. #define MUX_MSK_VIN3_BT656 0x00000101
  116. #define MUX_VAL_VIN3_BT656 0x00000100
  117. /* connected to COM Express connector, modes with field, clken signals */
  118. #define MUX_MSK_VIN3_withFIELD 0x00000121
  119. #define MUX_VAL_VIN3_withFIELD 0x00000120
  120. /* connected to COM Express connector, modes with sync, field, clken signals */
  121. #define MUX_MSK_VIN3_withSYNCandFIELD 0x00000161
  122. #define MUX_VAL_VIN3_withSYNCandFIELD 0x00000120
  123. /* connected to COM Express connector (RGMII) */
  124. #define MUX_MSK_AVB 0x00000003
  125. #define MUX_VAL_AVB 0x00000000
  126. /* connected to on-board QSPI flash */
  127. #define MUX_MSK_QSPI_ONBOARD 0x00000019
  128. #define MUX_VAL_QSPI_ONBOARD 0x00000000
  129. /* connected to COM Express connector */
  130. #define MUX_MSK_QSPI_COMEXPRESS 0x00000019
  131. #define MUX_VAL_QSPI_COMEXPRESS 0x00000010
  132. /* connected to COM Express connector and PMIC */
  133. #define MUX_MSK_I2C1 0x00000061
  134. #define MUX_VAL_I2C1 0x00000060
  135. /* connected to HDMI driver */
  136. #define MUX_MSK_IRQ3 0x00000101
  137. #define MUX_VAL_IRQ3 0x00000000
  138. /* connected to USB/FTDI */
  139. #define MUX_MSK_SCIFA0_USB 0x00004081
  140. #define MUX_VAL_SCIFA0_USB 0x00004000
  141. /* connected to COM Express connector */
  142. #define MUX_MSK_SCIFA0_COMEXPRESS 0x00004081
  143. #define MUX_VAL_SCIFA0_COMEXPRESS 0x00000000
  144. /* connected to COM Express connector */
  145. #define MUX_MSK_SCIFA2 0x00002001
  146. #define MUX_VAL_SCIFA2 0x00000000
  147. /* connected to on-board 10/100 Phy */
  148. #define MUX_MSK_ETH_ONBOARD 0x00000600
  149. #define MUX_VAL_ETH_ONBOARD 0x00000000
  150. /* connected to COM Express connector (RMII) */
  151. #define MUX_MSK_ETH_COMEXPRESS 0x00000600
  152. #define MUX_VAL_ETH_COMEXPRESS 0x00000400
  153. /* connected to on-board MicroSD slot */
  154. #define MUX_MSK_SD0 0x00000801
  155. #define MUX_VAL_SD0 0x00000000
  156. /* connected to COM Express connector */
  157. #define MUX_MSK_SD2 0x00001001
  158. #define MUX_VAL_SD2 0x00001000
  159. /* connected to COM Express connector */
  160. #define MUX_MSK_PWM210 0x00002001
  161. #define MUX_VAL_PWM210 0x00002000
  162. #define HDMI_MSK 0x07
  163. #define HDMI_OFF 0x00
  164. #define HDMI_ONBOARD 0x07
  165. #define HDMI_COMEXPRESS 0x05
  166. #define HDMI_ONBOARD_NODDC 0x03
  167. #define HDMI_COMEXPRESS_NODDC 0x01
  168. void cpld_init(void);
  169. #endif /* _CPLD_H_ */