qos.c 50 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * board/renesas/blanche/qos.c
  4. *
  5. * Copyright (C) 2016 Renesas Electronics Corporation
  6. */
  7. #include <common.h>
  8. #include <asm/processor.h>
  9. #include <asm/mach-types.h>
  10. #include <asm/io.h>
  11. #include <asm/arch/rmobile.h>
  12. #if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
  13. enum {
  14. DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
  15. DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
  16. DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
  17. DBSC3_15,
  18. DBSC3_NR,
  19. };
  20. static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
  21. [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
  22. [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
  23. [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
  24. [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
  25. [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
  26. [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
  27. [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
  28. [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
  29. [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
  30. [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
  31. [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
  32. [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
  33. [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
  34. [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
  35. [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
  36. [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
  37. };
  38. static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
  39. [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
  40. [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
  41. [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
  42. [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
  43. [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
  44. [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
  45. [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
  46. [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
  47. [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
  48. [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
  49. [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
  50. [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
  51. [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
  52. [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
  53. [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
  54. [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
  55. };
  56. void qos_init(void)
  57. {
  58. int i;
  59. struct rcar_s3c *s3c;
  60. struct rcar_s3c_qos *s3c_qos;
  61. struct rcar_dbsc3_qos *qos_addr;
  62. struct rcar_mxi *mxi;
  63. struct rcar_mxi_qos *mxi_qos;
  64. struct rcar_axi_qos *axi_qos;
  65. /* DBSC DBADJ2 */
  66. writel(0x20082004, DBSC3_0_DBADJ2);
  67. /* S3C -QoS */
  68. s3c = (struct rcar_s3c *)S3C_BASE;
  69. // writel(0x00000000, &s3c->s3cadsplcr);
  70. writel(0x1F0D0C0C, &s3c->s3crorr);
  71. writel(0x1F1F0C0C, &s3c->s3cworr);
  72. /* QoS Control Registers */
  73. s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
  74. writel(0x00890089, &s3c_qos->s3cqos0);
  75. writel(0x20960010, &s3c_qos->s3cqos1);
  76. writel(0x20302030, &s3c_qos->s3cqos2);
  77. writel(0x20AA2200, &s3c_qos->s3cqos3);
  78. writel(0x00002032, &s3c_qos->s3cqos4);
  79. writel(0x20960010, &s3c_qos->s3cqos5);
  80. writel(0x20302030, &s3c_qos->s3cqos6);
  81. writel(0x20AA2200, &s3c_qos->s3cqos7);
  82. writel(0x00002032, &s3c_qos->s3cqos8);
  83. s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
  84. writel(0x00890089, &s3c_qos->s3cqos0);
  85. writel(0x20960010, &s3c_qos->s3cqos1);
  86. writel(0x20302030, &s3c_qos->s3cqos2);
  87. writel(0x20AA2200, &s3c_qos->s3cqos3);
  88. writel(0x00002032, &s3c_qos->s3cqos4);
  89. writel(0x20960010, &s3c_qos->s3cqos5);
  90. writel(0x20302030, &s3c_qos->s3cqos6);
  91. writel(0x20AA2200, &s3c_qos->s3cqos7);
  92. writel(0x00002032, &s3c_qos->s3cqos8);
  93. s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
  94. writel(0x00820082, &s3c_qos->s3cqos0);
  95. writel(0x20960020, &s3c_qos->s3cqos1);
  96. writel(0x20302030, &s3c_qos->s3cqos2);
  97. writel(0x20AA20DC, &s3c_qos->s3cqos3);
  98. writel(0x00002032, &s3c_qos->s3cqos4);
  99. writel(0x20960020, &s3c_qos->s3cqos5);
  100. writel(0x20302030, &s3c_qos->s3cqos6);
  101. writel(0x20AA20DC, &s3c_qos->s3cqos7);
  102. writel(0x00002032, &s3c_qos->s3cqos8);
  103. s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
  104. writel(0x80918099, &s3c_qos->s3cqos0);
  105. writel(0x20410010, &s3c_qos->s3cqos1);
  106. writel(0x200A2023, &s3c_qos->s3cqos2);
  107. writel(0x20502001, &s3c_qos->s3cqos3);
  108. writel(0x00002032, &s3c_qos->s3cqos4);
  109. writel(0x20410FFF, &s3c_qos->s3cqos5);
  110. writel(0x200A2023, &s3c_qos->s3cqos6);
  111. writel(0x20502001, &s3c_qos->s3cqos7);
  112. writel(0x20142032, &s3c_qos->s3cqos8);
  113. /* DBSC -QoS */
  114. /* DBSC0 - Read */
  115. for (i = DBSC3_00; i < DBSC3_NR; i++) {
  116. qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
  117. writel(0x00000002, &qos_addr->dblgcnt);
  118. writel(0x00002096, &qos_addr->dbtmval0);
  119. writel(0x00002064, &qos_addr->dbtmval1);
  120. writel(0x00002032, &qos_addr->dbtmval2);
  121. writel(0x00001FB0, &qos_addr->dbtmval3);
  122. writel(0x00000001, &qos_addr->dbrqctr);
  123. writel(0x0000204B, &qos_addr->dbthres0);
  124. writel(0x0000204B, &qos_addr->dbthres1);
  125. writel(0x00001FC4, &qos_addr->dbthres2);
  126. writel(0x00000001, &qos_addr->dblgqon);
  127. }
  128. /* DBSC0 - Write */
  129. for (i = DBSC3_00; i < DBSC3_NR; i++) {
  130. qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
  131. writel(0x00000002, &qos_addr->dblgcnt);
  132. writel(0x00002096, &qos_addr->dbtmval0);
  133. writel(0x0000206E, &qos_addr->dbtmval1);
  134. writel(0x00002050, &qos_addr->dbtmval2);
  135. writel(0x0000203A, &qos_addr->dbtmval3);
  136. writel(0x00000001, &qos_addr->dbrqctr);
  137. writel(0x0000205A, &qos_addr->dbthres0);
  138. writel(0x0000205A, &qos_addr->dbthres1);
  139. writel(0x0000203C, &qos_addr->dbthres2);
  140. writel(0x00000001, &qos_addr->dblgqon);
  141. }
  142. /* MXI -QoS */
  143. /* Transaction Control (MXI) */
  144. mxi = (struct rcar_mxi *)MXI_BASE;
  145. writel(0x00000100, &mxi->mxaxirtcr);
  146. writel(0xFF530100, &mxi->mxaxiwtcr);
  147. writel(0x00000100, &mxi->mxs3crtcr);
  148. writel(0xFF530100, &mxi->mxs3cwtcr);
  149. writel(0x004000C0, &mxi->mxsaar0);
  150. writel(0x02000800, &mxi->mxsaar1);
  151. /* QoS Control (MXI) */
  152. mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
  153. writel(0x0000000C, &mxi_qos->du0);
  154. /* AXI -QoS */
  155. /* Transaction Control (MXI) */
  156. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
  157. writel(0x00000102, &axi_qos->qosconf);
  158. writel(0x0000205F, &axi_qos->qosctset0);
  159. writel(0x00000001, &axi_qos->qosreqctr);
  160. writel(0x00000001, &axi_qos->qosqon);
  161. axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
  162. writel(0x00000100, &axi_qos->qosconf);
  163. writel(0x00002053, &axi_qos->qosctset0);
  164. writel(0x00000001, &axi_qos->qosreqctr);
  165. writel(0x00000001, &axi_qos->qosqon);
  166. writel(0x00000005, &axi_qos->qosin);
  167. axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE;
  168. writel(0x00000100, &axi_qos->qosconf);
  169. writel(0x00002029, &axi_qos->qosctset0);
  170. writel(0x00000001, &axi_qos->qosreqctr);
  171. writel(0x00000001, &axi_qos->qosqon);
  172. writel(0x00000005, &axi_qos->qosin);
  173. axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE;
  174. writel(0x00000102, &axi_qos->qosconf);
  175. writel(0x0000205F, &axi_qos->qosctset0);
  176. writel(0x00000001, &axi_qos->qosreqctr);
  177. writel(0x00000001, &axi_qos->qosqon);
  178. writel(0x00000005, &axi_qos->qosin);
  179. axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE;
  180. writel(0x00000100, &axi_qos->qosconf);
  181. writel(0x00002053, &axi_qos->qosctset0);
  182. writel(0x00000001, &axi_qos->qosreqctr);
  183. writel(0x00000001, &axi_qos->qosqon);
  184. writel(0x00000005, &axi_qos->qosin);
  185. axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE;
  186. writel(0x00000100, &axi_qos->qosconf);
  187. writel(0x000020A6, &axi_qos->qosctset0);
  188. writel(0x00000001, &axi_qos->qosreqctr);
  189. writel(0x00000001, &axi_qos->qosqon);
  190. writel(0x00000005, &axi_qos->qosin);
  191. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE;
  192. writel(0x00000100, &axi_qos->qosconf);
  193. writel(0x000020A6, &axi_qos->qosctset0);
  194. writel(0x00000001, &axi_qos->qosreqctr);
  195. writel(0x00000001, &axi_qos->qosqon);
  196. writel(0x00000005, &axi_qos->qosin);
  197. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
  198. writel(0x00000102, &axi_qos->qosconf);
  199. writel(0x0000205F, &axi_qos->qosctset0);
  200. writel(0x00000001, &axi_qos->qosreqctr);
  201. writel(0x00000001, &axi_qos->qosqon);
  202. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
  203. writel(0x00000102, &axi_qos->qosconf);
  204. writel(0x0000205F, &axi_qos->qosctset0);
  205. writel(0x00000001, &axi_qos->qosreqctr);
  206. writel(0x00000001, &axi_qos->qosqon);
  207. axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
  208. writel(0x00000100, &axi_qos->qosconf);
  209. writel(0x0000214C, &axi_qos->qosctset0);
  210. writel(0x00000001, &axi_qos->qosreqctr);
  211. writel(0x00000001, &axi_qos->qosqon);
  212. writel(0x00000005, &axi_qos->qosin);
  213. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
  214. writel(0x00000101, &axi_qos->qosconf);
  215. writel(0x00002008, &axi_qos->qosctset0);
  216. writel(0x00000010, &axi_qos->qosreqctr);
  217. writel(0x00000001, &axi_qos->qosqon);
  218. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
  219. writel(0x00000101, &axi_qos->qosconf);
  220. writel(0x00002008, &axi_qos->qosctset0);
  221. writel(0x00000010, &axi_qos->qosreqctr);
  222. writel(0x00000001, &axi_qos->qosqon);
  223. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
  224. writel(0x00000101, &axi_qos->qosconf);
  225. writel(0x00002008, &axi_qos->qosctset0);
  226. writel(0x00000010, &axi_qos->qosreqctr);
  227. writel(0x00000001, &axi_qos->qosqon);
  228. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
  229. writel(0x00000101, &axi_qos->qosconf);
  230. writel(0x00002008, &axi_qos->qosctset0);
  231. writel(0x00000010, &axi_qos->qosreqctr);
  232. writel(0x00000001, &axi_qos->qosqon);
  233. axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
  234. writel(0x00000102, &axi_qos->qosconf);
  235. writel(0x0000205F, &axi_qos->qosctset0);
  236. writel(0x00000001, &axi_qos->qosreqctr);
  237. writel(0x00000001, &axi_qos->qosqon);
  238. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE;
  239. writel(0x00000000, &axi_qos->qosconf);
  240. writel(0x0000214C, &axi_qos->qosctset0);
  241. writel(0x00000001, &axi_qos->qosreqctr);
  242. writel(0x00000001, &axi_qos->qosqon);
  243. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE;
  244. writel(0x00000000, &axi_qos->qosconf);
  245. writel(0x0000214C, &axi_qos->qosctset0);
  246. writel(0x00000001, &axi_qos->qosreqctr);
  247. writel(0x00000001, &axi_qos->qosqon);
  248. writel(0x00000005, &axi_qos->qosin);
  249. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
  250. writel(0x00000000, &axi_qos->qosconf);
  251. writel(0x0000214C, &axi_qos->qosctset0);
  252. writel(0x00000001, &axi_qos->qosreqctr);
  253. writel(0x00000001, &axi_qos->qosqon);
  254. writel(0x00000005, &axi_qos->qosin);
  255. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
  256. writel(0x00000000, &axi_qos->qosconf);
  257. writel(0x0000214C, &axi_qos->qosctset0);
  258. writel(0x00000001, &axi_qos->qosreqctr);
  259. writel(0x00000001, &axi_qos->qosqon);
  260. writel(0x00000005, &axi_qos->qosin);
  261. axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE;
  262. writel(0x00000100, &axi_qos->qosconf);
  263. writel(0x000020A6, &axi_qos->qosctset0);
  264. writel(0x00000001, &axi_qos->qosreqctr);
  265. writel(0x00000001, &axi_qos->qosqon);
  266. writel(0x00000005, &axi_qos->qosin);
  267. axi_qos = (struct rcar_axi_qos *)SYS_AXI_ADM_BASE;
  268. writel(0x00000100, &axi_qos->qosconf);
  269. writel(0x0000214C, &axi_qos->qosctset0);
  270. writel(0x00000001, &axi_qos->qosreqctr);
  271. writel(0x00000001, &axi_qos->qosqon);
  272. writel(0x00000005, &axi_qos->qosin);
  273. axi_qos = (struct rcar_axi_qos *)SYS_AXI_ADS_BASE;
  274. writel(0x00000101, &axi_qos->qosconf);
  275. writel(0x0000214C, &axi_qos->qosctset0);
  276. writel(0x00000020, &axi_qos->qosreqctr);
  277. writel(0x00000001, &axi_qos->qosqon);
  278. writel(0x00000005, &axi_qos->qosin);
  279. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX_BASE;
  280. writel(0x00002041, &axi_qos->qosctset1);
  281. writel(0x00002023, &axi_qos->qosctset2);
  282. writel(0x0000200A, &axi_qos->qosctset3);
  283. writel(0x00002050, &axi_qos->qosthres0);
  284. writel(0x00002032, &axi_qos->qosthres1);
  285. writel(0x00002014, &axi_qos->qosthres2);
  286. axi_qos = (struct rcar_axi_qos *)SYS_AXI_AXI64TO128W_BASE;
  287. writel(0x00000102, &axi_qos->qosconf);
  288. writel(0x0000205F, &axi_qos->qosctset0);
  289. writel(0x00000001, &axi_qos->qosreqctr);
  290. writel(0x00000001, &axi_qos->qosqon);
  291. axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVBW_BASE;
  292. writel(0x00000100, &axi_qos->qosconf);
  293. writel(0x00002053, &axi_qos->qosctset0);
  294. writel(0x00000001, &axi_qos->qosreqctr);
  295. writel(0x00000001, &axi_qos->qosqon);
  296. writel(0x00000005, &axi_qos->qosin);
  297. axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50W_BASE;
  298. writel(0x00000100, &axi_qos->qosconf);
  299. writel(0x00002029, &axi_qos->qosctset0);
  300. writel(0x00000001, &axi_qos->qosreqctr);
  301. writel(0x00000001, &axi_qos->qosqon);
  302. writel(0x00000005, &axi_qos->qosin);
  303. axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCIW_BASE;
  304. writel(0x00000102, &axi_qos->qosconf);
  305. writel(0x0000205F, &axi_qos->qosctset0);
  306. writel(0x00000001, &axi_qos->qosreqctr);
  307. writel(0x00000001, &axi_qos->qosqon);
  308. writel(0x00000005, &axi_qos->qosin);
  309. axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCSW_BASE;
  310. writel(0x00000100, &axi_qos->qosconf);
  311. writel(0x00002053, &axi_qos->qosctset0);
  312. writel(0x00000001, &axi_qos->qosreqctr);
  313. writel(0x00000001, &axi_qos->qosqon);
  314. writel(0x00000005, &axi_qos->qosin);
  315. axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2DW_BASE;
  316. writel(0x00000100, &axi_qos->qosconf);
  317. writel(0x000020A6, &axi_qos->qosctset0);
  318. writel(0x00000001, &axi_qos->qosreqctr);
  319. writel(0x00000001, &axi_qos->qosqon);
  320. writel(0x00000005, &axi_qos->qosin);
  321. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0W_BASE;
  322. writel(0x00000102, &axi_qos->qosconf);
  323. writel(0x0000205F, &axi_qos->qosctset0);
  324. writel(0x00000001, &axi_qos->qosreqctr);
  325. writel(0x00000001, &axi_qos->qosqon);
  326. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1W_BASE;
  327. writel(0x00000102, &axi_qos->qosconf);
  328. writel(0x0000205F, &axi_qos->qosctset0);
  329. writel(0x00000001, &axi_qos->qosreqctr);
  330. writel(0x00000001, &axi_qos->qosqon);
  331. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2W_BASE;
  332. writel(0x00000102, &axi_qos->qosconf);
  333. writel(0x0000205F, &axi_qos->qosctset0);
  334. writel(0x00000001, &axi_qos->qosreqctr);
  335. writel(0x00000001, &axi_qos->qosqon);
  336. axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBSW_BASE;
  337. writel(0x00000100, &axi_qos->qosconf);
  338. writel(0x0000214C, &axi_qos->qosctset0);
  339. writel(0x00000001, &axi_qos->qosreqctr);
  340. writel(0x00000001, &axi_qos->qosqon);
  341. writel(0x00000005, &axi_qos->qosin);
  342. axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTXBW_BASE;
  343. writel(0x00000102, &axi_qos->qosconf);
  344. writel(0x0000205F, &axi_qos->qosctset0);
  345. writel(0x00000001, &axi_qos->qosreqctr);
  346. writel(0x00000001, &axi_qos->qosqon);
  347. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0W_BASE;
  348. writel(0x00000000, &axi_qos->qosconf);
  349. writel(0x0000214C, &axi_qos->qosctset0);
  350. writel(0x00000001, &axi_qos->qosreqctr);
  351. writel(0x00000001, &axi_qos->qosqon);
  352. writel(0x00000005, &axi_qos->qosin);
  353. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1W_BASE;
  354. writel(0x00000000, &axi_qos->qosconf);
  355. writel(0x0000214C, &axi_qos->qosctset0);
  356. writel(0x00000001, &axi_qos->qosreqctr);
  357. writel(0x00000001, &axi_qos->qosqon);
  358. writel(0x00000005, &axi_qos->qosin);
  359. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0W_BASE;
  360. writel(0x00000000, &axi_qos->qosconf);
  361. writel(0x0000214C, &axi_qos->qosctset0);
  362. writel(0x00000001, &axi_qos->qosreqctr);
  363. writel(0x00000001, &axi_qos->qosqon);
  364. writel(0x00000005, &axi_qos->qosin);
  365. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1W_BASE;
  366. writel(0x00000000, &axi_qos->qosconf);
  367. writel(0x0000214C, &axi_qos->qosctset0);
  368. writel(0x00000001, &axi_qos->qosreqctr);
  369. writel(0x00000001, &axi_qos->qosqon);
  370. writel(0x00000005, &axi_qos->qosin);
  371. axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRABW_BASE;
  372. writel(0x00000100, &axi_qos->qosconf);
  373. writel(0x000020A6, &axi_qos->qosctset0);
  374. writel(0x00000001, &axi_qos->qosreqctr);
  375. writel(0x00000001, &axi_qos->qosqon);
  376. writel(0x00000005, &axi_qos->qosin);
  377. axi_qos = (struct rcar_axi_qos *)SYS_AXI_ADMW_BASE;
  378. writel(0x00000100, &axi_qos->qosconf);
  379. writel(0x0000214C, &axi_qos->qosctset0);
  380. writel(0x00000001, &axi_qos->qosreqctr);
  381. writel(0x00000001, &axi_qos->qosqon);
  382. writel(0x00000005, &axi_qos->qosin);
  383. axi_qos = (struct rcar_axi_qos *)SYS_AXI_ADSW_BASE;
  384. writel(0x00000101, &axi_qos->qosconf);
  385. writel(0x0000214C, &axi_qos->qosctset0);
  386. writel(0x00000020, &axi_qos->qosreqctr);
  387. writel(0x00000001, &axi_qos->qosqon);
  388. writel(0x00000005, &axi_qos->qosin);
  389. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYXW_BASE;
  390. writel(0x00002041, &axi_qos->qosctset1);
  391. writel(0x00002023, &axi_qos->qosctset2);
  392. writel(0x0000200A, &axi_qos->qosctset3);
  393. writel(0x00002050, &axi_qos->qosthres0);
  394. writel(0x00002032, &axi_qos->qosthres1);
  395. writel(0x00002014, &axi_qos->qosthres2);
  396. /* QoS Register (SYS-AXI256) */
  397. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
  398. writel(0x00000102, &axi_qos->qosconf);
  399. writel(0x0000205F, &axi_qos->qosctset0);
  400. writel(0x00000001, &axi_qos->qosreqctr);
  401. writel(0x00000001, &axi_qos->qosqon);
  402. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI_BASE;
  403. writel(0x00000102, &axi_qos->qosconf);
  404. writel(0x0000205F, &axi_qos->qosctset0);
  405. writel(0x00000001, &axi_qos->qosreqctr);
  406. writel(0x00000001, &axi_qos->qosqon);
  407. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
  408. writel(0x00000102, &axi_qos->qosconf);
  409. writel(0x0000205F, &axi_qos->qosctset0);
  410. writel(0x00000001, &axi_qos->qosreqctr);
  411. writel(0x00000001, &axi_qos->qosqon);
  412. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_IMP0_BASE;
  413. writel(0x00000100, &axi_qos->qosconf);
  414. writel(0x0000211B, &axi_qos->qosctset0);
  415. writel(0x00000001, &axi_qos->qosreqctr);
  416. writel(0x00000001, &axi_qos->qosqon);
  417. writel(0x00000005, &axi_qos->qosin);
  418. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SY2_BASE;
  419. writel(0x00002041, &axi_qos->qosctset1);
  420. writel(0x00002023, &axi_qos->qosctset2);
  421. writel(0x0000200A, &axi_qos->qosctset3);
  422. writel(0x00002050, &axi_qos->qosthres0);
  423. writel(0x00002032, &axi_qos->qosthres1);
  424. writel(0x00002014, &axi_qos->qosthres2);
  425. axi_qos = (struct rcar_axi_qos *)SYS_AXI256W_AXI128TO256_BASE;
  426. writel(0x00000102, &axi_qos->qosconf);
  427. writel(0x0000205F, &axi_qos->qosctset0);
  428. writel(0x00000001, &axi_qos->qosreqctr);
  429. writel(0x00000001, &axi_qos->qosqon);
  430. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXMW_BASE;
  431. writel(0x00000102, &axi_qos->qosconf);
  432. writel(0x0000205F, &axi_qos->qosctset0);
  433. writel(0x00000001, &axi_qos->qosreqctr);
  434. writel(0x00000001, &axi_qos->qosqon);
  435. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXIW_BASE;
  436. writel(0x00000102, &axi_qos->qosconf);
  437. writel(0x0000205F, &axi_qos->qosctset0);
  438. writel(0x00000001, &axi_qos->qosreqctr);
  439. writel(0x00000001, &axi_qos->qosqon);
  440. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_IMP0W_BASE;
  441. writel(0x00000100, &axi_qos->qosconf);
  442. writel(0x00002029, &axi_qos->qosctset0);
  443. writel(0x00000001, &axi_qos->qosreqctr);
  444. writel(0x00000001, &axi_qos->qosqon);
  445. writel(0x00000005, &axi_qos->qosin);
  446. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SY2W_BASE;
  447. writel(0x00002041, &axi_qos->qosctset1);
  448. writel(0x00002023, &axi_qos->qosctset2);
  449. writel(0x0000200A, &axi_qos->qosctset3);
  450. writel(0x00002050, &axi_qos->qosthres0);
  451. writel(0x00002032, &axi_qos->qosthres1);
  452. writel(0x00002014, &axi_qos->qosthres2);
  453. /* QoS Register (RT-AXI) */
  454. axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
  455. writel(0x00000000, &axi_qos->qosconf);
  456. writel(0x00002055, &axi_qos->qosctset0);
  457. writel(0x00000000, &axi_qos->qosreqctr);
  458. writel(0x00000000, &axi_qos->qosqon);
  459. axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE;
  460. writel(0x00000000, &axi_qos->qosconf);
  461. writel(0x00002055, &axi_qos->qosctset0);
  462. writel(0x00000000, &axi_qos->qosreqctr);
  463. writel(0x00000000, &axi_qos->qosqon);
  464. axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
  465. writel(0x00000000, &axi_qos->qosconf);
  466. writel(0x00002001, &axi_qos->qosctset0);
  467. writel(0x00000000, &axi_qos->qosreqctr);
  468. writel(0x00000000, &axi_qos->qosqon);
  469. axi_qos = (struct rcar_axi_qos *)RT_AXI_RT_BASE;
  470. writel(0x00002001, &axi_qos->qosctset1);
  471. writel(0x00002001, &axi_qos->qosctset2);
  472. writel(0x00002001, &axi_qos->qosctset3);
  473. writel(0x00000000, &axi_qos->qosthres0);
  474. writel(0x00000000, &axi_qos->qosthres1);
  475. writel(0x00000000, &axi_qos->qosthres2);
  476. axi_qos = (struct rcar_axi_qos *)RT_AXI_SHXW_BASE;
  477. writel(0x00000000, &axi_qos->qosconf);
  478. writel(0x00002055, &axi_qos->qosctset0);
  479. writel(0x00000000, &axi_qos->qosreqctr);
  480. writel(0x00000000, &axi_qos->qosqon);
  481. axi_qos = (struct rcar_axi_qos *)RT_AXI_DBGW_BASE;
  482. writel(0x00000000, &axi_qos->qosconf);
  483. writel(0x00002055, &axi_qos->qosctset0);
  484. writel(0x00000000, &axi_qos->qosreqctr);
  485. writel(0x00000000, &axi_qos->qosqon);
  486. axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128W_BASE;
  487. writel(0x00000000, &axi_qos->qosconf);
  488. writel(0x00002001, &axi_qos->qosctset0);
  489. writel(0x00000000, &axi_qos->qosreqctr);
  490. writel(0x00000000, &axi_qos->qosqon);
  491. axi_qos = (struct rcar_axi_qos *)RT_AXI_RTW_BASE;
  492. writel(0x00002001, &axi_qos->qosctset1);
  493. writel(0x00002001, &axi_qos->qosctset2);
  494. writel(0x00002001, &axi_qos->qosctset3);
  495. writel(0x00000000, &axi_qos->qosthres0);
  496. writel(0x00000000, &axi_qos->qosthres1);
  497. writel(0x00000000, &axi_qos->qosthres2);
  498. /* QoS Register (CCI-AXI) */
  499. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
  500. writel(0x00000101, &axi_qos->qosconf);
  501. writel(0x00002008, &axi_qos->qosctset0);
  502. writel(0x00002041, &axi_qos->qosctset1);
  503. writel(0x00002023, &axi_qos->qosctset2);
  504. writel(0x0000200A, &axi_qos->qosctset3);
  505. writel(0x00000010, &axi_qos->qosreqctr);
  506. writel(0x00002050, &axi_qos->qosthres0);
  507. writel(0x00002032, &axi_qos->qosthres1);
  508. writel(0x00002014, &axi_qos->qosthres2);
  509. writel(0x00000001, &axi_qos->qosqon);
  510. axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
  511. writel(0x00000102, &axi_qos->qosconf);
  512. writel(0x0000205F, &axi_qos->qosctset0);
  513. writel(0x00002041, &axi_qos->qosctset1);
  514. writel(0x00002023, &axi_qos->qosctset2);
  515. writel(0x0000200A, &axi_qos->qosctset3);
  516. writel(0x00000001, &axi_qos->qosreqctr);
  517. writel(0x00002050, &axi_qos->qosthres0);
  518. writel(0x00002032, &axi_qos->qosthres1);
  519. writel(0x00002014, &axi_qos->qosthres2);
  520. writel(0x00000001, &axi_qos->qosqon);
  521. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
  522. writel(0x00000101, &axi_qos->qosconf);
  523. writel(0x00002008, &axi_qos->qosctset0);
  524. writel(0x00002041, &axi_qos->qosctset1);
  525. writel(0x00002023, &axi_qos->qosctset2);
  526. writel(0x0000000A, &axi_qos->qosctset3);
  527. writel(0x00000010, &axi_qos->qosreqctr);
  528. writel(0x00002050, &axi_qos->qosthres0);
  529. writel(0x00002032, &axi_qos->qosthres1);
  530. writel(0x00002018, &axi_qos->qosthres2);
  531. writel(0x00000001, &axi_qos->qosqon);
  532. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
  533. writel(0x00000101, &axi_qos->qosconf);
  534. writel(0x00002008, &axi_qos->qosctset0);
  535. writel(0x00002041, &axi_qos->qosctset1);
  536. writel(0x00002023, &axi_qos->qosctset2);
  537. writel(0x0000200A, &axi_qos->qosctset3);
  538. writel(0x00000010, &axi_qos->qosreqctr);
  539. writel(0x00002050, &axi_qos->qosthres0);
  540. writel(0x00002032, &axi_qos->qosthres1);
  541. writel(0x00002014, &axi_qos->qosthres2);
  542. writel(0x00000001, &axi_qos->qosqon);
  543. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
  544. writel(0x00000101, &axi_qos->qosconf);
  545. writel(0x00002008, &axi_qos->qosctset0);
  546. writel(0x00002041, &axi_qos->qosctset1);
  547. writel(0x00002023, &axi_qos->qosctset2);
  548. writel(0x0000200A, &axi_qos->qosctset3);
  549. writel(0x00000010, &axi_qos->qosreqctr);
  550. writel(0x00002050, &axi_qos->qosthres0);
  551. writel(0x00002032, &axi_qos->qosthres1);
  552. writel(0x00002014, &axi_qos->qosthres2);
  553. writel(0x00000001, &axi_qos->qosqon);
  554. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
  555. writel(0x00000102, &axi_qos->qosconf);
  556. writel(0x0000205F, &axi_qos->qosctset0);
  557. writel(0x00002041, &axi_qos->qosctset1);
  558. writel(0x00002023, &axi_qos->qosctset2);
  559. writel(0x0000200A, &axi_qos->qosctset3);
  560. writel(0x00000001, &axi_qos->qosreqctr);
  561. writel(0x00002050, &axi_qos->qosthres0);
  562. writel(0x00002032, &axi_qos->qosthres1);
  563. writel(0x00002014, &axi_qos->qosthres2);
  564. writel(0x00000001, &axi_qos->qosqon);
  565. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
  566. writel(0x00000101, &axi_qos->qosconf);
  567. writel(0x00002008, &axi_qos->qosctset0);
  568. writel(0x00002041, &axi_qos->qosctset1);
  569. writel(0x00002023, &axi_qos->qosctset2);
  570. writel(0x0000200A, &axi_qos->qosctset3);
  571. writel(0x00000001, &axi_qos->qosreqctr);
  572. writel(0x00002050, &axi_qos->qosthres0);
  573. writel(0x00002032, &axi_qos->qosthres1);
  574. writel(0x00002014, &axi_qos->qosthres2);
  575. writel(0x00000001, &axi_qos->qosqon);
  576. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
  577. writel(0x00000101, &axi_qos->qosconf);
  578. writel(0x00002008, &axi_qos->qosctset0);
  579. writel(0x00002041, &axi_qos->qosctset1);
  580. writel(0x00002023, &axi_qos->qosctset2);
  581. writel(0x0000200A, &axi_qos->qosctset3);
  582. writel(0x00000010, &axi_qos->qosreqctr);
  583. writel(0x00002050, &axi_qos->qosthres0);
  584. writel(0x00002032, &axi_qos->qosthres1);
  585. writel(0x00002014, &axi_qos->qosthres2);
  586. writel(0x00000001, &axi_qos->qosqon);
  587. /* QoS Register (Media-AXI) */
  588. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE;
  589. writel(0x00000102, &axi_qos->qosconf);
  590. writel(0x000020DC, &axi_qos->qosctset0);
  591. writel(0x00002096, &axi_qos->qosctset1);
  592. writel(0x00002030, &axi_qos->qosctset2);
  593. writel(0x00002030, &axi_qos->qosctset3);
  594. writel(0x00000020, &axi_qos->qosreqctr);
  595. writel(0x000020AA, &axi_qos->qosthres0);
  596. writel(0x00002032, &axi_qos->qosthres1);
  597. writel(0x00000001, &axi_qos->qosthres2);
  598. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE;
  599. writel(0x00000102, &axi_qos->qosconf);
  600. writel(0x000020DC, &axi_qos->qosctset0);
  601. writel(0x00002096, &axi_qos->qosctset1);
  602. writel(0x00002030, &axi_qos->qosctset2);
  603. writel(0x00002030, &axi_qos->qosctset3);
  604. writel(0x00000020, &axi_qos->qosreqctr);
  605. writel(0x000020AA, &axi_qos->qosthres0);
  606. writel(0x00002032, &axi_qos->qosthres1);
  607. writel(0x00000001, &axi_qos->qosthres2);
  608. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE;
  609. writel(0x00000001, &axi_qos->qosconf);
  610. writel(0x00002018, &axi_qos->qosctset0);
  611. writel(0x00000020, &axi_qos->qosreqctr);
  612. writel(0x00002006, &axi_qos->qosthres0);
  613. writel(0x00002001, &axi_qos->qosthres1);
  614. writel(0x00000001, &axi_qos->qosthres2);
  615. writel(0x00000001, &axi_qos->qosqon);
  616. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE;
  617. writel(0x00000100, &axi_qos->qosconf);
  618. writel(0x00002259, &axi_qos->qosctset0);
  619. writel(0x00000001, &axi_qos->qosreqctr);
  620. writel(0x00002050, &axi_qos->qosthres0);
  621. writel(0x00002032, &axi_qos->qosthres1);
  622. writel(0x00002014, &axi_qos->qosthres2);
  623. writel(0x00000001, &axi_qos->qosqon);
  624. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCTU0R_BASE;
  625. writel(0x00000100, &axi_qos->qosconf);
  626. writel(0x00002053, &axi_qos->qosctset0);
  627. writel(0x00000001, &axi_qos->qosreqctr);
  628. writel(0x00002050, &axi_qos->qosthres0);
  629. writel(0x00002032, &axi_qos->qosthres1);
  630. writel(0x00002014, &axi_qos->qosthres2);
  631. writel(0x00000001, &axi_qos->qosqon);
  632. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCTU0W_BASE;
  633. writel(0x00000100, &axi_qos->qosconf);
  634. writel(0x00002053, &axi_qos->qosctset0);
  635. writel(0x00000001, &axi_qos->qosreqctr);
  636. writel(0x00002050, &axi_qos->qosthres0);
  637. writel(0x00002032, &axi_qos->qosthres1);
  638. writel(0x00002014, &axi_qos->qosthres2);
  639. writel(0x00000001, &axi_qos->qosqon);
  640. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VDCTU0R_BASE;
  641. writel(0x00000100, &axi_qos->qosconf);
  642. writel(0x00002053, &axi_qos->qosctset0);
  643. writel(0x00000001, &axi_qos->qosreqctr);
  644. writel(0x00002050, &axi_qos->qosthres0);
  645. writel(0x00002032, &axi_qos->qosthres1);
  646. writel(0x00002014, &axi_qos->qosthres2);
  647. writel(0x00000001, &axi_qos->qosqon);
  648. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VDCTU0W_BASE;
  649. writel(0x00000100, &axi_qos->qosconf);
  650. writel(0x00002053, &axi_qos->qosctset0);
  651. writel(0x00000001, &axi_qos->qosreqctr);
  652. writel(0x00002050, &axi_qos->qosthres0);
  653. writel(0x00002032, &axi_qos->qosthres1);
  654. writel(0x00002014, &axi_qos->qosthres2);
  655. writel(0x00000001, &axi_qos->qosqon);
  656. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VDCTU1R_BASE;
  657. writel(0x00000100, &axi_qos->qosconf);
  658. writel(0x00002053, &axi_qos->qosctset0);
  659. writel(0x00000001, &axi_qos->qosreqctr);
  660. writel(0x00002050, &axi_qos->qosthres0);
  661. writel(0x00002032, &axi_qos->qosthres1);
  662. writel(0x00002014, &axi_qos->qosthres2);
  663. writel(0x00000001, &axi_qos->qosqon);
  664. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VDCTU1W_BASE;
  665. writel(0x00000100, &axi_qos->qosconf);
  666. writel(0x00002053, &axi_qos->qosctset0);
  667. writel(0x00000001, &axi_qos->qosreqctr);
  668. writel(0x00002050, &axi_qos->qosthres0);
  669. writel(0x00002032, &axi_qos->qosthres1);
  670. writel(0x00002014, &axi_qos->qosthres2);
  671. writel(0x00000001, &axi_qos->qosqon);
  672. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
  673. writel(0x00000101, &axi_qos->qosconf);
  674. writel(0x00002046, &axi_qos->qosctset0);
  675. writel(0x00000020, &axi_qos->qosreqctr);
  676. writel(0x00002050, &axi_qos->qosthres0);
  677. writel(0x00002032, &axi_qos->qosthres1);
  678. writel(0x00002014, &axi_qos->qosthres2);
  679. writel(0x00000001, &axi_qos->qosqon);
  680. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN1W_BASE;
  681. writel(0x00000101, &axi_qos->qosconf);
  682. writel(0x00002046, &axi_qos->qosctset0);
  683. writel(0x00000020, &axi_qos->qosreqctr);
  684. writel(0x00002050, &axi_qos->qosthres0);
  685. writel(0x00002032, &axi_qos->qosthres1);
  686. writel(0x00002014, &axi_qos->qosthres2);
  687. writel(0x00000001, &axi_qos->qosqon);
  688. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_RDRW_BASE;
  689. writel(0x00000101, &axi_qos->qosconf);
  690. writel(0x000020D0, &axi_qos->qosctset0);
  691. writel(0x00000020, &axi_qos->qosreqctr);
  692. writel(0x00002050, &axi_qos->qosthres0);
  693. writel(0x00002032, &axi_qos->qosthres1);
  694. writel(0x00002014, &axi_qos->qosthres2);
  695. writel(0x00000001, &axi_qos->qosqon);
  696. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMS01R_BASE;
  697. writel(0x00000101, &axi_qos->qosconf);
  698. writel(0x00002034, &axi_qos->qosctset0);
  699. writel(0x0000000C, &axi_qos->qosreqctr);
  700. writel(0x00002050, &axi_qos->qosthres0);
  701. writel(0x00002032, &axi_qos->qosthres1);
  702. writel(0x00002014, &axi_qos->qosthres2);
  703. writel(0x00000001, &axi_qos->qosqon);
  704. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMS01W_BASE;
  705. writel(0x00000101, &axi_qos->qosconf);
  706. writel(0x0000200D, &axi_qos->qosctset0);
  707. writel(0x000000C0, &axi_qos->qosreqctr);
  708. writel(0x00002050, &axi_qos->qosthres0);
  709. writel(0x00002032, &axi_qos->qosthres1);
  710. writel(0x00002014, &axi_qos->qosthres2);
  711. writel(0x00000001, &axi_qos->qosqon);
  712. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMS23R_BASE;
  713. writel(0x00000101, &axi_qos->qosconf);
  714. writel(0x00002034, &axi_qos->qosctset0);
  715. writel(0x0000000C, &axi_qos->qosreqctr);
  716. writel(0x00002050, &axi_qos->qosthres0);
  717. writel(0x00002032, &axi_qos->qosthres1);
  718. writel(0x00002014, &axi_qos->qosthres2);
  719. writel(0x00000001, &axi_qos->qosqon);
  720. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMS23W_BASE;
  721. writel(0x00000101, &axi_qos->qosconf);
  722. writel(0x0000200D, &axi_qos->qosctset0);
  723. writel(0x000000C0, &axi_qos->qosreqctr);
  724. writel(0x00002050, &axi_qos->qosthres0);
  725. writel(0x00002032, &axi_qos->qosthres1);
  726. writel(0x00002014, &axi_qos->qosthres2);
  727. writel(0x00000001, &axi_qos->qosqon);
  728. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMS45R_BASE;
  729. writel(0x00000101, &axi_qos->qosconf);
  730. writel(0x00002034, &axi_qos->qosctset0);
  731. writel(0x0000000C, &axi_qos->qosreqctr);
  732. writel(0x00002050, &axi_qos->qosthres0);
  733. writel(0x00002032, &axi_qos->qosthres1);
  734. writel(0x00002014, &axi_qos->qosthres2);
  735. writel(0x00000001, &axi_qos->qosqon);
  736. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMS45W_BASE;
  737. writel(0x00000101, &axi_qos->qosconf);
  738. writel(0x0000200D, &axi_qos->qosctset0);
  739. writel(0x000000C0, &axi_qos->qosreqctr);
  740. writel(0x00002050, &axi_qos->qosthres0);
  741. writel(0x00002032, &axi_qos->qosthres1);
  742. writel(0x00002014, &axi_qos->qosthres2);
  743. writel(0x00000001, &axi_qos->qosqon);
  744. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
  745. writel(0x00000100, &axi_qos->qosconf);
  746. writel(0x00002069, &axi_qos->qosctset0);
  747. writel(0x00000001, &axi_qos->qosreqctr);
  748. writel(0x00002050, &axi_qos->qosthres0);
  749. writel(0x00002032, &axi_qos->qosthres1);
  750. writel(0x00002014, &axi_qos->qosthres2);
  751. writel(0x00000001, &axi_qos->qosqon);
  752. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
  753. writel(0x00000100, &axi_qos->qosconf);
  754. writel(0x00002069, &axi_qos->qosctset0);
  755. writel(0x00000001, &axi_qos->qosreqctr);
  756. writel(0x00002050, &axi_qos->qosthres0);
  757. writel(0x00002032, &axi_qos->qosthres1);
  758. writel(0x00002014, &axi_qos->qosthres2);
  759. writel(0x00000001, &axi_qos->qosqon);
  760. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE4R_BASE;
  761. writel(0x00000100, &axi_qos->qosconf);
  762. writel(0x0000204C, &axi_qos->qosctset0);
  763. writel(0x00000001, &axi_qos->qosreqctr);
  764. writel(0x00002050, &axi_qos->qosthres0);
  765. writel(0x00002032, &axi_qos->qosthres1);
  766. writel(0x00002014, &axi_qos->qosthres2);
  767. writel(0x00000001, &axi_qos->qosqon);
  768. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE4W_BASE;
  769. writel(0x00000100, &axi_qos->qosconf);
  770. writel(0x00002200, &axi_qos->qosctset0);
  771. writel(0x00000001, &axi_qos->qosreqctr);
  772. writel(0x00002050, &axi_qos->qosthres0);
  773. writel(0x00002032, &axi_qos->qosthres1);
  774. writel(0x00002014, &axi_qos->qosthres2);
  775. writel(0x00000001, &axi_qos->qosqon);
  776. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC4R_BASE;
  777. writel(0x00000100, &axi_qos->qosconf);
  778. writel(0x00002455, &axi_qos->qosctset0);
  779. writel(0x00000001, &axi_qos->qosreqctr);
  780. writel(0x00002050, &axi_qos->qosthres0);
  781. writel(0x00002032, &axi_qos->qosthres1);
  782. writel(0x00002014, &axi_qos->qosthres2);
  783. writel(0x00000001, &axi_qos->qosqon);
  784. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC4W_BASE;
  785. writel(0x00000100, &axi_qos->qosconf);
  786. writel(0x00002455, &axi_qos->qosctset0);
  787. writel(0x00000001, &axi_qos->qosreqctr);
  788. writel(0x00002050, &axi_qos->qosthres0);
  789. writel(0x00002032, &axi_qos->qosthres1);
  790. writel(0x00002014, &axi_qos->qosthres2);
  791. writel(0x00000001, &axi_qos->qosqon);
  792. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
  793. writel(0x00000101, &axi_qos->qosconf);
  794. writel(0x00002034, &axi_qos->qosctset0);
  795. writel(0x00000008, &axi_qos->qosreqctr);
  796. writel(0x00002050, &axi_qos->qosthres0);
  797. writel(0x00002032, &axi_qos->qosthres1);
  798. writel(0x00002014, &axi_qos->qosthres2);
  799. writel(0x00000001, &axi_qos->qosqon);
  800. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
  801. writel(0x00000101, &axi_qos->qosconf);
  802. writel(0x000020D3, &axi_qos->qosctset0);
  803. writel(0x00000008, &axi_qos->qosreqctr);
  804. writel(0x00002050, &axi_qos->qosthres0);
  805. writel(0x00002032, &axi_qos->qosthres1);
  806. writel(0x00002014, &axi_qos->qosthres2);
  807. writel(0x00000001, &axi_qos->qosqon);
  808. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
  809. writel(0x00000101, &axi_qos->qosconf);
  810. writel(0x00002034, &axi_qos->qosctset0);
  811. writel(0x00000008, &axi_qos->qosreqctr);
  812. writel(0x00002050, &axi_qos->qosthres0);
  813. writel(0x00002032, &axi_qos->qosthres1);
  814. writel(0x00002014, &axi_qos->qosthres2);
  815. writel(0x00000001, &axi_qos->qosqon);
  816. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
  817. writel(0x00000101, &axi_qos->qosconf);
  818. writel(0x000020D3, &axi_qos->qosctset0);
  819. writel(0x00000008, &axi_qos->qosreqctr);
  820. writel(0x00002050, &axi_qos->qosthres0);
  821. writel(0x00002032, &axi_qos->qosthres1);
  822. writel(0x00002014, &axi_qos->qosthres2);
  823. writel(0x00000001, &axi_qos->qosqon);
  824. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
  825. writel(0x00000101, &axi_qos->qosconf);
  826. writel(0x0000201A, &axi_qos->qosctset0);
  827. writel(0x00000018, &axi_qos->qosreqctr);
  828. writel(0x00002050, &axi_qos->qosthres0);
  829. writel(0x00002032, &axi_qos->qosthres1);
  830. writel(0x00002014, &axi_qos->qosthres2);
  831. writel(0x00000001, &axi_qos->qosqon);
  832. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
  833. writel(0x00000101, &axi_qos->qosconf);
  834. writel(0x00002006, &axi_qos->qosctset0);
  835. writel(0x00000018, &axi_qos->qosreqctr);
  836. writel(0x00002050, &axi_qos->qosthres0);
  837. writel(0x00002032, &axi_qos->qosthres1);
  838. writel(0x00002014, &axi_qos->qosthres2);
  839. writel(0x00000001, &axi_qos->qosqon);
  840. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0R_BASE;
  841. writel(0x00000100, &axi_qos->qosconf);
  842. writel(0x0000201A, &axi_qos->qosctset0);
  843. writel(0x00000001, &axi_qos->qosreqctr);
  844. writel(0x00002050, &axi_qos->qosthres0);
  845. writel(0x00002032, &axi_qos->qosthres1);
  846. writel(0x00002014, &axi_qos->qosthres2);
  847. writel(0x00000001, &axi_qos->qosqon);
  848. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0W_BASE;
  849. writel(0x00000100, &axi_qos->qosconf);
  850. writel(0x00002042, &axi_qos->qosctset0);
  851. writel(0x00000001, &axi_qos->qosreqctr);
  852. writel(0x00002050, &axi_qos->qosthres0);
  853. writel(0x00002032, &axi_qos->qosthres1);
  854. writel(0x00002014, &axi_qos->qosthres2);
  855. writel(0x00000001, &axi_qos->qosqon);
  856. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE0R_BASE;
  857. writel(0x00000100, &axi_qos->qosconf);
  858. writel(0x0000204C, &axi_qos->qosctset0);
  859. writel(0x00000001, &axi_qos->qosreqctr);
  860. writel(0x00002050, &axi_qos->qosthres0);
  861. writel(0x00002032, &axi_qos->qosthres1);
  862. writel(0x00002014, &axi_qos->qosthres2);
  863. writel(0x00000001, &axi_qos->qosqon);
  864. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE0W_BASE;
  865. writel(0x00000100, &axi_qos->qosconf);
  866. writel(0x00002200, &axi_qos->qosctset0);
  867. writel(0x00000001, &axi_qos->qosreqctr);
  868. writel(0x00002050, &axi_qos->qosthres0);
  869. writel(0x00002032, &axi_qos->qosthres1);
  870. writel(0x00002014, &axi_qos->qosthres2);
  871. writel(0x00000001, &axi_qos->qosqon);
  872. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC0R_BASE;
  873. writel(0x00000100, &axi_qos->qosconf);
  874. writel(0x00002455, &axi_qos->qosctset0);
  875. writel(0x00000001, &axi_qos->qosreqctr);
  876. writel(0x00002050, &axi_qos->qosthres0);
  877. writel(0x00002032, &axi_qos->qosthres1);
  878. writel(0x00002014, &axi_qos->qosthres2);
  879. writel(0x00000001, &axi_qos->qosqon);
  880. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC0W_BASE;
  881. writel(0x00000100, &axi_qos->qosconf);
  882. writel(0x00002455, &axi_qos->qosctset0);
  883. writel(0x00000001, &axi_qos->qosreqctr);
  884. writel(0x00002050, &axi_qos->qosthres0);
  885. writel(0x00002032, &axi_qos->qosthres1);
  886. writel(0x00002014, &axi_qos->qosthres2);
  887. writel(0x00000001, &axi_qos->qosqon);
  888. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE1R_BASE;
  889. writel(0x00000100, &axi_qos->qosconf);
  890. writel(0x0000204C, &axi_qos->qosctset0);
  891. writel(0x00000001, &axi_qos->qosreqctr);
  892. writel(0x00002050, &axi_qos->qosthres0);
  893. writel(0x00002032, &axi_qos->qosthres1);
  894. writel(0x00002014, &axi_qos->qosthres2);
  895. writel(0x00000001, &axi_qos->qosqon);
  896. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE1W_BASE;
  897. writel(0x00000100, &axi_qos->qosconf);
  898. writel(0x00002200, &axi_qos->qosctset0);
  899. writel(0x00000001, &axi_qos->qosreqctr);
  900. writel(0x00002050, &axi_qos->qosthres0);
  901. writel(0x00002032, &axi_qos->qosthres1);
  902. writel(0x00002014, &axi_qos->qosthres2);
  903. writel(0x00000001, &axi_qos->qosqon);
  904. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC1R_BASE;
  905. writel(0x00000100, &axi_qos->qosconf);
  906. writel(0x00002455, &axi_qos->qosctset0);
  907. writel(0x00000001, &axi_qos->qosreqctr);
  908. writel(0x00002050, &axi_qos->qosthres0);
  909. writel(0x00002032, &axi_qos->qosthres1);
  910. writel(0x00002014, &axi_qos->qosthres2);
  911. writel(0x00000001, &axi_qos->qosqon);
  912. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC1W_BASE;
  913. writel(0x00000100, &axi_qos->qosconf);
  914. writel(0x00002455, &axi_qos->qosctset0);
  915. writel(0x00000001, &axi_qos->qosreqctr);
  916. writel(0x00002050, &axi_qos->qosthres0);
  917. writel(0x00002032, &axi_qos->qosthres1);
  918. writel(0x00002014, &axi_qos->qosthres2);
  919. writel(0x00000001, &axi_qos->qosqon);
  920. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE2R_BASE;
  921. writel(0x00000100, &axi_qos->qosconf);
  922. writel(0x0000204C, &axi_qos->qosctset0);
  923. writel(0x00000001, &axi_qos->qosreqctr);
  924. writel(0x00002050, &axi_qos->qosthres0);
  925. writel(0x00002032, &axi_qos->qosthres1);
  926. writel(0x00002014, &axi_qos->qosthres2);
  927. writel(0x00000001, &axi_qos->qosqon);
  928. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE2W_BASE;
  929. writel(0x00000100, &axi_qos->qosconf);
  930. writel(0x00002200, &axi_qos->qosctset0);
  931. writel(0x00000001, &axi_qos->qosreqctr);
  932. writel(0x00002050, &axi_qos->qosthres0);
  933. writel(0x00002032, &axi_qos->qosthres1);
  934. writel(0x00002014, &axi_qos->qosthres2);
  935. writel(0x00000001, &axi_qos->qosqon);
  936. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC2R_BASE;
  937. writel(0x00000100, &axi_qos->qosconf);
  938. writel(0x00002455, &axi_qos->qosctset0);
  939. writel(0x00000001, &axi_qos->qosreqctr);
  940. writel(0x00002050, &axi_qos->qosthres0);
  941. writel(0x00002032, &axi_qos->qosthres1);
  942. writel(0x00002014, &axi_qos->qosthres2);
  943. writel(0x00000001, &axi_qos->qosqon);
  944. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC2W_BASE;
  945. writel(0x00000100, &axi_qos->qosconf);
  946. writel(0x00002455, &axi_qos->qosctset0);
  947. writel(0x00000001, &axi_qos->qosreqctr);
  948. writel(0x00002050, &axi_qos->qosthres0);
  949. writel(0x00002032, &axi_qos->qosthres1);
  950. writel(0x00002014, &axi_qos->qosthres2);
  951. writel(0x00000001, &axi_qos->qosqon);
  952. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE3R_BASE;
  953. writel(0x00000100, &axi_qos->qosconf);
  954. writel(0x0000204C, &axi_qos->qosctset0);
  955. writel(0x00000001, &axi_qos->qosreqctr);
  956. writel(0x00002050, &axi_qos->qosthres0);
  957. writel(0x00002032, &axi_qos->qosthres1);
  958. writel(0x00002014, &axi_qos->qosthres2);
  959. writel(0x00000001, &axi_qos->qosqon);
  960. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE3W_BASE;
  961. writel(0x00000100, &axi_qos->qosconf);
  962. writel(0x00002200, &axi_qos->qosctset0);
  963. writel(0x00000001, &axi_qos->qosreqctr);
  964. writel(0x00002050, &axi_qos->qosthres0);
  965. writel(0x00002032, &axi_qos->qosthres1);
  966. writel(0x00002014, &axi_qos->qosthres2);
  967. writel(0x00000001, &axi_qos->qosqon);
  968. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC3R_BASE;
  969. writel(0x00000100, &axi_qos->qosconf);
  970. writel(0x00002455, &axi_qos->qosctset0);
  971. writel(0x00000001, &axi_qos->qosreqctr);
  972. writel(0x00002050, &axi_qos->qosthres0);
  973. writel(0x00002032, &axi_qos->qosthres1);
  974. writel(0x00002014, &axi_qos->qosthres2);
  975. writel(0x00000001, &axi_qos->qosqon);
  976. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC3W_BASE;
  977. writel(0x00000100, &axi_qos->qosconf);
  978. writel(0x00002455, &axi_qos->qosctset0);
  979. writel(0x00000001, &axi_qos->qosreqctr);
  980. writel(0x00002050, &axi_qos->qosthres0);
  981. writel(0x00002032, &axi_qos->qosthres1);
  982. writel(0x00002014, &axi_qos->qosthres2);
  983. writel(0x00000001, &axi_qos->qosqon);
  984. /* DMS Register(SYS-AXI) */
  985. writel(0x00000000, SYS_AXI_AVBDMSCR);
  986. writel(0x00000000, SYS_AXI_AX2MDMSCR);
  987. writel(0x00000000, SYS_AXI_CC50DMSCR);
  988. writel(0x00000000, SYS_AXI_CCIDMSCR);
  989. writel(0x00000000, SYS_AXI_CSDMSCR);
  990. writel(0x00000000, SYS_AXI_G2DDMSCR);
  991. writel(0x00000000, SYS_AXI_IMP1DMSCR);
  992. writel(0x00000000, SYS_AXI_LBSMDMSCR);
  993. writel(0x00000000, SYS_AXI_MMUDSDMSCR);
  994. writel(0x00000000, SYS_AXI_MMUMXDMSCR);
  995. writel(0x00000000, SYS_AXI_MMUS0DMSCR);
  996. writel(0x00000000, SYS_AXI_MMUS1DMSCR);
  997. writel(0x00000000, SYS_AXI_RTMXDMSCR);
  998. writel(0x00000000, SYS_AXI_SDM0DMSCR);
  999. writel(0x00000000, SYS_AXI_SDM1DMSCR);
  1000. writel(0x00000000, SYS_AXI_SDS0DMSCR);
  1001. writel(0x00000000, SYS_AXI_SDS1DMSCR);
  1002. writel(0x00000000, SYS_AXI_TRABDMSCR);
  1003. writel(0x00000000, SYS_AXI_X128TO64SLVDMSCR);
  1004. writel(0x00000000, SYS_AXI_X64TO128SLVDMSCR);
  1005. writel(0x00000000, SYS_AXI_AVBSLVDMSCR);
  1006. writel(0x00000000, SYS_AXI_AX2SLVDMSCR);
  1007. writel(0x00000000, SYS_AXI_GICSLVDMSCR);
  1008. writel(0x00000000, SYS_AXI_IMPSLVDMSCR);
  1009. writel(0x00000000, SYS_AXI_IMPSLVDMSCR);
  1010. writel(0x00000000, SYS_AXI_IMX0SLVDMSCR);
  1011. writel(0x00000000, SYS_AXI_IMX1SLVDMSCR);
  1012. writel(0x00000000, SYS_AXI_IMX2SLVDMSCR);
  1013. writel(0x00000000, SYS_AXI_LBSSLVDMSCR);
  1014. writel(0x00000000, SYS_AXI_MXTSLVDMSCR);
  1015. writel(0x00000000, SYS_AXI_SYAPBSLVDMSCR);
  1016. writel(0x00000000, SYS_AXI_QSAPBSLVDMSCR);
  1017. writel(0x00000000, SYS_AXI_RTXSLVDMSCR);
  1018. writel(0x00000000, SYS_AXI_SAPC1SLVDMSCR);
  1019. writel(0x00000000, SYS_AXI_SAPC2SLVDMSCR);
  1020. writel(0x00000000, SYS_AXI_SAPC3SLVDMSCR);
  1021. writel(0x00000000, SYS_AXI_SAPC65SLVDMSCR);
  1022. writel(0x00000000, SYS_AXI_SAPC8SLVDMSCR);
  1023. writel(0x00000000, SYS_AXI_SDAP0SLVDMSCR);
  1024. writel(0x00000000, SYS_AXI_SGXSLV1SLVDMSCR);
  1025. writel(0x00000000, SYS_AXI_STBSLVDMSCR);
  1026. writel(0x00000000, SYS_AXI_STMSLVDMSCR);
  1027. writel(0x00000000, SYS_AXI_SYXXDEFAULTSLAVESLVDMSCR);
  1028. writel(0x00000000, SYS_AXI_TSPL0SLVDMSCR);
  1029. writel(0x00000000, SYS_AXI_TSPL1SLVDMSCR);
  1030. writel(0x00000000, SYS_AXI_TSPL2SLVDMSCR);
  1031. writel(0x00000000, SYS_AXI_UTLBDSSLVDMSCR);
  1032. writel(0x00000000, SYS_AXI_UTLBS0SLVDMSCR);
  1033. writel(0x00000000, SYS_AXI_UTLBS1SLVDMSCR);
  1034. writel(0x00000000, SYS_AXI_ROT0DMSCR);
  1035. writel(0x00000000, SYS_AXI_ROT1DMSCR);
  1036. writel(0x00000000, SYS_AXI_ROT2DMSCR);
  1037. writel(0x00000000, SYS_AXI_ROT3DMSCR);
  1038. writel(0x00000000, SYS_AXI_ROT4DMSCR);
  1039. writel(0x00000000, SYS_AXI_IMUX3SLVDMSCR);
  1040. writel(0x00000000, SYS_AXI_STBR0SLVDMSCR);
  1041. writel(0x00000000, SYS_AXI_STBR0PSLVDMSCR);
  1042. writel(0x00000000, SYS_AXI_STBR0XSLVDMSCR);
  1043. writel(0x00000000, SYS_AXI_STBR1SLVDMSCR);
  1044. writel(0x00000000, SYS_AXI_STBR1PSLVDMSCR);
  1045. writel(0x00000000, SYS_AXI_STBR1XSLVDMSCR);
  1046. writel(0x00000000, SYS_AXI_STBR2SLVDMSCR);
  1047. writel(0x00000000, SYS_AXI_STBR2PSLVDMSCR);
  1048. writel(0x00000000, SYS_AXI_STBR2XSLVDMSCR);
  1049. writel(0x00000000, SYS_AXI_STBR3SLVDMSCR);
  1050. writel(0x00000000, SYS_AXI_STBR3PSLVDMSCR);
  1051. writel(0x00000000, SYS_AXI_STBR3XSLVDMSCR);
  1052. writel(0x00000000, SYS_AXI_STBR4SLVDMSCR);
  1053. writel(0x00000000, SYS_AXI_STBR4PSLVDMSCR);
  1054. writel(0x00000000, SYS_AXI_STBR4XSLVDMSCR);
  1055. writel(0x00000000, SYS_AXI_ADM_DMSCR);
  1056. writel(0x00000000, SYS_AXI_ADS_DMSCR);
  1057. /* DMS Register(RT-AXI) */
  1058. writel(0x00000000, DM_AXI_DMAXICONF);
  1059. writel(0x00000019, DM_AXI_DMAPBCONF);
  1060. writel(0x00000000, DM_AXI_DMADMCONF);
  1061. writel(0x00000000, DM_AXI_DMSDM0CONF);
  1062. writel(0x00000000, DM_AXI_DMSDM1CONF);
  1063. writel(0x00000004, DM_AXI_DMQSPAPSLVCONF);
  1064. writel(0x00000004, DM_AXI_RAPD4SLVCONF);
  1065. writel(0x00000004, DM_AXI_SAPD4SLVCONF);
  1066. writel(0x00000004, DM_AXI_SAPD5SLVCONF);
  1067. writel(0x00000004, DM_AXI_SAPD6SLVCONF);
  1068. writel(0x00000004, DM_AXI_SAPD65DSLVCONF);
  1069. writel(0x00000004, DM_AXI_SDAP0SLVCONF);
  1070. writel(0x00000004, DM_AXI_MAPD2SLVCONF);
  1071. writel(0x00000004, DM_AXI_MAPD3SLVCONF);
  1072. writel(0x00000000, DM_AXI_DMXXDEFAULTSLAVESLVCONF);
  1073. writel(0x00000100, DM_AXI_DMADMRQOSCONF);
  1074. writel(0x0000214C, DM_AXI_DMADMRQOSCTSET0);
  1075. writel(0x00000001, DM_AXI_DMADMRQOSREQCTR);
  1076. writel(0x00000001, DM_AXI_DMADMRQOSQON);
  1077. writel(0x00000005, DM_AXI_DMADMRQOSIN);
  1078. writel(0x00000000, DM_AXI_DMADMRQOSSTAT);
  1079. writel(0x00000000, DM_AXI_DMSDM0RQOSCONF);
  1080. writel(0x0000214C, DM_AXI_DMSDM0RQOSCTSET0);
  1081. writel(0x00000001, DM_AXI_DMSDM0RQOSREQCTR);
  1082. writel(0x00000001, DM_AXI_DMSDM0RQOSQON);
  1083. writel(0x00000005, DM_AXI_DMSDM0RQOSIN);
  1084. writel(0x00000000, DM_AXI_DMSDM0RQOSSTAT);
  1085. writel(0x00000000, DM_AXI_DMSDM1RQOSCONF);
  1086. writel(0x0000214C, DM_AXI_DMSDM1RQOSCTSET0);
  1087. writel(0x00000001, DM_AXI_DMSDM1RQOSREQCTR);
  1088. writel(0x00000001, DM_AXI_DMSDM1RQOSQON);
  1089. writel(0x00000005, DM_AXI_DMSDM1RQOSIN);
  1090. writel(0x00000000, DM_AXI_DMSDM1RQOSSTAT);
  1091. writel(0x00002041, DM_AXI_DMRQOSCTSET1);
  1092. writel(0x00002023, DM_AXI_DMRQOSCTSET2);
  1093. writel(0x0000200A, DM_AXI_DMRQOSCTSET3);
  1094. writel(0x00002050, DM_AXI_DMRQOSTHRES0);
  1095. writel(0x00002032, DM_AXI_DMRQOSTHRES1);
  1096. writel(0x00002014, DM_AXI_DMRQOSTHRES2);
  1097. writel(0x00000100, DM_AXI_DMADMWQOSCONF);
  1098. writel(0x0000214C, DM_AXI_DMADMWQOSCTSET0);
  1099. writel(0x00000001, DM_AXI_DMADMWQOSREQCTR);
  1100. writel(0x00000001, DM_AXI_DMADMWQOSQON);
  1101. writel(0x00000005, DM_AXI_DMADMWQOSIN);
  1102. writel(0x00000000, DM_AXI_DMADMWQOSSTAT);
  1103. writel(0x00000000, DM_AXI_DMSDM0WQOSCONF);
  1104. writel(0x0000214C, DM_AXI_DMSDM0WQOSCTSET0);
  1105. writel(0x00000001, DM_AXI_DMSDM0WQOSREQCTR);
  1106. writel(0x00000001, DM_AXI_DMSDM0WQOSQON);
  1107. writel(0x00000005, DM_AXI_DMSDM0WQOSIN);
  1108. writel(0x00000000, DM_AXI_DMSDM0WQOSSTAT);
  1109. writel(0x00000000, DM_AXI_DMSDM1WQOSCONF);
  1110. writel(0x0000214C, DM_AXI_DMSDM1WQOSCTSET0);
  1111. writel(0x00000001, DM_AXI_DMSDM1WQOSREQCTR);
  1112. writel(0x00000001, DM_AXI_DMSDM1WQOSQON);
  1113. writel(0x00000005, DM_AXI_DMSDM1WQOSIN);
  1114. writel(0x00000000, DM_AXI_DMSDM1WQOSSTAT);
  1115. writel(0x00002041, DM_AXI_DMWQOSCTSET1);
  1116. writel(0x00002023, DM_AXI_DMWQOSCTSET2);
  1117. writel(0x0000200A, DM_AXI_DMWQOSCTSET3);
  1118. writel(0x00002050, DM_AXI_DMWQOSTHRES0);
  1119. writel(0x00002032, DM_AXI_DMWQOSTHRES1);
  1120. writel(0x00002014, DM_AXI_DMWQOSTHRES2);
  1121. writel(0x00000000, DM_AXI_RDMDMSCR);
  1122. writel(0x00000000, DM_AXI_SDM0DMSCR);
  1123. writel(0x00000000, DM_AXI_SDM1DMSCR);
  1124. writel(0x00000000, DM_AXI_DMQSPAPSLVDMSCR);
  1125. writel(0x00000000, DM_AXI_RAPD4SLVDMSCR);
  1126. writel(0x00000000, DM_AXI_SAPD4SLVDMSCR);
  1127. writel(0x00000000, DM_AXI_SAPD5SLVDMSCR);
  1128. writel(0x00000000, DM_AXI_SAPD6SLVDMSCR);
  1129. writel(0x00000000, DM_AXI_SAPD65DSLVDMSCR);
  1130. writel(0x00000000, DM_AXI_SDAP0SLVDMSCR);
  1131. writel(0x00000000, DM_AXI_MAPD2SLVDMSCR);
  1132. writel(0x00000000, DM_AXI_MAPD3SLVDMSCR);
  1133. writel(0x00000000, DM_AXI_DMXXDEFAULTSLAVESLVDMSCR);
  1134. writel(0x00000001, DM_AXI_DMXREGDMSENN);
  1135. /* DMS Register(SYS-AXI256) */
  1136. writel(0x00000000, SYS_AXI256_SYXDMSCR);
  1137. writel(0x00000000, SYS_AXI256_MXIDMSCR);
  1138. writel(0x00000000, SYS_AXI256_X128TO256SLVDMSCR);
  1139. writel(0x00000000, SYS_AXI256_X256TO128SLVDMSCR);
  1140. writel(0x00000000, SYS_AXI256_SYXSLVDMSCR);
  1141. writel(0x00000000, SYS_AXI256_CCXSLVDMSCR);
  1142. writel(0x00000000, SYS_AXI256_S3CSLVDMSCR);
  1143. /* DMS Register(MXT) */
  1144. writel(0x00000000, MXT_SYXDMSCR);
  1145. writel(0x00000000, MXT_IMRSLVDMSCR);
  1146. writel(0x00000000, MXT_VINSLVDMSCR);
  1147. writel(0x00000000, MXT_VPC1SLVDMSCR);
  1148. writel(0x00000000, MXT_VSPD0SLVDMSCR);
  1149. writel(0x00000000, MXT_VSPD1SLVDMSCR);
  1150. writel(0x00000000, MXT_MAP1SLVDMSCR);
  1151. writel(0x00000000, MXT_MAP2SLVDMSCR);
  1152. writel(0x00000000, MXT_MAP2BSLVDMSCR);
  1153. /* DMS Register(MXI) */
  1154. writel(0x00000002, MXI_JPURDMSCR);
  1155. writel(0x00000002, MXI_JPUWDMSCR);
  1156. writel(0x00000002, MXI_VCTU0RDMSCR);
  1157. writel(0x00000002, MXI_VCTU0WDMSCR);
  1158. writel(0x00000002, MXI_VDCTU0RDMSCR);
  1159. writel(0x00000002, MXI_VDCTU0WDMSCR);
  1160. writel(0x00000002, MXI_VDCTU1RDMSCR);
  1161. writel(0x00000002, MXI_VDCTU1WDMSCR);
  1162. writel(0x00000002, MXI_VIN0WDMSCR);
  1163. writel(0x00000002, MXI_VIN1WDMSCR);
  1164. writel(0x00000002, MXI_RDRWDMSCR);
  1165. writel(0x00000002, MXI_IMS01RDMSCR);
  1166. writel(0x00000002, MXI_IMS01WDMSCR);
  1167. writel(0x00000002, MXI_IMS23RDMSCR);
  1168. writel(0x00000002, MXI_IMS23WDMSCR);
  1169. writel(0x00000002, MXI_IMS45RDMSCR);
  1170. writel(0x00000002, MXI_IMS45WDMSCR);
  1171. writel(0x00000002, MXI_IMRRDMSCR);
  1172. writel(0x00000002, MXI_IMRWDMSCR);
  1173. writel(0x00000002, MXI_ROTCE4RDMSCR);
  1174. writel(0x00000002, MXI_ROTCE4WDMSCR);
  1175. writel(0x00000002, MXI_ROTVLC4RDMSCR);
  1176. writel(0x00000002, MXI_ROTVLC4WDMSCR);
  1177. writel(0x00000002, MXI_VSPD0RDMSCR);
  1178. writel(0x00000002, MXI_VSPD0WDMSCR);
  1179. writel(0x00000002, MXI_VSPD1RDMSCR);
  1180. writel(0x00000002, MXI_VSPD1WDMSCR);
  1181. writel(0x00000002, MXI_DU0RDMSCR);
  1182. writel(0x00000002, MXI_DU0WDMSCR);
  1183. writel(0x00000002, MXI_VSP0RDMSCR);
  1184. writel(0x00000002, MXI_VSP0WDMSCR);
  1185. writel(0x00000002, MXI_ROTCE0RDMSCR);
  1186. writel(0x00000002, MXI_ROTCE0WDMSCR);
  1187. writel(0x00000002, MXI_ROTVLC0RDMSCR);
  1188. writel(0x00000002, MXI_ROTVLC0WDMSCR);
  1189. writel(0x00000002, MXI_ROTCE1RDMSCR);
  1190. writel(0x00000002, MXI_ROTCE1WDMSCR);
  1191. writel(0x00000002, MXI_ROTVLC1RDMSCR);
  1192. writel(0x00000002, MXI_ROTVLC1WDMSCR);
  1193. writel(0x00000002, MXI_ROTCE2RDMSCR);
  1194. writel(0x00000002, MXI_ROTCE2WDMSCR);
  1195. writel(0x00000002, MXI_ROTVLC2RDMSCR);
  1196. writel(0x00000002, MXI_ROTVLC2WDMSCR);
  1197. writel(0x00000002, MXI_ROTCE3RDMSCR);
  1198. writel(0x00000002, MXI_ROTCE3WDMSCR);
  1199. writel(0x00000002, MXI_ROTVLC3RDMSCR);
  1200. writel(0x00000002, MXI_ROTVLC3WDMSCR);
  1201. /* DMS Register(CCI-AXI) */
  1202. writel(0x00000000, CCI_AXI_MMUS0DMSCR);
  1203. writel(0x00000000, CCI_AXI_SYX2DMSCR);
  1204. writel(0x00000000, CCI_AXI_MMURDMSCR);
  1205. writel(0x00000000, CCI_AXI_MMUDSDMSCR);
  1206. writel(0x00000000, CCI_AXI_MMUMDMSCR);
  1207. writel(0x00000000, CCI_AXI_MXIDMSCR);
  1208. writel(0x00000000, CCI_AXI_MMUS1DMSCR);
  1209. writel(0x00000000, CCI_AXI_MMUMPDMSCR);
  1210. writel(0x00000000, CCI_AXI_DVMDMSCR);
  1211. writel(0x00000000, CCI_AXI_CCISLVDMSCR);
  1212. /* CC-AXI Function Register */
  1213. writel(0x00000011, CCI_AXI_IPMMUIDVMCR);
  1214. writel(0x00000011, CCI_AXI_IPMMURDVMCR);
  1215. writel(0x00000011, CCI_AXI_IPMMUS0DVMCR);
  1216. writel(0x00000011, CCI_AXI_IPMMUS1DVMCR);
  1217. writel(0x00000011, CCI_AXI_IPMMUMPDVMCR);
  1218. writel(0x00000011, CCI_AXI_IPMMUDSDVMCR);
  1219. writel(0x0000F700, CCI_AXI_AX2ADDRMASK);
  1220. }
  1221. #else /* CONFIG_RMOBILE_EXTRAM_BOOT */
  1222. void qos_init(void)
  1223. {
  1224. }
  1225. #endif /* CONFIG_RMOBILE_EXTRAM_BOOT */