as3722_init.h 1.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2013
  4. * NVIDIA Corporation <www.nvidia.com>
  5. */
  6. /* AS3722-PMIC-specific early init regs */
  7. #define AS3722_I2C_ADDR 0x80
  8. #define AS3722_SD0VOLTAGE_REG 0x00 /* CPU */
  9. #define AS3722_SD1VOLTAGE_REG 0x01 /* CORE, already set by OTP */
  10. #define AS3722_SD6VOLTAGE_REG 0x06 /* GPU */
  11. #define AS3722_SDCONTROL_REG 0x4D
  12. #define AS3722_LDO2VOLTAGE_REG 0x12 /* VPP_FUSE */
  13. #define AS3722_LDO6VOLTAGE_REG 0x16 /* VDD_SDMMC */
  14. #define AS3722_LDCONTROL_REG 0x4E
  15. #if defined(CONFIG_TARGET_VENICE2)
  16. #define AS3722_SD0VOLTAGE_DATA (0x2800 | AS3722_SD0VOLTAGE_REG)
  17. #else /* TK1 or Nyan-Big */
  18. #define AS3722_SD0VOLTAGE_DATA (0x3C00 | AS3722_SD0VOLTAGE_REG)
  19. #endif
  20. #define AS3722_SD0CONTROL_DATA (0x0100 | AS3722_SDCONTROL_REG)
  21. #if defined(CONFIG_TARGET_JETSON_TK1) || defined(CONFIG_TARGET_CEI_TK1_SOM)
  22. #define AS3722_SD1VOLTAGE_DATA (0x2800 | AS3722_SD1VOLTAGE_REG)
  23. #define AS3722_SD1CONTROL_DATA (0x0200 | AS3722_SDCONTROL_REG)
  24. #endif
  25. #define AS3722_SD6CONTROL_DATA (0x4000 | AS3722_SDCONTROL_REG)
  26. #define AS3722_SD6VOLTAGE_DATA (0x2800 | AS3722_SD6VOLTAGE_REG)
  27. #define AS3722_LDO2CONTROL_DATA (0x0400 | AS3722_LDCONTROL_REG)
  28. #define AS3722_LDO2VOLTAGE_DATA (0x1000 | AS3722_LDO2VOLTAGE_REG)
  29. #define AS3722_LDO6CONTROL_DATA (0x4000 | AS3722_LDCONTROL_REG)
  30. #define AS3722_LDO6VOLTAGE_DATA (0x3F00 | AS3722_LDO6VOLTAGE_REG)
  31. #define I2C_SEND_2_BYTES 0x0A02
  32. void pmic_enable_cpu_vdd(void);