gsc.c 7.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2013 Gateworks Corporation
  4. *
  5. * Author: Tim Harvey <tharvey@gateworks.com>
  6. */
  7. #include <common.h>
  8. #include <command.h>
  9. #include <log.h>
  10. #include <linux/delay.h>
  11. #include <linux/errno.h>
  12. #include <common.h>
  13. #include <i2c.h>
  14. #include <linux/ctype.h>
  15. #include "ventana_eeprom.h"
  16. #include "gsc.h"
  17. /*
  18. * The Gateworks System Controller will fail to ACK a master transaction if
  19. * it is busy, which can occur during its 1HZ timer tick while reading ADC's.
  20. * When this does occur, it will never be busy long enough to fail more than
  21. * 2 back-to-back transfers. Thus we wrap i2c_read and i2c_write with
  22. * 3 retries.
  23. */
  24. int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
  25. {
  26. int retry = 3;
  27. int n = 0;
  28. int ret;
  29. while (n++ < retry) {
  30. ret = i2c_read(chip, addr, alen, buf, len);
  31. if (!ret)
  32. break;
  33. debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr,
  34. n, ret);
  35. if (ret != -ENODEV)
  36. break;
  37. mdelay(10);
  38. }
  39. return ret;
  40. }
  41. int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
  42. {
  43. int retry = 3;
  44. int n = 0;
  45. int ret;
  46. while (n++ < retry) {
  47. ret = i2c_write(chip, addr, alen, buf, len);
  48. if (!ret)
  49. break;
  50. debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr,
  51. n, ret);
  52. if (ret != -ENODEV)
  53. break;
  54. mdelay(10);
  55. }
  56. mdelay(100);
  57. return ret;
  58. }
  59. static void read_hwmon(const char *name, uint reg, uint size)
  60. {
  61. unsigned char buf[3];
  62. uint ui;
  63. printf("%-8s:", name);
  64. memset(buf, 0, sizeof(buf));
  65. if (gsc_i2c_read(GSC_HWMON_ADDR, reg, 1, buf, size)) {
  66. puts("fRD\n");
  67. } else {
  68. ui = buf[0] | (buf[1]<<8) | (buf[2]<<16);
  69. if (size == 2 && ui > 0x8000)
  70. ui -= 0xffff;
  71. if (ui == 0xffffff)
  72. puts("invalid\n");
  73. else
  74. printf("%d\n", ui);
  75. }
  76. }
  77. int gsc_info(int verbose)
  78. {
  79. unsigned char buf[16];
  80. i2c_set_bus_num(0);
  81. if (gsc_i2c_read(GSC_SC_ADDR, 0, 1, buf, 16))
  82. return CMD_RET_FAILURE;
  83. printf("GSC: v%d", buf[GSC_SC_FWVER]);
  84. printf(" 0x%04x", buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC+1]<<8);
  85. printf(" WDT:%sabled", (buf[GSC_SC_CTRL1] & (1<<GSC_SC_CTRL1_WDEN))
  86. ? "en" : "dis");
  87. if (buf[GSC_SC_STATUS] & (1 << GSC_SC_IRQ_WATCHDOG)) {
  88. buf[GSC_SC_STATUS] &= ~(1 << GSC_SC_IRQ_WATCHDOG);
  89. puts(" WDT_RESET");
  90. gsc_i2c_write(GSC_SC_ADDR, GSC_SC_STATUS, 1,
  91. &buf[GSC_SC_STATUS], 1);
  92. }
  93. if (!gsc_i2c_read(GSC_HWMON_ADDR, GSC_HWMON_TEMP, 1, buf, 2)) {
  94. int ui = buf[0] | buf[1]<<8;
  95. if (ui > 0x8000)
  96. ui -= 0xffff;
  97. printf(" board temp at %dC", ui / 10);
  98. }
  99. puts("\n");
  100. if (!verbose)
  101. return CMD_RET_SUCCESS;
  102. read_hwmon("Temp", GSC_HWMON_TEMP, 2);
  103. read_hwmon("VIN", GSC_HWMON_VIN, 3);
  104. read_hwmon("VBATT", GSC_HWMON_VBATT, 3);
  105. read_hwmon("VDD_3P3", GSC_HWMON_VDD_3P3, 3);
  106. read_hwmon("VDD_ARM", GSC_HWMON_VDD_CORE, 3);
  107. read_hwmon("VDD_SOC", GSC_HWMON_VDD_SOC, 3);
  108. read_hwmon("VDD_HIGH", GSC_HWMON_VDD_HIGH, 3);
  109. read_hwmon("VDD_DDR", GSC_HWMON_VDD_DDR, 3);
  110. read_hwmon("VDD_5P0", GSC_HWMON_VDD_5P0, 3);
  111. if (strncasecmp((const char*) ventana_info.model, "GW553", 5))
  112. read_hwmon("VDD_2P5", GSC_HWMON_VDD_2P5, 3);
  113. read_hwmon("VDD_1P8", GSC_HWMON_VDD_1P8, 3);
  114. read_hwmon("VDD_IO2", GSC_HWMON_VDD_IO2, 3);
  115. switch (ventana_info.model[3]) {
  116. case '1': /* GW51xx */
  117. read_hwmon("VDD_IO3", GSC_HWMON_VDD_IO4, 3); /* -C rev */
  118. break;
  119. case '2': /* GW52xx */
  120. break;
  121. case '3': /* GW53xx */
  122. read_hwmon("VDD_IO4", GSC_HWMON_VDD_IO4, 3); /* -C rev */
  123. read_hwmon("VDD_GPS", GSC_HWMON_VDD_IO3, 3);
  124. break;
  125. case '4': /* GW54xx */
  126. read_hwmon("VDD_IO3", GSC_HWMON_VDD_IO4, 3); /* -C rev */
  127. read_hwmon("VDD_GPS", GSC_HWMON_VDD_IO3, 3);
  128. break;
  129. case '5': /* GW55xx */
  130. break;
  131. case '6': /* GW560x */
  132. read_hwmon("VDD_IO4", GSC_HWMON_VDD_IO4, 3);
  133. read_hwmon("VDD_GPS", GSC_HWMON_VDD_IO3, 3);
  134. break;
  135. case '9': /* GW590x */
  136. read_hwmon("AMONBMON", GSC_HWMON_VDD_IO3, 3);
  137. read_hwmon("BAT_VOLT", GSC_HWMON_VDD_EXT, 3);
  138. read_hwmon("BAT_TEMP", GSC_HWMON_VDD_IO4, 2);
  139. }
  140. return 0;
  141. }
  142. /*
  143. * The Gateworks System Controller implements a boot
  144. * watchdog (always enabled) as a workaround for IMX6 boot related
  145. * errata such as:
  146. * ERR005768 - no fix scheduled
  147. * ERR006282 - fixed in silicon r1.2
  148. * ERR007117 - fixed in silicon r1.3
  149. * ERR007220 - fixed in silicon r1.3
  150. * ERR007926 - no fix scheduled
  151. * see http://cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf
  152. *
  153. * Disable the boot watchdog
  154. */
  155. int gsc_boot_wd_disable(void)
  156. {
  157. u8 reg;
  158. i2c_set_bus_num(CONFIG_I2C_GSC);
  159. if (!gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1)) {
  160. reg |= (1 << GSC_SC_CTRL1_WDDIS);
  161. if (!gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
  162. return 0;
  163. }
  164. puts("Error: could not disable GSC Watchdog\n");
  165. return 1;
  166. }
  167. #if defined(CONFIG_CMD_GSC) && !defined(CONFIG_SPL_BUILD)
  168. static int do_gsc_sleep(struct cmd_tbl *cmdtp, int flag, int argc,
  169. char *const argv[])
  170. {
  171. unsigned char reg;
  172. unsigned long secs = 0;
  173. if (argc < 2)
  174. return CMD_RET_USAGE;
  175. secs = simple_strtoul(argv[1], NULL, 10);
  176. printf("GSC Sleeping for %ld seconds\n", secs);
  177. i2c_set_bus_num(0);
  178. reg = (secs >> 24) & 0xff;
  179. if (gsc_i2c_write(GSC_SC_ADDR, 9, 1, &reg, 1))
  180. goto error;
  181. reg = (secs >> 16) & 0xff;
  182. if (gsc_i2c_write(GSC_SC_ADDR, 8, 1, &reg, 1))
  183. goto error;
  184. reg = (secs >> 8) & 0xff;
  185. if (gsc_i2c_write(GSC_SC_ADDR, 7, 1, &reg, 1))
  186. goto error;
  187. reg = secs & 0xff;
  188. if (gsc_i2c_write(GSC_SC_ADDR, 6, 1, &reg, 1))
  189. goto error;
  190. if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
  191. goto error;
  192. reg |= (1 << 2);
  193. if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
  194. goto error;
  195. reg &= ~(1 << 2);
  196. reg |= 0x3;
  197. if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
  198. goto error;
  199. return CMD_RET_SUCCESS;
  200. error:
  201. printf("i2c error\n");
  202. return CMD_RET_FAILURE;
  203. }
  204. static int do_gsc_wd(struct cmd_tbl *cmdtp, int flag, int argc,
  205. char *const argv[])
  206. {
  207. unsigned char reg;
  208. if (argc < 2)
  209. return CMD_RET_USAGE;
  210. if (strcasecmp(argv[1], "enable") == 0) {
  211. int timeout = 0;
  212. if (argc > 2)
  213. timeout = simple_strtoul(argv[2], NULL, 10);
  214. i2c_set_bus_num(0);
  215. if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
  216. return CMD_RET_FAILURE;
  217. reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME));
  218. if (timeout == 60)
  219. reg |= (1 << GSC_SC_CTRL1_WDTIME);
  220. else
  221. timeout = 30;
  222. reg |= (1 << GSC_SC_CTRL1_WDEN);
  223. if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
  224. return CMD_RET_FAILURE;
  225. printf("GSC Watchdog enabled with timeout=%d seconds\n",
  226. timeout);
  227. } else if (strcasecmp(argv[1], "disable") == 0) {
  228. i2c_set_bus_num(0);
  229. if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
  230. return CMD_RET_FAILURE;
  231. reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME));
  232. if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
  233. return CMD_RET_FAILURE;
  234. printf("GSC Watchdog disabled\n");
  235. } else {
  236. return CMD_RET_USAGE;
  237. }
  238. return CMD_RET_SUCCESS;
  239. }
  240. static int do_gsc(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
  241. {
  242. if (argc < 2)
  243. return gsc_info(1);
  244. if (strcasecmp(argv[1], "wd") == 0)
  245. return do_gsc_wd(cmdtp, flag, --argc, ++argv);
  246. else if (strcasecmp(argv[1], "sleep") == 0)
  247. return do_gsc_sleep(cmdtp, flag, --argc, ++argv);
  248. return CMD_RET_USAGE;
  249. }
  250. U_BOOT_CMD(
  251. gsc, 4, 1, do_gsc, "GSC configuration",
  252. "[wd enable [30|60]]|[wd disable]|[sleep <secs>]\n"
  253. );
  254. #endif /* CONFIG_CMD_GSC */