README 4.3 KB

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  1. Overview
  2. --------
  3. MPC8572DS is a high-performance computing, evaluation and development platform
  4. supporting the mpc8572 PowerTM processor.
  5. Building U-Boot
  6. -----------
  7. make MPC8572DS_config
  8. make
  9. Flash Banks
  10. -----------
  11. MPC8572DS board has two flash banks. They are both present on boot, but their
  12. locations can be swapped using the dip-switch SW9[1:2].
  13. Booting is always from the boot bank at 0xec00_0000.
  14. Memory Map
  15. ----------
  16. 0xe800_0000 - 0xebff_ffff Alternate bank 64MB
  17. 0xec00_0000 - 0xefff_ffff Boot bank 64MB
  18. 0xebf8_0000 - 0xebff_ffff Alternate U-Boot address 512KB
  19. 0xeff8_0000 - 0xefff_ffff Boot U-Boot address 512KB
  20. Flashing Images
  21. ---------------
  22. To place a new U-Boot image in the alternate flash bank and then reset with that
  23. new image temporarily, use this:
  24. tftp 1000000 u-boot.bin
  25. erase ebf80000 ebffffff
  26. cp.b 1000000 ebf80000 80000
  27. pixis_reset altbank
  28. To program the image in the boot flash bank:
  29. tftp 1000000 u-boot.bin
  30. protect off all
  31. erase eff80000 ffffffff
  32. cp.b 1000000 eff80000 80000
  33. The pixis_reset command
  34. -----------------------
  35. The command - "pixis_reset", is introduced to reset mpc8572ds board
  36. using the FPGA sequencer. When the board restarts, it has the option
  37. of using either the current or alternate flash bank as the boot
  38. image, with or without the watchdog timer enabled, and finally with
  39. or without frequency changes.
  40. Usage is;
  41. pixis_reset
  42. pixis_reset altbank
  43. pixis_reset altbank wd
  44. pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>
  45. pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>
  46. Examples:
  47. /* reset to current bank, like "reset" command */
  48. pixis_reset
  49. /* reset board but use the to alternate flash bank */
  50. pixis_reset altbank
  51. Using the Device Tree Source File
  52. ---------------------------------
  53. To create the DTB (Device Tree Binary) image file,
  54. use a command similar to this:
  55. dtc -b 0 -f -I dts -O dtb mpc8572ds.dts > mpc8572ds.dtb
  56. Likely, that .dts file will come from here;
  57. linux-2.6/arch/powerpc/boot/dts/mpc8572ds.dts
  58. Booting Linux
  59. -------------
  60. Place a linux uImage in the TFTP disk area.
  61. tftp 1000000 uImage.8572
  62. tftp c00000 mpc8572ds.dtb
  63. bootm 1000000 - c00000
  64. Implementing AMP(Asymmetric MultiProcessing)
  65. -------------
  66. 1. Build kernel image for core0:
  67. a. $ make 85xx/mpc8572_ds_defconfig
  68. b. $ make menuconfig
  69. - un-select "Processor support"->"Symetric multi-processing support"
  70. c. $ make uImage
  71. d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core0
  72. 2. Build kernel image for core1:
  73. a. $ make 85xx/mpc8572_ds_defconfig
  74. b. $ make menuconfig
  75. - Un-select "Processor support"->"Symetric multi-processing support"
  76. - Select "Advanced setup" -> " Prompt for advanced kernel
  77. configuration options"
  78. - Select "Set physical address where the kernel is loaded" and
  79. set it to 0x20000000, assuming core1 will start from 512MB.
  80. - Select "Set custom page offset address"
  81. - Select "Set custom kernel base address"
  82. - Select "Set maximum low memory"
  83. - "Exit" and save the selection.
  84. c. $ make uImage
  85. d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core1
  86. 3. Create dtb for core0:
  87. $ dtc -I dts -O dtb -f -b 0 arch/powerpc/boot/dts/mpc8572ds_core0.dts > /tftpboot/mpc8572ds_core0.dtb
  88. 4. Create dtb for core1:
  89. $ dtc -I dts -O dtb -f -b 1 arch/powerpc/boot/dts/mpc8572ds_core1.dts > /tftpboot/mpc8572ds_core1.dtb
  90. 5. Bring up two cores separately:
  91. a. Power on the board, under U-Boot prompt:
  92. => setenv <serverip>
  93. => setenv <ipaddr>
  94. => setenv bootargs root=/dev/ram rw console=ttyS0,115200
  95. b. Bring up core1's kernel first:
  96. => setenv bootm_low 0x20000000
  97. => setenv bootm_size 0x10000000
  98. => tftp 21000000 8572/uImage.core1
  99. => tftp 22000000 8572/ramdiskfile
  100. => tftp 20c00000 8572/mpc8572ds_core1.dtb
  101. => interrupts off
  102. => bootm start 21000000 22000000 20c00000
  103. => bootm loados
  104. => bootm ramdisk
  105. => bootm fdt
  106. => fdt boardsetup
  107. => fdt chosen $initrd_start $initrd_end
  108. => bootm prep
  109. => cpu 1 release $bootm_low - $fdtaddr -
  110. c. Bring up core0's kernel(on the same U-Boot console):
  111. => setenv bootm_low 0
  112. => setenv bootm_size 0x20000000
  113. => tftp 1000000 8572/uImage.core0
  114. => tftp 2000000 8572/ramdiskfile
  115. => tftp c00000 8572/mpc8572ds_core0.dtb
  116. => bootm 1000000 2000000 c00000
  117. Please note only core0 will run U-Boot, core1 starts kernel directly after
  118. "cpu release" command is issued.