flash.c 7.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2000-2003
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. */
  6. #include <common.h>
  7. #include <console.h>
  8. #include <cpu_func.h>
  9. #include <flash.h>
  10. #include <irq_func.h>
  11. #include <uuid.h>
  12. #include <linux/delay.h>
  13. #define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
  14. #define FLASH_BANK_SIZE 0x200000
  15. flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
  16. void flash_print_info(flash_info_t *info)
  17. {
  18. int i;
  19. switch (info->flash_id & FLASH_VENDMASK) {
  20. case (AMD_MANUFACT & FLASH_VENDMASK):
  21. printf ("AMD: ");
  22. break;
  23. default:
  24. printf ("Unknown Vendor ");
  25. break;
  26. }
  27. switch (info->flash_id & FLASH_TYPEMASK) {
  28. case (AMD_ID_PL160CB & FLASH_TYPEMASK):
  29. printf ("AM29PL160CB (16Mbit)\n");
  30. break;
  31. default:
  32. printf ("Unknown Chip Type\n");
  33. goto Done;
  34. break;
  35. }
  36. printf (" Size: %ld MB in %d Sectors\n",
  37. info->size >> 20, info->sector_count);
  38. printf (" Sector Start Addresses:");
  39. for (i = 0; i < info->sector_count; i++) {
  40. if ((i % 5) == 0) {
  41. printf ("\n ");
  42. }
  43. printf (" %08lX%s", info->start[i],
  44. info->protect[i] ? " (RO)" : " ");
  45. }
  46. printf ("\n");
  47. Done:
  48. return;
  49. }
  50. unsigned long flash_init(void)
  51. {
  52. int i, j;
  53. ulong size = 0;
  54. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  55. ulong flashbase = 0;
  56. flash_info[i].flash_id =
  57. (AMD_MANUFACT & FLASH_VENDMASK) |
  58. (AMD_ID_PL160CB & FLASH_TYPEMASK);
  59. flash_info[i].size = FLASH_BANK_SIZE;
  60. flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
  61. memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
  62. if (i == 0)
  63. flashbase = PHYS_FLASH_1;
  64. else
  65. panic ("configured to many flash banks!\n");
  66. for (j = 0; j < flash_info[i].sector_count; j++) {
  67. if (j == 0) {
  68. /* 1st is 16 KiB */
  69. flash_info[i].start[j] = flashbase;
  70. }
  71. if ((j >= 1) && (j <= 2)) {
  72. /* 2nd and 3rd are 8 KiB */
  73. flash_info[i].start[j] =
  74. flashbase + 0x4000 + 0x2000 * (j - 1);
  75. }
  76. if (j == 3) {
  77. /* 4th is 224 KiB */
  78. flash_info[i].start[j] = flashbase + 0x8000;
  79. }
  80. if ((j >= 4) && (j <= 10)) {
  81. /* rest is 256 KiB */
  82. flash_info[i].start[j] =
  83. flashbase + 0x40000 + 0x40000 * (j -
  84. 4);
  85. }
  86. }
  87. size += flash_info[i].size;
  88. }
  89. flash_protect(FLAG_PROTECT_SET,
  90. CONFIG_SYS_FLASH_BASE,
  91. CONFIG_SYS_FLASH_BASE + 0x3ffff, &flash_info[0]);
  92. return size;
  93. }
  94. #define CMD_READ_ARRAY 0x00F0
  95. #define CMD_UNLOCK1 0x00AA
  96. #define CMD_UNLOCK2 0x0055
  97. #define CMD_ERASE_SETUP 0x0080
  98. #define CMD_ERASE_CONFIRM 0x0030
  99. #define CMD_PROGRAM 0x00A0
  100. #define CMD_UNLOCK_BYPASS 0x0020
  101. #define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555<<1)))
  102. #define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA<<1)))
  103. #define BIT_ERASE_DONE 0x0080
  104. #define BIT_RDY_MASK 0x0080
  105. #define BIT_PROGRAM_ERROR 0x0020
  106. #define BIT_TIMEOUT 0x80000000 /* our flag */
  107. #define READY 1
  108. #define ERR 2
  109. #define TMO 4
  110. int flash_erase(flash_info_t *info, int s_first, int s_last)
  111. {
  112. ulong result;
  113. int iflag, cflag, prot, sect;
  114. int rc = ERR_OK;
  115. int chip1;
  116. ulong start;
  117. /* first look for protection bits */
  118. if (info->flash_id == FLASH_UNKNOWN)
  119. return ERR_UNKNOWN_FLASH_TYPE;
  120. if ((s_first < 0) || (s_first > s_last)) {
  121. return ERR_INVAL;
  122. }
  123. if ((info->flash_id & FLASH_VENDMASK) !=
  124. (AMD_MANUFACT & FLASH_VENDMASK)) {
  125. return ERR_UNKNOWN_FLASH_VENDOR;
  126. }
  127. prot = 0;
  128. for (sect = s_first; sect <= s_last; ++sect) {
  129. if (info->protect[sect]) {
  130. prot++;
  131. }
  132. }
  133. if (prot)
  134. return ERR_PROTECTED;
  135. /*
  136. * Disable interrupts which might cause a timeout
  137. * here. Remember that our exception vectors are
  138. * at address 0 in the flash, and we don't want a
  139. * (ticker) exception to happen while the flash
  140. * chip is in programming mode.
  141. */
  142. cflag = icache_status();
  143. icache_disable();
  144. iflag = disable_interrupts();
  145. printf ("\n");
  146. /* Start erase on unprotected sectors */
  147. for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
  148. printf ("Erasing sector %2d ... ", sect);
  149. /* arm simple, non interrupt dependent timer */
  150. start = get_timer(0);
  151. if (info->protect[sect] == 0) { /* not protected */
  152. volatile u16 *addr =
  153. (volatile u16 *) (info->start[sect]);
  154. MEM_FLASH_ADDR1 = CMD_UNLOCK1;
  155. MEM_FLASH_ADDR2 = CMD_UNLOCK2;
  156. MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
  157. MEM_FLASH_ADDR1 = CMD_UNLOCK1;
  158. MEM_FLASH_ADDR2 = CMD_UNLOCK2;
  159. *addr = CMD_ERASE_CONFIRM;
  160. /* wait until flash is ready */
  161. chip1 = 0;
  162. do {
  163. result = *addr;
  164. /* check timeout */
  165. if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  166. MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
  167. chip1 = TMO;
  168. break;
  169. }
  170. if (!chip1
  171. && (result & 0xFFFF) & BIT_ERASE_DONE)
  172. chip1 = READY;
  173. } while (!chip1);
  174. MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
  175. if (chip1 == ERR) {
  176. rc = ERR_PROG_ERROR;
  177. goto outahere;
  178. }
  179. if (chip1 == TMO) {
  180. rc = ERR_TIMEOUT;
  181. goto outahere;
  182. }
  183. printf ("ok.\n");
  184. } else { /* it was protected */
  185. printf ("protected!\n");
  186. }
  187. }
  188. if (ctrlc ())
  189. printf ("User Interrupt!\n");
  190. outahere:
  191. /* allow flash to settle - wait 10 ms */
  192. mdelay(10);
  193. if (iflag)
  194. enable_interrupts();
  195. if (cflag)
  196. icache_enable();
  197. return rc;
  198. }
  199. static int write_word(flash_info_t *info, ulong dest, ulong data)
  200. {
  201. volatile u16 *addr = (volatile u16 *) dest;
  202. ulong result;
  203. int rc = ERR_OK;
  204. int cflag, iflag;
  205. int chip1;
  206. ulong start;
  207. /*
  208. * Check if Flash is (sufficiently) erased
  209. */
  210. result = *addr;
  211. if ((result & data) != data)
  212. return ERR_NOT_ERASED;
  213. /*
  214. * Disable interrupts which might cause a timeout
  215. * here. Remember that our exception vectors are
  216. * at address 0 in the flash, and we don't want a
  217. * (ticker) exception to happen while the flash
  218. * chip is in programming mode.
  219. */
  220. cflag = icache_status();
  221. icache_disable();
  222. iflag = disable_interrupts();
  223. MEM_FLASH_ADDR1 = CMD_UNLOCK1;
  224. MEM_FLASH_ADDR2 = CMD_UNLOCK2;
  225. MEM_FLASH_ADDR1 = CMD_PROGRAM;
  226. *addr = data;
  227. /* arm simple, non interrupt dependent timer */
  228. start = get_timer(0);
  229. /* wait until flash is ready */
  230. chip1 = 0;
  231. do {
  232. result = *addr;
  233. /* check timeout */
  234. if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  235. chip1 = ERR | TMO;
  236. break;
  237. }
  238. if (!chip1 && ((result & 0x80) == (data & 0x80)))
  239. chip1 = READY;
  240. } while (!chip1);
  241. *addr = CMD_READ_ARRAY;
  242. if (chip1 == ERR || *addr != data)
  243. rc = ERR_PROG_ERROR;
  244. if (iflag)
  245. enable_interrupts();
  246. if (cflag)
  247. icache_enable();
  248. return rc;
  249. }
  250. int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  251. {
  252. ulong wp, data;
  253. int rc;
  254. if (addr & 1) {
  255. printf ("unaligned destination not supported\n");
  256. return ERR_ALIGN;
  257. }
  258. #if 0
  259. if (cnt & 1) {
  260. printf ("odd transfer sizes not supported\n");
  261. return ERR_ALIGN;
  262. }
  263. #endif
  264. wp = addr;
  265. if (addr & 1) {
  266. data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *)
  267. src);
  268. if ((rc = write_word (info, wp - 1, data)) != 0) {
  269. return (rc);
  270. }
  271. src += 1;
  272. wp += 1;
  273. cnt -= 1;
  274. }
  275. while (cnt >= 2) {
  276. data = *((volatile u16 *) src);
  277. if ((rc = write_word (info, wp, data)) != 0) {
  278. return (rc);
  279. }
  280. src += 2;
  281. wp += 2;
  282. cnt -= 2;
  283. }
  284. if (cnt == 1) {
  285. data = (*((volatile u8 *) src) << 8) |
  286. *((volatile u8 *) (wp + 1));
  287. if ((rc = write_word (info, wp, data)) != 0) {
  288. return (rc);
  289. }
  290. src += 1;
  291. wp += 1;
  292. cnt -= 1;
  293. }
  294. return ERR_OK;
  295. }