northstar2.c 1.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2016 Broadcom Ltd.
  4. */
  5. #include <common.h>
  6. #include <cpu_func.h>
  7. #include <init.h>
  8. #include <asm/cache.h>
  9. #include <asm/system.h>
  10. #include <asm/armv8/mmu.h>
  11. static struct mm_region ns2_mem_map[] = {
  12. {
  13. .virt = 0x0UL,
  14. .phys = 0x0UL,
  15. .size = 0x80000000UL,
  16. .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  17. PTE_BLOCK_NON_SHARE |
  18. PTE_BLOCK_PXN | PTE_BLOCK_UXN
  19. }, {
  20. .virt = 0x80000000UL,
  21. .phys = 0x80000000UL,
  22. .size = 0xff80000000UL,
  23. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  24. PTE_BLOCK_INNER_SHARE
  25. }, {
  26. /* List terminator */
  27. 0,
  28. }
  29. };
  30. struct mm_region *mem_map = ns2_mem_map;
  31. DECLARE_GLOBAL_DATA_PTR;
  32. int board_init(void)
  33. {
  34. return 0;
  35. }
  36. int dram_init(void)
  37. {
  38. gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
  39. PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE);
  40. return 0;
  41. }
  42. int dram_init_banksize(void)
  43. {
  44. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  45. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  46. gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_1_SIZE;
  47. gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
  48. return 0;
  49. }
  50. void reset_cpu(ulong addr)
  51. {
  52. psci_system_reset();
  53. }