imx8qm_rom7720_a1.c 2.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2017-2018 NXP
  4. * Copyright (C) 2019 Oliver Graute <oliver.graute@kococonnector.com>
  5. */
  6. #include <common.h>
  7. #include <cpu_func.h>
  8. #include <env.h>
  9. #include <errno.h>
  10. #include <init.h>
  11. #include <linux/delay.h>
  12. #include <linux/libfdt.h>
  13. #include <asm/io.h>
  14. #include <asm/gpio.h>
  15. #include <asm/arch/clock.h>
  16. #include <asm/arch/sci/sci.h>
  17. #include <asm/arch/imx8-pins.h>
  18. #include <asm/arch/iomux.h>
  19. #include <asm/arch/sys_proto.h>
  20. DECLARE_GLOBAL_DATA_PTR;
  21. #define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
  22. (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
  23. (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
  24. (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
  25. static iomux_cfg_t uart0_pads[] = {
  26. SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
  27. SC_P_UART0_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
  28. };
  29. static void setup_iomux_uart(void)
  30. {
  31. imx8_iomux_setup_multiple_pads(uart0_pads, ARRAY_SIZE(uart0_pads));
  32. }
  33. int board_early_init_f(void)
  34. {
  35. sc_pm_clock_rate_t rate = SC_80MHZ;
  36. int ret;
  37. /* Set UART0 clock root to 80 MHz */
  38. ret = sc_pm_setup_uart(SC_R_UART_0, rate);
  39. if (ret)
  40. return ret;
  41. setup_iomux_uart();
  42. /* This is needed to because Kernel do not Power Up DC_0 */
  43. sc_pm_set_resource_power_mode(-1, SC_R_DC_0, SC_PM_PW_MODE_ON);
  44. sc_pm_set_resource_power_mode(-1, SC_R_GPIO_5, SC_PM_PW_MODE_ON);
  45. return 0;
  46. }
  47. #if IS_ENABLED(CONFIG_FEC_MXC)
  48. #include <miiphy.h>
  49. int board_phy_config(struct phy_device *phydev)
  50. {
  51. #ifdef CONFIG_FEC_ENABLE_MAX7322
  52. u8 value;
  53. /* This is needed to drive the pads to 1.8V instead of 1.5V */
  54. i2c_set_bus_num(CONFIG_MAX7322_I2C_BUS);
  55. if (!i2c_probe(CONFIG_MAX7322_I2C_ADDR)) {
  56. /* Write 0x1 to enable O0 output, this device has no addr */
  57. /* hence addr length is 0 */
  58. value = 0x1;
  59. if (dm_i2c_write(CONFIG_MAX7322_I2C_ADDR, 0, 0, &value, 1))
  60. printf("MAX7322 write failed\n");
  61. } else {
  62. printf("MAX7322 Not found\n");
  63. }
  64. mdelay(1);
  65. #endif
  66. phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
  67. phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
  68. phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
  69. phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
  70. phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
  71. phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
  72. if (phydev->drv->config)
  73. phydev->drv->config(phydev);
  74. return 0;
  75. }
  76. #endif
  77. int checkboard(void)
  78. {
  79. puts("Board: ROM-7720-A1 4GB\n");
  80. build_info();
  81. print_bootinfo();
  82. return 0;
  83. }
  84. int board_init(void)
  85. {
  86. /* Power up base board */
  87. sc_pm_set_resource_power_mode(-1, SC_R_BOARD_R1, SC_PM_PW_MODE_ON);
  88. return 0;
  89. }
  90. /*
  91. * Board specific reset that is system reset.
  92. */
  93. void reset_cpu(ulong addr)
  94. {
  95. /* TODO */
  96. }
  97. int board_mmc_get_env_dev(int devno)
  98. {
  99. return devno;
  100. }
  101. int board_late_init(void)
  102. {
  103. #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  104. env_set("board_name", "ROM-7720-A1");
  105. env_set("board_rev", "iMX8QM");
  106. #endif
  107. env_set("sec_boot", "no");
  108. #ifdef CONFIG_AHAB_BOOT
  109. env_set("sec_boot", "yes");
  110. #endif
  111. return 0;
  112. }