serial_pic32.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (c) 2015 Paul Thacker <paul.thacker@microchip.com>
  4. *
  5. */
  6. #include <common.h>
  7. #include <clk.h>
  8. #include <dm.h>
  9. #include <malloc.h>
  10. #include <serial.h>
  11. #include <wait_bit.h>
  12. #include <linux/bitops.h>
  13. #include <mach/pic32.h>
  14. #include <dt-bindings/clock/microchip,clock.h>
  15. DECLARE_GLOBAL_DATA_PTR;
  16. /* UART Control Registers */
  17. #define U_MOD 0x00
  18. #define U_MODCLR (U_MOD + _CLR_OFFSET)
  19. #define U_MODSET (U_MOD + _SET_OFFSET)
  20. #define U_STA 0x10
  21. #define U_STACLR (U_STA + _CLR_OFFSET)
  22. #define U_STASET (U_STA + _SET_OFFSET)
  23. #define U_TXR 0x20
  24. #define U_RXR 0x30
  25. #define U_BRG 0x40
  26. /* U_MOD bits */
  27. #define UART_ENABLE BIT(15)
  28. /* U_STA bits */
  29. #define UART_RX_ENABLE BIT(12)
  30. #define UART_TX_BRK BIT(11)
  31. #define UART_TX_ENABLE BIT(10)
  32. #define UART_TX_FULL BIT(9)
  33. #define UART_TX_EMPTY BIT(8)
  34. #define UART_RX_OVER BIT(1)
  35. #define UART_RX_DATA_AVAIL BIT(0)
  36. struct pic32_uart_priv {
  37. void __iomem *base;
  38. ulong uartclk;
  39. };
  40. /*
  41. * Initialize the serial port with the given baudrate.
  42. * The settings are always 8 data bits, no parity, 1 stop bit, no start bits.
  43. */
  44. static int pic32_serial_init(void __iomem *base, ulong clk, u32 baudrate)
  45. {
  46. u32 div = DIV_ROUND_CLOSEST(clk, baudrate * 16);
  47. /* wait for TX FIFO to empty */
  48. wait_for_bit_le32(base + U_STA, UART_TX_EMPTY,
  49. true, CONFIG_SYS_HZ, false);
  50. /* send break */
  51. writel(UART_TX_BRK, base + U_STASET);
  52. /* disable and clear mode */
  53. writel(0, base + U_MOD);
  54. writel(0, base + U_STA);
  55. /* set baud rate generator */
  56. writel(div - 1, base + U_BRG);
  57. /* enable the UART for TX and RX */
  58. writel(UART_TX_ENABLE | UART_RX_ENABLE, base + U_STASET);
  59. /* enable the UART */
  60. writel(UART_ENABLE, base + U_MODSET);
  61. return 0;
  62. }
  63. /* Check whether any char pending in RX fifo */
  64. static int pic32_uart_pending_input(void __iomem *base)
  65. {
  66. /* check if rx buffer overrun error has occurred */
  67. if (readl(base + U_STA) & UART_RX_OVER) {
  68. readl(base + U_RXR);
  69. /* clear overrun error to keep receiving */
  70. writel(UART_RX_OVER, base + U_STACLR);
  71. }
  72. /* In PIC32 there is no way to know number of outstanding
  73. * chars in rx-fifo. Only it can be known whether there is any.
  74. */
  75. return readl(base + U_STA) & UART_RX_DATA_AVAIL;
  76. }
  77. static int pic32_uart_pending(struct udevice *dev, bool input)
  78. {
  79. struct pic32_uart_priv *priv = dev_get_priv(dev);
  80. if (input)
  81. return pic32_uart_pending_input(priv->base);
  82. return !(readl(priv->base + U_STA) & UART_TX_EMPTY);
  83. }
  84. static int pic32_uart_setbrg(struct udevice *dev, int baudrate)
  85. {
  86. struct pic32_uart_priv *priv = dev_get_priv(dev);
  87. return pic32_serial_init(priv->base, priv->uartclk, baudrate);
  88. }
  89. static int pic32_uart_putc(struct udevice *dev, const char ch)
  90. {
  91. struct pic32_uart_priv *priv = dev_get_priv(dev);
  92. /* Check if Tx FIFO is full */
  93. if (readl(priv->base + U_STA) & UART_TX_FULL)
  94. return -EAGAIN;
  95. /* pump the char to tx buffer */
  96. writel(ch, priv->base + U_TXR);
  97. return 0;
  98. }
  99. static int pic32_uart_getc(struct udevice *dev)
  100. {
  101. struct pic32_uart_priv *priv = dev_get_priv(dev);
  102. /* return error if RX fifo is empty */
  103. if (!pic32_uart_pending_input(priv->base))
  104. return -EAGAIN;
  105. /* read the character from rx buffer */
  106. return readl(priv->base + U_RXR) & 0xff;
  107. }
  108. static int pic32_uart_probe(struct udevice *dev)
  109. {
  110. struct pic32_uart_priv *priv = dev_get_priv(dev);
  111. struct clk clk;
  112. fdt_addr_t addr;
  113. fdt_size_t size;
  114. int ret;
  115. /* get address */
  116. addr = fdtdec_get_addr_size(gd->fdt_blob, dev_of_offset(dev), "reg",
  117. &size);
  118. if (addr == FDT_ADDR_T_NONE)
  119. return -EINVAL;
  120. priv->base = ioremap(addr, size);
  121. /* get clock rate */
  122. ret = clk_get_by_index(dev, 0, &clk);
  123. if (ret < 0)
  124. return ret;
  125. priv->uartclk = clk_get_rate(&clk);
  126. clk_free(&clk);
  127. /* initialize serial */
  128. return pic32_serial_init(priv->base, priv->uartclk, CONFIG_BAUDRATE);
  129. }
  130. static const struct dm_serial_ops pic32_uart_ops = {
  131. .putc = pic32_uart_putc,
  132. .pending = pic32_uart_pending,
  133. .getc = pic32_uart_getc,
  134. .setbrg = pic32_uart_setbrg,
  135. };
  136. static const struct udevice_id pic32_uart_ids[] = {
  137. { .compatible = "microchip,pic32mzda-uart" },
  138. {}
  139. };
  140. U_BOOT_DRIVER(pic32_serial) = {
  141. .name = "pic32-uart",
  142. .id = UCLASS_SERIAL,
  143. .of_match = pic32_uart_ids,
  144. .probe = pic32_uart_probe,
  145. .ops = &pic32_uart_ops,
  146. .priv_auto_alloc_size = sizeof(struct pic32_uart_priv),
  147. };
  148. #ifdef CONFIG_DEBUG_UART_PIC32
  149. #include <debug_uart.h>
  150. static inline void _debug_uart_init(void)
  151. {
  152. void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
  153. pic32_serial_init(base, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
  154. }
  155. static inline void _debug_uart_putc(int ch)
  156. {
  157. writel(ch, CONFIG_DEBUG_UART_BASE + U_TXR);
  158. }
  159. DEBUG_UART_FUNCS
  160. #endif