k210.dtsi 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
  4. */
  5. #include <dt-bindings/clock/k210-sysctl.h>
  6. #include <dt-bindings/mfd/k210-sysctl.h>
  7. #include <dt-bindings/pinctrl/k210-pinctrl.h>
  8. #include <dt-bindings/reset/k210-sysctl.h>
  9. / {
  10. /*
  11. * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
  12. * wide, and the upper half of all addresses is ignored.
  13. */
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. compatible = "kendryte,k210";
  17. aliases {
  18. cpu0 = &cpu0;
  19. cpu1 = &cpu1;
  20. dma0 = &dmac0;
  21. gpio0 = &gpio0;
  22. gpio1 = &gpio1_0;
  23. i2c0 = &i2c0;
  24. i2c1 = &i2c1;
  25. i2c2 = &i2c2;
  26. pinctrl0 = &fpioa;
  27. serial0 = &uarths0;
  28. serial1 = &uart1;
  29. serial2 = &uart2;
  30. serial3 = &uart3;
  31. spi0 = &spi0;
  32. spi1 = &spi1;
  33. spi2 = &spi2;
  34. spi3 = &spi3;
  35. timer0 = &timer0;
  36. timer1 = &timer1;
  37. timer2 = &timer2;
  38. };
  39. cpus {
  40. #address-cells = <1>;
  41. #size-cells = <0>;
  42. timebase-frequency = <7800000>;
  43. cpu0: cpu@0 {
  44. device_type = "cpu";
  45. compatible = "kendryte,k210", "sifive,rocket0", "riscv";
  46. reg = <0>;
  47. riscv,isa = "rv64imafdgc";
  48. mmu-type = "sv39";
  49. i-cache-block-size = <64>;
  50. i-cache-size = <0x8000>;
  51. d-cache-block-size = <64>;
  52. d-cache-size = <0x8000>;
  53. clocks = <&sysclk K210_CLK_CPU>;
  54. cpu0_intc: interrupt-controller {
  55. #interrupt-cells = <1>;
  56. interrupt-controller;
  57. compatible = "riscv,cpu-intc";
  58. };
  59. };
  60. cpu1: cpu@1 {
  61. device_type = "cpu";
  62. compatible = "kendryte,k210", "sifive,rocket0", "riscv";
  63. reg = <1>;
  64. riscv,isa = "rv64imafdgc";
  65. mmu-type = "sv39";
  66. i-cache-block-size = <64>;
  67. i-cache-size = <0x8000>;
  68. d-cache-block-size = <64>;
  69. d-cache-size = <0x8000>;
  70. clocks = <&sysclk K210_CLK_CPU>;
  71. cpu1_intc: interrupt-controller {
  72. #interrupt-cells = <1>;
  73. interrupt-controller;
  74. compatible = "riscv,cpu-intc";
  75. };
  76. };
  77. };
  78. sram: memory@80000000 {
  79. device_type = "memory";
  80. compatible = "kendryte,k210-sram";
  81. reg = <0x80000000 0x400000>,
  82. <0x80400000 0x200000>,
  83. <0x80600000 0x200000>;
  84. reg-names = "sram0", "sram1", "airam";
  85. clocks = <&sysclk K210_CLK_SRAM0>,
  86. <&sysclk K210_CLK_SRAM1>,
  87. <&sysclk K210_CLK_PLL1>;
  88. clock-names = "sram0", "sram1", "airam";
  89. };
  90. reserved-memory {
  91. #address-cells = <1>;
  92. #size-cells = <1>;
  93. ranges;
  94. ai_reserved: ai@80600000 {
  95. reg = <0x80600000 0x200000>;
  96. reusable;
  97. };
  98. };
  99. clocks {
  100. in0: osc {
  101. compatible = "fixed-clock";
  102. #clock-cells = <0>;
  103. clock-frequency = <26000000>;
  104. };
  105. };
  106. soc {
  107. #address-cells = <1>;
  108. #size-cells = <1>;
  109. compatible = "kendryte,k210-soc", "simple-bus";
  110. ranges;
  111. interrupt-parent = <&plic0>;
  112. debug0: debug@0 {
  113. compatible = "kendryte,k210-debug", "riscv,debug";
  114. reg = <0x0 0x1000>;
  115. };
  116. rom0: nvmem@1000 {
  117. reg = <0x1000 0x1000>;
  118. read-only;
  119. };
  120. clint0: clint@2000000 {
  121. #interrupt-cells = <1>;
  122. compatible = "kendryte,k210-clint", "riscv,clint0";
  123. reg = <0x2000000 0xC000>;
  124. interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
  125. <&cpu1_intc 3>, <&cpu1_intc 7>;
  126. clocks = <&sysclk K210_CLK_CLINT>;
  127. };
  128. plic0: interrupt-controller@C000000 {
  129. #interrupt-cells = <1>;
  130. compatible = "kendryte,k210-plic", "riscv,plic0";
  131. reg = <0xC000000 0x4000000>;
  132. interrupt-controller;
  133. interrupts-extended = <&cpu0_intc 9>, <&cpu0_intc 11>,
  134. <&cpu1_intc 9>, <&cpu1_intc 11>;
  135. riscv,ndev = <65>;
  136. riscv,max-priority = <7>;
  137. };
  138. uarths0: serial@38000000 {
  139. compatible = "kendryte,k210-uarths", "sifive,uart0";
  140. reg = <0x38000000 0x1000>;
  141. interrupts = <33>;
  142. clocks = <&sysclk K210_CLK_CPU>;
  143. status = "disabled";
  144. };
  145. gpio0: gpio-controller@38001000 {
  146. #interrupt-cells = <2>;
  147. #gpio-cells = <2>;
  148. compatible = "kendryte,k210-gpiohs", "sifive,gpio0";
  149. reg = <0x38001000 0x1000>;
  150. interrupt-controller;
  151. interrupts = <34 35 36 37 38 39 40 41
  152. 42 43 44 45 46 47 48 49
  153. 50 51 52 53 54 55 56 57
  154. 58 59 60 61 62 63 64 65>;
  155. gpio-controller;
  156. ngpios = <32>;
  157. status = "disabled";
  158. };
  159. kpu0: kpu@40800000 {
  160. compatible = "kendryte,k210-kpu";
  161. reg = <0x40800000 0xc00000>;
  162. interrupts = <25>;
  163. clocks = <&sysclk K210_CLK_AI>;
  164. memory-region = <&ai_reserved>;
  165. status = "disabled";
  166. };
  167. fft0: fft@42000000 {
  168. compatible = "kendryte,k210-fft";
  169. reg = <0x42000000 0x400000>;
  170. interrupts = <26>;
  171. clocks = <&sysclk K210_CLK_FFT>;
  172. resets = <&sysrst K210_RST_FFT>;
  173. status = "disabled";
  174. };
  175. dmac0: dma-controller@50000000 {
  176. compatible = "kendryte,k210-dmac", "snps,axi-dma-1.01a";
  177. reg = <0x50000000 0x1000>;
  178. interrupts = <27 28 29 30 31 32>;
  179. clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>;
  180. clock-names = "core-clk", "cfgr-clk";
  181. resets = <&sysrst K210_RST_DMA>;
  182. dma-channels = <6>;
  183. snps,dma-masters = <2>;
  184. snps,data-width = <5>;
  185. snps,block-size = <0x200000 0x200000 0x200000
  186. 0x200000 0x200000 0x200000>;
  187. snps,axi-max-burst-len = <256>;
  188. status = "disabled";
  189. };
  190. apb0: bus@50200000 {
  191. #address-cells = <1>;
  192. #size-cells = <1>;
  193. compatible = "kendryte,k210-apb", "simple-pm-bus";
  194. ranges;
  195. clocks = <&sysclk K210_CLK_APB0>;
  196. gpio1: gpio-controller@50200000 {
  197. #address-cells = <1>;
  198. #size-cells = <0>;
  199. compatible = "kendryte,k210-gpio",
  200. "snps,dw-apb-gpio";
  201. reg = <0x50200000 0x80>;
  202. clocks = <&sysclk K210_CLK_GPIO>;
  203. resets = <&sysrst K210_RST_GPIO>;
  204. status = "disabled";
  205. gpio1_0: gpio1@0 {
  206. #gpio-cells = <2>;
  207. #interrupt-cells = <2>;
  208. compatible = "snps,dw-apb-gpio-port";
  209. reg = <0>;
  210. interrupt-controller;
  211. interrupts = <23>;
  212. gpio-controller;
  213. snps,nr-gpios = <8>;
  214. };
  215. };
  216. uart1: serial@50210000 {
  217. compatible = "kendryte,k210-uart",
  218. "snps,dw-apb-uart";
  219. reg = <0x50210000 0x100>;
  220. interrupts = <11>;
  221. clocks = <&sysclk K210_CLK_UART1>;
  222. resets = <&sysrst K210_RST_UART1>;
  223. reg-io-width = <4>;
  224. reg-shift = <2>;
  225. dcd-override;
  226. dsr-override;
  227. cts-override;
  228. ri-override;
  229. status = "disabled";
  230. };
  231. uart2: serial@50220000 {
  232. compatible = "kendryte,k210-uart",
  233. "snps,dw-apb-uart";
  234. reg = <0x50220000 0x100>;
  235. interrupts = <12>;
  236. clocks = <&sysclk K210_CLK_UART2>;
  237. resets = <&sysrst K210_RST_UART2>;
  238. reg-io-width = <4>;
  239. reg-shift = <2>;
  240. dcd-override;
  241. dsr-override;
  242. cts-override;
  243. ri-override;
  244. status = "disabled";
  245. };
  246. uart3: serial@50230000 {
  247. compatible = "kendryte,k210-uart",
  248. "snps,dw-apb-uart";
  249. reg = <0x50230000 0x100>;
  250. interrupts = <13>;
  251. clocks = <&sysclk K210_CLK_UART3>;
  252. resets = <&sysrst K210_RST_UART3>;
  253. reg-io-width = <4>;
  254. reg-shift = <2>;
  255. dcd-override;
  256. dsr-override;
  257. cts-override;
  258. ri-override;
  259. status = "disabled";
  260. };
  261. spi2: spi@50240000 {
  262. compatible = "canaan,kendryte-k210-spi",
  263. "snps,dw-apb-ssi-4.01",
  264. "snps,dw-apb-ssi";
  265. spi-slave;
  266. reg = <0x50240000 0x100>;
  267. interrupts = <2>;
  268. clocks = <&sysclk K210_CLK_SPI2>;
  269. resets = <&sysrst K210_RST_SPI2>;
  270. spi-max-frequency = <25000000>;
  271. status = "disabled";
  272. };
  273. i2s0: i2s@50250000 {
  274. compatible = "kendryte,k210-i2s",
  275. "snps,designware-i2s";
  276. reg = <0x50250000 0x200>;
  277. interrupts = <5>;
  278. clocks = <&sysclk K210_CLK_I2S0>;
  279. clock-names = "i2sclk";
  280. resets = <&sysrst K210_RST_I2S0>;
  281. status = "disabled";
  282. };
  283. apu0: sound@520250200 {
  284. compatible = "kendryte,k210-apu";
  285. reg = <0x50250200 0x200>;
  286. status = "disabled";
  287. };
  288. i2s1: i2s@50260000 {
  289. compatible = "kendryte,k210-i2s",
  290. "snps,designware-i2s";
  291. reg = <0x50260000 0x200>;
  292. interrupts = <6>;
  293. clocks = <&sysclk K210_CLK_I2S1>;
  294. clock-names = "i2sclk";
  295. resets = <&sysrst K210_RST_I2S1>;
  296. status = "disabled";
  297. };
  298. i2s2: i2s@50270000 {
  299. compatible = "kendryte,k210-i2s",
  300. "snps,designware-i2s";
  301. reg = <0x50270000 0x200>;
  302. interrupts = <7>;
  303. clocks = <&sysclk K210_CLK_I2S2>;
  304. clock-names = "i2sclk";
  305. resets = <&sysrst K210_RST_I2S2>;
  306. status = "disabled";
  307. };
  308. i2c0: i2c@50280000 {
  309. compatible = "kendryte,k210-i2c",
  310. "snps,designware-i2c";
  311. reg = <0x50280000 0x100>;
  312. interrupts = <8>;
  313. clocks = <&sysclk K210_CLK_I2C0>;
  314. resets = <&sysrst K210_RST_I2C0>;
  315. status = "disabled";
  316. };
  317. i2c1: i2c@50290000 {
  318. compatible = "kendryte,k210-i2c",
  319. "snps,designware-i2c";
  320. reg = <0x50290000 0x100>;
  321. interrupts = <9>;
  322. clocks = <&sysclk K210_CLK_I2C1>;
  323. resets = <&sysrst K210_RST_I2C1>;
  324. status = "disabled";
  325. };
  326. i2c2: i2c@502A0000 {
  327. compatible = "kendryte,k210-i2c",
  328. "snps,designware-i2c";
  329. reg = <0x502A0000 0x100>;
  330. interrupts = <10>;
  331. clocks = <&sysclk K210_CLK_I2C2>;
  332. resets = <&sysrst K210_RST_I2C2>;
  333. status = "disabled";
  334. };
  335. fpioa: pinmux@502B0000 {
  336. compatible = "kendryte,k210-fpioa";
  337. reg = <0x502B0000 0x100>;
  338. clocks = <&sysclk K210_CLK_FPIOA>;
  339. resets = <&sysrst K210_RST_FPIOA>;
  340. kendryte,sysctl = <&sysctl>;
  341. kendryte,power-offset = <K210_SYSCTL_POWER_SEL>;
  342. pinctrl-0 = <&fpioa_jtag>;
  343. pinctrl-names = "default";
  344. status = "disabled";
  345. fpioa_jtag: jtag {
  346. pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>,
  347. <K210_FPIOA(1, K210_PCF_JTAG_TDI)>,
  348. <K210_FPIOA(2, K210_PCF_JTAG_TMS)>,
  349. <K210_FPIOA(3, K210_PCF_JTAG_TDO)>;
  350. };
  351. };
  352. sha256: sha256@502C0000 {
  353. compatible = "kendryte,k210-sha256";
  354. reg = <0x502C0000 0x100>;
  355. clocks = <&sysclk K210_CLK_SHA>;
  356. resets = <&sysrst K210_RST_SHA>;
  357. status = "disabled";
  358. };
  359. timer0: timer@502D0000 {
  360. compatible = "kendryte,k210-timer",
  361. "snps,dw-apb-timer";
  362. reg = <0x502D0000 0x100>;
  363. interrupts = <14 15>;
  364. clocks = <&sysclk K210_CLK_TIMER0>;
  365. clock-names = "timer";
  366. resets = <&sysrst K210_RST_TIMER0>;
  367. status = "disabled";
  368. };
  369. timer1: timer@502E0000 {
  370. compatible = "kendryte,k210-timer",
  371. "snps,dw-apb-timer";
  372. reg = <0x502E0000 0x100>;
  373. interrupts = <16 17>;
  374. clocks = <&sysclk K210_CLK_TIMER1>;
  375. clock-names = "timer";
  376. resets = <&sysrst K210_RST_TIMER1>;
  377. status = "disabled";
  378. };
  379. timer2: timer@502F0000 {
  380. compatible = "kendryte,k210-timer",
  381. "snps,dw-apb-timer";
  382. reg = <0x502F0000 0x100>;
  383. interrupts = <18 19>;
  384. clocks = <&sysclk K210_CLK_TIMER2>;
  385. clock-names = "timer";
  386. resets = <&sysrst K210_RST_TIMER2>;
  387. status = "disabled";
  388. };
  389. };
  390. apb1: bus@50400000 {
  391. #address-cells = <1>;
  392. #size-cells = <1>;
  393. compatible = "kendryte,k210-apb", "simple-pm-bus";
  394. ranges;
  395. clocks = <&sysclk K210_CLK_APB1>;
  396. wdt0: watchdog@50400000 {
  397. compatible = "kendryte,k210-wdt", "snps,dw-wdt";
  398. reg = <0x50400000 0x100>;
  399. interrupts = <21>;
  400. clocks = <&sysclk K210_CLK_WDT0>;
  401. resets = <&sysrst K210_RST_WDT0>;
  402. status = "disabled";
  403. };
  404. wdt1: watchdog@50410000 {
  405. compatible = "kendryte,k210-wdt", "snps,dw-wdt";
  406. reg = <0x50410000 0x100>;
  407. interrupts = <22>;
  408. clocks = <&sysclk K210_CLK_WDT1>;
  409. resets = <&sysrst K210_RST_WDT1>;
  410. status = "disabled";
  411. };
  412. otp0: nvmem@50420000 {
  413. #address-cells = <1>;
  414. #size-cells = <1>;
  415. compatible = "kendryte,k210-otp";
  416. reg = <0x50420000 0x100>,
  417. <0x88000000 0x20000>;
  418. reg-names = "reg", "mem";
  419. clocks = <&sysclk K210_CLK_ROM>;
  420. resets = <&sysrst K210_RST_ROM>;
  421. read-only;
  422. status = "disabled";
  423. /* Bootloader */
  424. firmware@00000 {
  425. reg = <0x00000 0xC200>;
  426. };
  427. /*
  428. * config string as described in RISC-V
  429. * privileged spec 1.9
  430. */
  431. config-1-9@1c000 {
  432. reg = <0x1C000 0x1000>;
  433. };
  434. /*
  435. * Device tree containing only registers,
  436. * interrupts, and cpus
  437. */
  438. fdt@1d000 {
  439. reg = <0x1D000 0x2000>;
  440. };
  441. /* CPU/ROM credits */
  442. credits@1f000 {
  443. reg = <0x1F000 0x1000>;
  444. };
  445. };
  446. dvp0: camera@50430000 {
  447. compatible = "kendryte,k210-dvp";
  448. reg = <0x50430000 0x100>;
  449. interrupts = <24>;
  450. clocks = <&sysclk K210_CLK_DVP>;
  451. resets = <&sysrst K210_RST_DVP>;
  452. kendryte,sysctl = <&sysctl>;
  453. kendryte,misc-offset = <K210_SYSCTL_MISC>;
  454. status = "disabled";
  455. };
  456. sysctl: syscon@50440000 {
  457. compatible = "kendryte,k210-sysctl",
  458. "syscon", "simple-mfd";
  459. reg = <0x50440000 0x100>;
  460. reg-io-width = <4>;
  461. sysclk: clock-controller {
  462. #clock-cells = <1>;
  463. compatible = "kendryte,k210-clk";
  464. clocks = <&in0>;
  465. };
  466. sysrst: reset-controller {
  467. compatible = "kendryte,k210-rst",
  468. "syscon-reset";
  469. #reset-cells = <1>;
  470. regmap = <&sysctl>;
  471. offset = <K210_SYSCTL_PERI_RESET>;
  472. mask = <0x27FFFFFF>;
  473. assert-high = <1>;
  474. };
  475. reboot {
  476. compatible = "syscon-reboot";
  477. regmap = <&sysctl>;
  478. offset = <K210_SYSCTL_SOFT_RESET>;
  479. mask = <1>;
  480. value = <1>;
  481. };
  482. };
  483. aes0: aes@50450000 {
  484. compatible = "kendryte,k210-aes";
  485. reg = <0x50450000 0x100>;
  486. clocks = <&sysclk K210_CLK_AES>;
  487. resets = <&sysrst K210_RST_AES>;
  488. status = "disabled";
  489. };
  490. rtc: rtc@50460000 {
  491. compatible = "kendryte,k210-rtc";
  492. reg = <0x50460000 0x100>;
  493. clocks = <&in0>;
  494. resets = <&sysrst K210_RST_RTC>;
  495. interrupts = <20>;
  496. status = "disabled";
  497. };
  498. };
  499. apb2: bus@52000000 {
  500. #address-cells = <1>;
  501. #size-cells = <1>;
  502. compatible = "kendryte,k210-apb", "simple-pm-bus";
  503. ranges;
  504. clocks = <&sysclk K210_CLK_APB2>;
  505. spi0: spi@52000000 {
  506. #address-cells = <1>;
  507. #size-cells = <0>;
  508. compatible = "canaan,kendryte-k210-spi",
  509. "snps,dw-apb-ssi-4.01",
  510. "snps,dw-apb-ssi";
  511. reg = <0x52000000 0x100>;
  512. interrupts = <1>;
  513. clocks = <&sysclk K210_CLK_SPI0>;
  514. clock-names = "ssi_clk";
  515. resets = <&sysrst K210_RST_SPI0>;
  516. spi-max-frequency = <25000000>;
  517. num-cs = <4>;
  518. reg-io-width = <4>;
  519. status = "disabled";
  520. };
  521. spi1: spi@53000000 {
  522. #address-cells = <1>;
  523. #size-cells = <0>;
  524. compatible = "canaan,kendryte-k210-spi",
  525. "snps,dw-apb-ssi-4.01",
  526. "snps,dw-apb-ssi";
  527. reg = <0x53000000 0x100>;
  528. interrupts = <2>;
  529. clocks = <&sysclk K210_CLK_SPI1>;
  530. clock-names = "ssi_clk";
  531. resets = <&sysrst K210_RST_SPI1>;
  532. spi-max-frequency = <25000000>;
  533. num-cs = <4>;
  534. reg-io-width = <4>;
  535. status = "disabled";
  536. };
  537. spi3: spi@54000000 {
  538. #address-cells = <1>;
  539. #size-cells = <0>;
  540. compatible = "canaan,kendryte-k210-ssi",
  541. "snps,dwc-ssi-1.01a";
  542. reg = <0x54000000 0x200>;
  543. interrupts = <4>;
  544. clocks = <&sysclk K210_CLK_SPI3>;
  545. clock-names = "ssi_clk";
  546. resets = <&sysrst K210_RST_SPI3>;
  547. /* Could possibly go up to 200 MHz */
  548. spi-max-frequency = <100000000>;
  549. num-cs = <4>;
  550. reg-io-width = <4>;
  551. status = "disabled";
  552. };
  553. };
  554. };
  555. };