0043-third_party-crashpad-port-for-RISC-V.patch 30 KB

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  1. From 960a2680cc7e74dde0d0c635477a667710e7a149 Mon Sep 17 00:00:00 2001
  2. From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
  3. Date: Wed, 6 Jul 2022 05:16:12 +0000
  4. Subject: [PATCH 43/68] third_party: crashpad: port for RISC-V
  5. Patch cherry-picked from:
  6. https://github.com/felixonmars/archriscv-packages/tree/master/chromium
  7. Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
  8. ---
  9. .../crashpad/minidump/minidump_context.h | 35 +++++++++
  10. .../minidump/minidump_context_writer.cc | 44 +++++++++++
  11. .../minidump/minidump_context_writer.h | 41 ++++++++++
  12. .../minidump/minidump_misc_info_writer.cc | 4 +
  13. .../crashpad/snapshot/capture_memory.cc | 10 +++
  14. .../crashpad/snapshot/cpu_architecture.h | 8 +-
  15. .../crashpad/crashpad/snapshot/cpu_context.cc | 2 +
  16. .../crashpad/crashpad/snapshot/cpu_context.h | 16 ++++
  17. .../snapshot/linux/cpu_context_linux.cc | 24 ++++++
  18. .../snapshot/linux/cpu_context_linux.h | 16 ++++
  19. .../linux/exception_snapshot_linux.cc | 54 +++++++++++++
  20. .../snapshot/linux/exception_snapshot_linux.h | 3 +
  21. .../snapshot/linux/process_reader_linux.cc | 3 +
  22. .../crashpad/snapshot/linux/signal_context.h | 60 ++++++++++++++
  23. .../snapshot/linux/system_snapshot_linux.cc | 12 +++
  24. .../snapshot/linux/thread_snapshot_linux.cc | 16 ++++
  25. .../snapshot/linux/thread_snapshot_linux.h | 3 +
  26. .../crashpad/crashpad/util/linux/ptracer.cc | 44 +++++++++++
  27. .../crashpad/util/linux/thread_info.h | 78 ++++++++++++++++++-
  28. .../util/net/http_transport_libcurl.cc | 2 +
  29. 20 files changed, 473 insertions(+), 2 deletions(-)
  30. diff --git a/third_party/crashpad/crashpad/minidump/minidump_context.h b/third_party/crashpad/crashpad/minidump/minidump_context.h
  31. index 3a3e603cb0d2..cf074d2b8236 100644
  32. --- a/third_party/crashpad/crashpad/minidump/minidump_context.h
  33. +++ b/third_party/crashpad/crashpad/minidump/minidump_context.h
  34. @@ -592,6 +592,41 @@ struct MinidumpContextMIPS64 {
  35. uint64_t fir;
  36. };
  37. +//! \brief 64bit RISC-V-specifc flags for MinidumpContextRISCV64::context_flags.
  38. +//! Based on minidump_cpu_riscv64.h from breakpad
  39. +enum MinidumpContextRISCV64Flags : uint32_t {
  40. + //! \brief Identifies the context structure as RISCV64.
  41. + kMinidumpContextRISCV64 = 0x00080000,
  42. +
  43. + //! \brief Indicates the validity of integer registers.
  44. + //!
  45. + //! Registers `x1`-`x31` and pc are valid.
  46. + kMinidumpContextRISCV64Integer = kMinidumpContextRISCV64 | 0x00000002,
  47. +
  48. + //! \brief Indicates the validity of floating point registers.
  49. + //!
  50. + //! Floating point registers `f0`-`f31`, and `fcsr` are valid
  51. + kMinidumpContextRISCV64FloatingPoint = kMinidumpContextRISCV64 | 0x00000004,
  52. +
  53. + //! \brief Indicates the validity of all registers.
  54. + kMinidumpContextRISCV64All = kMinidumpContextRISCV64Integer |
  55. + kMinidumpContextRISCV64FloatingPoint,
  56. +};
  57. +
  58. +//! \brief A 64bit RISCV CPU context (register state) carried in a minidump file.
  59. +struct MinidumpContextRISCV64 {
  60. + uint64_t context_flags;
  61. +
  62. + //! \brief General purpose registers.
  63. + uint64_t regs[32];
  64. +
  65. + //! \brief FPU registers.
  66. + uint64_t fpregs[32];
  67. +
  68. + //! \brief FPU status register.
  69. + uint64_t fcsr;
  70. +};
  71. +
  72. } // namespace crashpad
  73. #endif // CRASHPAD_MINIDUMP_MINIDUMP_CONTEXT_H_
  74. diff --git a/third_party/crashpad/crashpad/minidump/minidump_context_writer.cc b/third_party/crashpad/crashpad/minidump/minidump_context_writer.cc
  75. index 2f2d90ba4707..ad26739432f5 100644
  76. --- a/third_party/crashpad/crashpad/minidump/minidump_context_writer.cc
  77. +++ b/third_party/crashpad/crashpad/minidump/minidump_context_writer.cc
  78. @@ -102,6 +102,13 @@ MinidumpContextWriter::CreateFromSnapshot(const CPUContext* context_snapshot) {
  79. break;
  80. }
  81. + case kCPUArchitectureRISCV64: {
  82. + context = std::make_unique<MinidumpContextRISCV64Writer>();
  83. + reinterpret_cast<MinidumpContextRISCV64Writer*>(context.get())
  84. + ->InitializeFromSnapshot(context_snapshot->riscv64);
  85. + break;
  86. + }
  87. +
  88. default: {
  89. LOG(ERROR) << "unknown context architecture "
  90. << context_snapshot->architecture;
  91. @@ -454,4 +461,41 @@ size_t MinidumpContextMIPS64Writer::ContextSize() const {
  92. return sizeof(context_);
  93. }
  94. +MinidumpContextRISCV64Writer::MinidumpContextRISCV64Writer()
  95. + : MinidumpContextWriter(), context_() {
  96. + context_.context_flags = kMinidumpContextRISCV64;
  97. +}
  98. +
  99. +MinidumpContextRISCV64Writer::~MinidumpContextRISCV64Writer() = default;
  100. +
  101. +void MinidumpContextRISCV64Writer::InitializeFromSnapshot(
  102. + const CPUContextRISCV64* context_snapshot) {
  103. + DCHECK_EQ(state(), kStateMutable);
  104. + DCHECK_EQ(context_.context_flags, kMinidumpContextRISCV64);
  105. +
  106. + context_.context_flags = kMinidumpContextRISCV64All;
  107. +
  108. + static_assert(sizeof(context_.regs) == sizeof(context_snapshot->regs),
  109. + "GPRs size mismatch");
  110. + memcpy(context_.regs, context_snapshot->regs, sizeof(context_.regs));
  111. +
  112. + static_assert(sizeof(context_.fpregs) == sizeof(context_snapshot->fpregs),
  113. + "FPRs size mismatch");
  114. + memcpy(context_.fpregs,
  115. + context_snapshot->fpregs,
  116. + sizeof(context_.fpregs));
  117. + context_.fcsr = context_snapshot->fcsr;
  118. +}
  119. +
  120. +bool MinidumpContextRISCV64Writer::WriteObject(
  121. + FileWriterInterface* file_writer) {
  122. + DCHECK_EQ(state(), kStateWritable);
  123. + return file_writer->Write(&context_, sizeof(context_));
  124. +}
  125. +
  126. +size_t MinidumpContextRISCV64Writer::ContextSize() const {
  127. + DCHECK_GE(state(), kStateFrozen);
  128. + return sizeof(context_);
  129. +}
  130. +
  131. } // namespace crashpad
  132. diff --git a/third_party/crashpad/crashpad/minidump/minidump_context_writer.h b/third_party/crashpad/crashpad/minidump/minidump_context_writer.h
  133. index 80b312b23c2a..278830085c16 100644
  134. --- a/third_party/crashpad/crashpad/minidump/minidump_context_writer.h
  135. +++ b/third_party/crashpad/crashpad/minidump/minidump_context_writer.h
  136. @@ -330,6 +330,47 @@ class MinidumpContextMIPS64Writer final : public MinidumpContextWriter {
  137. MinidumpContextMIPS64 context_;
  138. };
  139. +//! \brief The writer for a MinidumpContextRISCV64 structure in a minidump file.
  140. +class MinidumpContextRISCV64Writer final : public MinidumpContextWriter {
  141. + public:
  142. + MinidumpContextRISCV64Writer();
  143. + ~MinidumpContextRISCV64Writer() override;
  144. +
  145. + MinidumpContextRISCV64Writer(const MinidumpContextRISCV64Writer&) = delete;
  146. + void operator=(const MinidumpContextRISCV64Writer&) = delete;
  147. +
  148. + //! \brief Initializes the MinidumpContextRISCV based on \a context_snapshot.
  149. + //!
  150. + //! \param[in] context_snapshot The context snapshot to use as source data.
  151. + //!
  152. + //! \note Valid in #kStateMutable. No mutation of context() may be done before
  153. + //! calling this method, and it is not normally necessary to alter
  154. + //! context() after calling this method.
  155. + void InitializeFromSnapshot(const CPUContextRISCV64* context_snapshot);
  156. +
  157. + //! \brief Returns a pointer to the context structure that this object will
  158. + //! write.
  159. + //!
  160. + //! \attention This returns a non-`const` pointer to this object’s private
  161. + //! data so that a caller can populate the context structure directly.
  162. + //! This is done because providing setter interfaces to each field in the
  163. + //! context structure would be unwieldy and cumbersome. Care must be taken
  164. + //! to populate the context structure correctly. The context structure
  165. + //! must only be modified while this object is in the #kStateMutable
  166. + //! state.
  167. + MinidumpContextRISCV64* context() { return &context_; }
  168. +
  169. + protected:
  170. + // MinidumpWritable:
  171. + bool WriteObject(FileWriterInterface* file_writer) override;
  172. +
  173. + // MinidumpContextWriter:
  174. + size_t ContextSize() const override;
  175. +
  176. + private:
  177. + MinidumpContextRISCV64 context_;
  178. +};
  179. +
  180. } // namespace crashpad
  181. #endif // CRASHPAD_MINIDUMP_MINIDUMP_CONTEXT_WRITER_H_
  182. diff --git a/third_party/crashpad/crashpad/minidump/minidump_misc_info_writer.cc b/third_party/crashpad/crashpad/minidump/minidump_misc_info_writer.cc
  183. index 78847c11970e..b2a1486dfbbf 100644
  184. --- a/third_party/crashpad/crashpad/minidump/minidump_misc_info_writer.cc
  185. +++ b/third_party/crashpad/crashpad/minidump/minidump_misc_info_writer.cc
  186. @@ -135,6 +135,10 @@ std::string MinidumpMiscInfoDebugBuildString() {
  187. static constexpr char kCPU[] = "mips";
  188. #elif defined(ARCH_CPU_MIPS64EL)
  189. static constexpr char kCPU[] = "mips64";
  190. +#elif defined(ARCH_CPU_RISCV)
  191. + static constexpr char kCPU[] = "riscv";
  192. +#elif defined(ARCH_CPU_RISCV64)
  193. + static constexpr char kCPU[] = "riscv64";
  194. #else
  195. #error define kCPU for this CPU
  196. #endif
  197. diff --git a/third_party/crashpad/crashpad/snapshot/capture_memory.cc b/third_party/crashpad/crashpad/snapshot/capture_memory.cc
  198. index 06d92581330b..616b985a912b 100644
  199. --- a/third_party/crashpad/crashpad/snapshot/capture_memory.cc
  200. +++ b/third_party/crashpad/crashpad/snapshot/capture_memory.cc
  201. @@ -112,6 +112,16 @@ void CaptureMemory::PointedToByContext(const CPUContext& context,
  202. for (size_t i = 0; i < std::size(context.mipsel->regs); ++i) {
  203. MaybeCaptureMemoryAround(delegate, context.mipsel->regs[i]);
  204. }
  205. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  206. + if (context.architecture == kCPUArchitectureRISCV) {
  207. + for (size_t i = 0; i < std::size(context.riscv->regs); ++i) {
  208. + MaybeCaptureMemoryAround(delegate, context.riscv->regs[i]);
  209. + }
  210. + } else {
  211. + for (size_t i = 0; i < std::size(context.riscv64->regs); ++i) {
  212. + MaybeCaptureMemoryAround(delegate, context.riscv64->regs[i]);
  213. + }
  214. + }
  215. #else
  216. #error Port.
  217. #endif
  218. diff --git a/third_party/crashpad/crashpad/snapshot/cpu_architecture.h b/third_party/crashpad/crashpad/snapshot/cpu_architecture.h
  219. index 811a7209587d..5b09abdb9676 100644
  220. --- a/third_party/crashpad/crashpad/snapshot/cpu_architecture.h
  221. +++ b/third_party/crashpad/crashpad/snapshot/cpu_architecture.h
  222. @@ -43,7 +43,13 @@ enum CPUArchitecture {
  223. kCPUArchitectureMIPSEL,
  224. //! \brief 64-bit MIPSEL.
  225. - kCPUArchitectureMIPS64EL
  226. + kCPUArchitectureMIPS64EL,
  227. +
  228. + //! \brief 32-bit RISCV.
  229. + kCPUArchitectureRISCV,
  230. +
  231. + //! \brief 64-bit RISCV.
  232. + kCPUArchitectureRISCV64
  233. };
  234. } // namespace crashpad
  235. diff --git a/third_party/crashpad/crashpad/snapshot/cpu_context.cc b/third_party/crashpad/crashpad/snapshot/cpu_context.cc
  236. index 2e29f70398c9..e2f8097e2cae 100644
  237. --- a/third_party/crashpad/crashpad/snapshot/cpu_context.cc
  238. +++ b/third_party/crashpad/crashpad/snapshot/cpu_context.cc
  239. @@ -197,10 +197,12 @@ bool CPUContext::Is64Bit() const {
  240. case kCPUArchitectureX86_64:
  241. case kCPUArchitectureARM64:
  242. case kCPUArchitectureMIPS64EL:
  243. + case kCPUArchitectureRISCV64:
  244. return true;
  245. case kCPUArchitectureX86:
  246. case kCPUArchitectureARM:
  247. case kCPUArchitectureMIPSEL:
  248. + case kCPUArchitectureRISCV:
  249. return false;
  250. default:
  251. NOTREACHED();
  252. diff --git a/third_party/crashpad/crashpad/snapshot/cpu_context.h b/third_party/crashpad/crashpad/snapshot/cpu_context.h
  253. index fb23c4679f0a..e120a980448d 100644
  254. --- a/third_party/crashpad/crashpad/snapshot/cpu_context.h
  255. +++ b/third_party/crashpad/crashpad/snapshot/cpu_context.h
  256. @@ -352,6 +352,20 @@ struct CPUContextMIPS64 {
  257. uint64_t fir;
  258. };
  259. +//! \brief A context structure carrying RISC CPU state.
  260. +struct CPUContextRISCV {
  261. + uint32_t regs[32];
  262. + uint64_t fpregs[32];
  263. + uint32_t fcsr;
  264. +};
  265. +
  266. +//! \brief A context structure carrying RISC64 CPU state.
  267. +struct CPUContextRISCV64 {
  268. + uint64_t regs[32];
  269. + uint64_t fpregs[32];
  270. + uint32_t fcsr;
  271. +};
  272. +
  273. //! \brief A context structure capable of carrying the context of any supported
  274. //! CPU architecture.
  275. struct CPUContext {
  276. @@ -382,6 +396,8 @@ struct CPUContext {
  277. CPUContextARM64* arm64;
  278. CPUContextMIPS* mipsel;
  279. CPUContextMIPS64* mips64;
  280. + CPUContextRISCV* riscv;
  281. + CPUContextRISCV64* riscv64;
  282. };
  283. };
  284. diff --git a/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.cc b/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.cc
  285. index 8464a5a27b2d..ec41216daa90 100644
  286. --- a/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.cc
  287. +++ b/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.cc
  288. @@ -266,6 +266,30 @@ void InitializeCPUContextARM64_OnlyFPSIMD(
  289. context->fpcr = float_context.fpcr;
  290. }
  291. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  292. +
  293. +template <typename Traits>
  294. +void InitializeCPUContextRISCV(
  295. + const typename Traits::SignalThreadContext& thread_context,
  296. + const typename Traits::SignalFloatContext& float_context,
  297. + typename Traits::CPUContext* context) {
  298. + static_assert(sizeof(context->regs) == sizeof(thread_context),
  299. + "registers size mismatch");
  300. + static_assert(sizeof(context->fpregs) == sizeof(float_context.f),
  301. + "fp registers size mismatch");
  302. + memcpy(&context->regs, &thread_context, sizeof(context->regs));
  303. + memcpy(&context->fpregs, &float_context, sizeof(context->fpregs));
  304. + context->fcsr = float_context.fcsr;
  305. +}
  306. +template void InitializeCPUContextRISCV<ContextTraits32>(
  307. + const ContextTraits32::SignalThreadContext& thread_context,
  308. + const ContextTraits32::SignalFloatContext& float_context,
  309. + ContextTraits32::CPUContext* context);
  310. +template void InitializeCPUContextRISCV<ContextTraits64>(
  311. + const ContextTraits64::SignalThreadContext& thread_context,
  312. + const ContextTraits64::SignalFloatContext& float_context,
  313. + ContextTraits64::CPUContext* context);
  314. +
  315. #endif // ARCH_CPU_X86_FAMILY
  316. } // namespace internal
  317. diff --git a/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.h b/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.h
  318. index 9f46a48977e1..1add07f81af8 100644
  319. --- a/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.h
  320. +++ b/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.h
  321. @@ -174,6 +174,22 @@ void InitializeCPUContextMIPS(
  322. #endif // ARCH_CPU_MIPS_FAMILY || DOXYGEN
  323. +#if defined(ARCH_CPU_RISCV_FAMILY) || DOXYGEN
  324. +
  325. +//! \brief Initializes a CPUContextRISCV structure from native context
  326. +//! structures on Linux.
  327. +//!
  328. +//! \param[in] thread_context The native thread context.
  329. +//! \param[in] float_context The native float context.
  330. +//! \param[out] context The CPUContextRISCV structure to initialize.
  331. +template <typename Traits>
  332. +void InitializeCPUContextRISCV(
  333. + const typename Traits::SignalThreadContext& thread_context,
  334. + const typename Traits::SignalFloatContext& float_context,
  335. + typename Traits::CPUContext* context);
  336. +
  337. +#endif // ARCH_CPU_RISCV_FAMILY || DOXYGEN
  338. +
  339. } // namespace internal
  340. } // namespace crashpad
  341. diff --git a/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.cc b/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.cc
  342. index efc9e5694ea8..c717069b0e71 100644
  343. --- a/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.cc
  344. +++ b/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.cc
  345. @@ -324,6 +324,60 @@ bool ExceptionSnapshotLinux::ReadContext<ContextTraits64>(
  346. return internal::ReadContext<ContextTraits64>(
  347. reader, context_address, context_.mips64);
  348. }
  349. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  350. +
  351. +template <typename Traits>
  352. +static bool ReadContext(ProcessReaderLinux* reader,
  353. + LinuxVMAddress context_address,
  354. + typename Traits::CPUContext* dest_context) {
  355. + const ProcessMemory* memory = reader->Memory();
  356. +
  357. + LinuxVMAddress gregs_address = context_address +
  358. + offsetof(UContext<Traits>, mcontext) +
  359. + offsetof(typename Traits::MContext, gregs);
  360. +
  361. + typename Traits::SignalThreadContext thread_context;
  362. + if (!memory->Read(gregs_address, sizeof(thread_context), &thread_context)) {
  363. + LOG(ERROR) << "Couldn't read gregs";
  364. + return false;
  365. + }
  366. +
  367. + LinuxVMAddress fpregs_address = context_address +
  368. + offsetof(UContext<Traits>, mcontext) +
  369. + offsetof(typename Traits::MContext, fpregs);
  370. +
  371. + typename Traits::SignalFloatContext fp_context;
  372. + if (!memory->Read(fpregs_address, sizeof(fp_context), &fp_context)) {
  373. + LOG(ERROR) << "Couldn't read fpregs";
  374. + return false;
  375. + }
  376. +
  377. + InitializeCPUContextRISCV<Traits>(thread_context, fp_context, dest_context);
  378. +
  379. + return true;
  380. +}
  381. +
  382. +template <>
  383. +bool ExceptionSnapshotLinux::ReadContext<ContextTraits32>(
  384. + ProcessReaderLinux* reader,
  385. + LinuxVMAddress context_address) {
  386. + context_.architecture = kCPUArchitectureRISCV;
  387. + context_.riscv = &context_union_.riscv;
  388. +
  389. + return internal::ReadContext<ContextTraits32>(
  390. + reader, context_address, context_.riscv);
  391. +}
  392. +
  393. +template <>
  394. +bool ExceptionSnapshotLinux::ReadContext<ContextTraits64>(
  395. + ProcessReaderLinux* reader,
  396. + LinuxVMAddress context_address) {
  397. + context_.architecture = kCPUArchitectureRISCV64;
  398. + context_.riscv64 = &context_union_.riscv64;
  399. +
  400. + return internal::ReadContext<ContextTraits64>(
  401. + reader, context_address, context_.riscv64);
  402. +}
  403. #endif // ARCH_CPU_X86_FAMILY
  404. diff --git a/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.h b/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.h
  405. index 05f6004e11d1..0520af4ce901 100644
  406. --- a/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.h
  407. +++ b/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.h
  408. @@ -89,6 +89,9 @@ class ExceptionSnapshotLinux final : public ExceptionSnapshot {
  409. #elif defined(ARCH_CPU_MIPS_FAMILY)
  410. CPUContextMIPS mipsel;
  411. CPUContextMIPS64 mips64;
  412. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  413. + CPUContextRISCV riscv;
  414. + CPUContextRISCV64 riscv64;
  415. #endif
  416. } context_union_;
  417. CPUContext context_;
  418. diff --git a/third_party/crashpad/crashpad/snapshot/linux/process_reader_linux.cc b/third_party/crashpad/crashpad/snapshot/linux/process_reader_linux.cc
  419. index 5711f343a46c..2b3dfeb99732 100644
  420. --- a/third_party/crashpad/crashpad/snapshot/linux/process_reader_linux.cc
  421. +++ b/third_party/crashpad/crashpad/snapshot/linux/process_reader_linux.cc
  422. @@ -108,6 +108,9 @@ void ProcessReaderLinux::Thread::InitializeStack(ProcessReaderLinux* reader) {
  423. #elif defined(ARCH_CPU_MIPS_FAMILY)
  424. stack_pointer = reader->Is64Bit() ? thread_info.thread_context.t64.regs[29]
  425. : thread_info.thread_context.t32.regs[29];
  426. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  427. + stack_pointer = reader->Is64Bit() ? thread_info.thread_context.t64.sp
  428. + : thread_info.thread_context.t32.sp;
  429. #else
  430. #error Port.
  431. #endif
  432. diff --git a/third_party/crashpad/crashpad/snapshot/linux/signal_context.h b/third_party/crashpad/crashpad/snapshot/linux/signal_context.h
  433. index c004f8f6dfab..2291306ca171 100644
  434. --- a/third_party/crashpad/crashpad/snapshot/linux/signal_context.h
  435. +++ b/third_party/crashpad/crashpad/snapshot/linux/signal_context.h
  436. @@ -421,6 +421,66 @@ static_assert(offsetof(UContext<ContextTraits64>, mcontext.fpregs) ==
  437. offsetof(ucontext_t, uc_mcontext.fpregs),
  438. "context offset mismatch");
  439. #endif
  440. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  441. +
  442. +struct MContext32 {
  443. + uint32_t gregs[32];
  444. + uint64_t fpregs[32];
  445. + unsigned int fcsr;
  446. +};
  447. +
  448. +struct MContext64 {
  449. + uint64_t gregs[32];
  450. + uint64_t fpregs[32];
  451. + unsigned int fcsr;
  452. +};
  453. +
  454. +struct ContextTraits32 : public Traits32 {
  455. + using MContext = MContext32;
  456. + using SignalThreadContext = ThreadContext::t32_t;
  457. + using SignalFloatContext = FloatContext::f32_t;
  458. + using CPUContext = CPUContextRISCV;
  459. +};
  460. +
  461. +struct ContextTraits64 : public Traits64 {
  462. + using MContext = MContext64;
  463. + using SignalThreadContext = ThreadContext::t64_t;
  464. + using SignalFloatContext = FloatContext::f64_t;
  465. + using CPUContext = CPUContextRISCV64;
  466. +};
  467. +
  468. +template <typename Traits>
  469. +struct UContext {
  470. + typename Traits::ULong flags;
  471. + typename Traits::Address link;
  472. + SignalStack<Traits> stack;
  473. + Sigset<Traits> sigmask;
  474. + char padding[128 - sizeof(sigmask)];
  475. + typename Traits::Char_64Only padding2[8];
  476. + typename Traits::MContext mcontext;
  477. +};
  478. +
  479. +#if defined(ARCH_CPU_RISCV)
  480. +static_assert(offsetof(UContext<ContextTraits32>, mcontext) ==
  481. + offsetof(ucontext_t, uc_mcontext),
  482. + "context offset mismatch");
  483. +static_assert(offsetof(UContext<ContextTraits32>, mcontext.gregs) ==
  484. + offsetof(ucontext_t, uc_mcontext.__gregs),
  485. + "context offset mismatch");
  486. +static_assert(offsetof(UContext<ContextTraits32>, mcontext.fpregs) ==
  487. + offsetof(ucontext_t, uc_mcontext.__fpregs),
  488. + "context offset mismatch");
  489. +#elif defined(ARCH_CPU_RISCV64)
  490. +static_assert(offsetof(UContext<ContextTraits64>, mcontext) ==
  491. + offsetof(ucontext_t, uc_mcontext),
  492. + "context offset mismatch");
  493. +static_assert(offsetof(UContext<ContextTraits64>, mcontext.gregs) ==
  494. + offsetof(ucontext_t, uc_mcontext.__gregs),
  495. + "context offset mismatch");
  496. +static_assert(offsetof(UContext<ContextTraits64>, mcontext.fpregs) ==
  497. + offsetof(ucontext_t, uc_mcontext.__fpregs),
  498. + "context offset mismatch");
  499. +#endif
  500. #else
  501. #error Port.
  502. diff --git a/third_party/crashpad/crashpad/snapshot/linux/system_snapshot_linux.cc b/third_party/crashpad/crashpad/snapshot/linux/system_snapshot_linux.cc
  503. index e77bcafa9c6b..2866bb484b5c 100644
  504. --- a/third_party/crashpad/crashpad/snapshot/linux/system_snapshot_linux.cc
  505. +++ b/third_party/crashpad/crashpad/snapshot/linux/system_snapshot_linux.cc
  506. @@ -205,6 +205,9 @@ CPUArchitecture SystemSnapshotLinux::GetCPUArchitecture() const {
  507. #elif defined(ARCH_CPU_MIPS_FAMILY)
  508. return process_reader_->Is64Bit() ? kCPUArchitectureMIPS64EL
  509. : kCPUArchitectureMIPSEL;
  510. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  511. + return process_reader_->Is64Bit() ? kCPUArchitectureRISCV64
  512. + : kCPUArchitectureRISCV;
  513. #else
  514. #error port to your architecture
  515. #endif
  516. @@ -220,6 +223,9 @@ uint32_t SystemSnapshotLinux::CPURevision() const {
  517. #elif defined(ARCH_CPU_MIPS_FAMILY)
  518. // Not implementable on MIPS
  519. return 0;
  520. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  521. + // Not implementable on RISCV
  522. + return 0;
  523. #else
  524. #error port to your architecture
  525. #endif
  526. @@ -240,6 +246,9 @@ std::string SystemSnapshotLinux::CPUVendor() const {
  527. #elif defined(ARCH_CPU_MIPS_FAMILY)
  528. // Not implementable on MIPS
  529. return std::string();
  530. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  531. + // Not implementable on RISCV
  532. + return std::string();
  533. #else
  534. #error port to your architecture
  535. #endif
  536. @@ -373,6 +382,9 @@ bool SystemSnapshotLinux::NXEnabled() const {
  537. #elif defined(ARCH_CPU_MIPS_FAMILY)
  538. // Not implementable on MIPS
  539. return false;
  540. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  541. + // Not implementable on RISCV
  542. + return false;
  543. #else
  544. #error Port.
  545. #endif // ARCH_CPU_X86_FAMILY
  546. diff --git a/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.cc b/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.cc
  547. index f279e0adaddb..8c133a7ca909 100644
  548. --- a/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.cc
  549. +++ b/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.cc
  550. @@ -189,6 +189,22 @@ bool ThreadSnapshotLinux::Initialize(
  551. thread.thread_info.float_context.f32,
  552. context_.mipsel);
  553. }
  554. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  555. + if (process_reader->Is64Bit()) {
  556. + context_.architecture = kCPUArchitectureRISCV64;
  557. + context_.riscv64 = &context_union_.riscv64;
  558. + InitializeCPUContextRISCV<ContextTraits64>(
  559. + thread.thread_info.thread_context.t64,
  560. + thread.thread_info.float_context.f64,
  561. + context_.riscv64);
  562. + } else {
  563. + context_.architecture = kCPUArchitectureRISCV;
  564. + context_.riscv = &context_union_.riscv;
  565. + InitializeCPUContextRISCV<ContextTraits32>(
  566. + thread.thread_info.thread_context.t32,
  567. + thread.thread_info.float_context.f32,
  568. + context_.riscv);
  569. + }
  570. #else
  571. #error Port.
  572. #endif
  573. diff --git a/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.h b/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.h
  574. index 40cd7e7f54a3..aea1ce2047a6 100644
  575. --- a/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.h
  576. +++ b/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.h
  577. @@ -73,6 +73,9 @@ class ThreadSnapshotLinux final : public ThreadSnapshot {
  578. #elif defined(ARCH_CPU_MIPS_FAMILY)
  579. CPUContextMIPS mipsel;
  580. CPUContextMIPS64 mips64;
  581. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  582. + CPUContextRISCV riscv;
  583. + CPUContextRISCV64 riscv64;
  584. #else
  585. #error Port.
  586. #endif // ARCH_CPU_X86_FAMILY
  587. diff --git a/third_party/crashpad/crashpad/util/linux/ptracer.cc b/third_party/crashpad/crashpad/util/linux/ptracer.cc
  588. index 557e0d363575..d74dbc1ba168 100644
  589. --- a/third_party/crashpad/crashpad/util/linux/ptracer.cc
  590. +++ b/third_party/crashpad/crashpad/util/linux/ptracer.cc
  591. @@ -397,6 +397,50 @@ bool GetThreadArea64(pid_t tid,
  592. *address = FromPointerCast<LinuxVMAddress>(result);
  593. return true;
  594. }
  595. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  596. +
  597. +template <typename Destination>
  598. +bool GetRegisterSet(pid_t tid, int set, Destination* dest, bool can_log) {
  599. + iovec iov;
  600. + iov.iov_base = dest;
  601. + iov.iov_len = sizeof(*dest);
  602. + if (ptrace(PTRACE_GETREGSET, tid, reinterpret_cast<void*>(set), &iov) != 0) {
  603. + PLOG_IF(ERROR, can_log) << "ptrace";
  604. + return false;
  605. + }
  606. + if (iov.iov_len != sizeof(*dest)) {
  607. + LOG_IF(ERROR, can_log) << "Unexpected registers size";
  608. + return false;
  609. + }
  610. + return true;
  611. +}
  612. +
  613. +bool GetFloatingPointRegisters32(pid_t tid,
  614. + FloatContext* context,
  615. + bool can_log) {
  616. + return false;
  617. +}
  618. +
  619. +bool GetFloatingPointRegisters64(pid_t tid,
  620. + FloatContext* context,
  621. + bool can_log) {
  622. + return GetRegisterSet(tid, NT_PRFPREG, &context->f64.f, can_log);
  623. +}
  624. +
  625. +bool GetThreadArea32(pid_t tid,
  626. + const ThreadContext& context,
  627. + LinuxVMAddress* address,
  628. + bool can_log) {
  629. + return false;
  630. +}
  631. +
  632. +bool GetThreadArea64(pid_t tid,
  633. + const ThreadContext& context,
  634. + LinuxVMAddress* address,
  635. + bool can_log) {
  636. + *address = context.t64.tp;
  637. + return true;
  638. +}
  639. #else
  640. #error Port.
  641. diff --git a/third_party/crashpad/crashpad/util/linux/thread_info.h b/third_party/crashpad/crashpad/util/linux/thread_info.h
  642. index d3f3b2c6953f..007722a29c23 100644
  643. --- a/third_party/crashpad/crashpad/util/linux/thread_info.h
  644. +++ b/third_party/crashpad/crashpad/util/linux/thread_info.h
  645. @@ -79,6 +79,40 @@ union ThreadContext {
  646. uint32_t cp0_status;
  647. uint32_t cp0_cause;
  648. uint32_t padding1_;
  649. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  650. + // Reflects user_regs_struct in asm/ptrace.h.
  651. + uint32_t pc;
  652. + uint32_t ra;
  653. + uint32_t sp;
  654. + uint32_t gp;
  655. + uint32_t tp;
  656. + uint32_t t0;
  657. + uint32_t t1;
  658. + uint32_t t2;
  659. + uint32_t s0;
  660. + uint32_t s1;
  661. + uint32_t a0;
  662. + uint32_t a1;
  663. + uint32_t a2;
  664. + uint32_t a3;
  665. + uint32_t a4;
  666. + uint32_t a5;
  667. + uint32_t a6;
  668. + uint32_t a7;
  669. + uint32_t s2;
  670. + uint32_t s3;
  671. + uint32_t s4;
  672. + uint32_t s5;
  673. + uint32_t s6;
  674. + uint32_t s7;
  675. + uint32_t s8;
  676. + uint32_t s9;
  677. + uint32_t s10;
  678. + uint32_t s11;
  679. + uint32_t t3;
  680. + uint32_t t4;
  681. + uint32_t t5;
  682. + uint32_t t6;
  683. #else
  684. #error Port.
  685. #endif // ARCH_CPU_X86_FAMILY
  686. @@ -132,6 +166,40 @@ union ThreadContext {
  687. uint64_t cp0_badvaddr;
  688. uint64_t cp0_status;
  689. uint64_t cp0_cause;
  690. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  691. + // Reflects user_regs_struct in asm/ptrace.h.
  692. + uint64_t pc;
  693. + uint64_t ra;
  694. + uint64_t sp;
  695. + uint64_t gp;
  696. + uint64_t tp;
  697. + uint64_t t0;
  698. + uint64_t t1;
  699. + uint64_t t2;
  700. + uint64_t s0;
  701. + uint64_t s1;
  702. + uint64_t a0;
  703. + uint64_t a1;
  704. + uint64_t a2;
  705. + uint64_t a3;
  706. + uint64_t a4;
  707. + uint64_t a5;
  708. + uint64_t a6;
  709. + uint64_t a7;
  710. + uint64_t s2;
  711. + uint64_t s3;
  712. + uint64_t s4;
  713. + uint64_t s5;
  714. + uint64_t s6;
  715. + uint64_t s7;
  716. + uint64_t s8;
  717. + uint64_t s9;
  718. + uint64_t s10;
  719. + uint64_t s11;
  720. + uint64_t t3;
  721. + uint64_t t4;
  722. + uint64_t t5;
  723. + uint64_t t6;
  724. #else
  725. #error Port.
  726. #endif // ARCH_CPU_X86_FAMILY
  727. @@ -143,11 +211,12 @@ union ThreadContext {
  728. using NativeThreadContext = user_regs;
  729. #elif defined(ARCH_CPU_MIPS_FAMILY)
  730. // No appropriate NativeThreadsContext type available for MIPS
  731. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  732. #else
  733. #error Port.
  734. #endif // ARCH_CPU_X86_FAMILY || ARCH_CPU_ARM64
  735. -#if !defined(ARCH_CPU_MIPS_FAMILY)
  736. +#if !defined(ARCH_CPU_MIPS_FAMILY) && !defined(ARCH_CPU_RISCV_FAMILY)
  737. #if defined(ARCH_CPU_32_BITS)
  738. static_assert(sizeof(t32_t) == sizeof(NativeThreadContext), "Size mismatch");
  739. #else // ARCH_CPU_64_BITS
  740. @@ -218,6 +287,9 @@ union FloatContext {
  741. } fpregs[32];
  742. uint32_t fpcsr;
  743. uint32_t fpu_id;
  744. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  745. + uint64_t f[32];
  746. + uint32_t fcsr;
  747. #else
  748. #error Port.
  749. #endif // ARCH_CPU_X86_FAMILY
  750. @@ -252,6 +324,9 @@ union FloatContext {
  751. double fpregs[32];
  752. uint32_t fpcsr;
  753. uint32_t fpu_id;
  754. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  755. + uint64_t f[32];
  756. + uint32_t fcsr;
  757. #else
  758. #error Port.
  759. #endif // ARCH_CPU_X86_FAMILY
  760. @@ -281,6 +356,7 @@ union FloatContext {
  761. static_assert(sizeof(f64) == sizeof(user_fpsimd_struct), "Size mismatch");
  762. #elif defined(ARCH_CPU_MIPS_FAMILY)
  763. // No appropriate floating point context native type for available MIPS.
  764. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  765. #else
  766. #error Port.
  767. #endif // ARCH_CPU_X86
  768. diff --git a/third_party/crashpad/crashpad/util/net/http_transport_libcurl.cc b/third_party/crashpad/crashpad/util/net/http_transport_libcurl.cc
  769. index 7e3f41186f46..9568dc2e24f9 100644
  770. --- a/third_party/crashpad/crashpad/util/net/http_transport_libcurl.cc
  771. +++ b/third_party/crashpad/crashpad/util/net/http_transport_libcurl.cc
  772. @@ -237,6 +237,8 @@ std::string UserAgent() {
  773. #elif defined(ARCH_CPU_BIG_ENDIAN)
  774. static constexpr char arch[] = "aarch64_be";
  775. #endif
  776. +#elif defined(ARCH_CPU_RISCV64)
  777. + static constexpr char arch[] = "riscv64";
  778. #else
  779. #error Port
  780. #endif
  781. --
  782. 2.30.2