0011-third-party-crashpad-crashpad.patch 28 KB

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  1. diff --git a/third_party/crashpad/crashpad/minidump/minidump_context.h b/third_party/crashpad/crashpad/minidump/minidump_context.h
  2. index 3a3e603cb0d2d..cf074d2b8236b 100644
  3. --- a/third_party/crashpad/crashpad/minidump/minidump_context.h
  4. +++ b/third_party/crashpad/crashpad/minidump/minidump_context.h
  5. @@ -592,6 +592,41 @@ struct MinidumpContextMIPS64 {
  6. uint64_t fir;
  7. };
  8. +//! \brief 64bit RISC-V-specifc flags for MinidumpContextRISCV64::context_flags.
  9. +//! Based on minidump_cpu_riscv64.h from breakpad
  10. +enum MinidumpContextRISCV64Flags : uint32_t {
  11. + //! \brief Identifies the context structure as RISCV64.
  12. + kMinidumpContextRISCV64 = 0x00080000,
  13. +
  14. + //! \brief Indicates the validity of integer registers.
  15. + //!
  16. + //! Registers `x1`-`x31` and pc are valid.
  17. + kMinidumpContextRISCV64Integer = kMinidumpContextRISCV64 | 0x00000002,
  18. +
  19. + //! \brief Indicates the validity of floating point registers.
  20. + //!
  21. + //! Floating point registers `f0`-`f31`, and `fcsr` are valid
  22. + kMinidumpContextRISCV64FloatingPoint = kMinidumpContextRISCV64 | 0x00000004,
  23. +
  24. + //! \brief Indicates the validity of all registers.
  25. + kMinidumpContextRISCV64All = kMinidumpContextRISCV64Integer |
  26. + kMinidumpContextRISCV64FloatingPoint,
  27. +};
  28. +
  29. +//! \brief A 64bit RISCV CPU context (register state) carried in a minidump file.
  30. +struct MinidumpContextRISCV64 {
  31. + uint64_t context_flags;
  32. +
  33. + //! \brief General purpose registers.
  34. + uint64_t regs[32];
  35. +
  36. + //! \brief FPU registers.
  37. + uint64_t fpregs[32];
  38. +
  39. + //! \brief FPU status register.
  40. + uint64_t fcsr;
  41. +};
  42. +
  43. } // namespace crashpad
  44. #endif // CRASHPAD_MINIDUMP_MINIDUMP_CONTEXT_H_
  45. diff --git a/third_party/crashpad/crashpad/minidump/minidump_context_writer.cc b/third_party/crashpad/crashpad/minidump/minidump_context_writer.cc
  46. index 2f2d90ba47071..ad26739432f51 100644
  47. --- a/third_party/crashpad/crashpad/minidump/minidump_context_writer.cc
  48. +++ b/third_party/crashpad/crashpad/minidump/minidump_context_writer.cc
  49. @@ -102,6 +102,13 @@ MinidumpContextWriter::CreateFromSnapshot(const CPUContext* context_snapshot) {
  50. break;
  51. }
  52. + case kCPUArchitectureRISCV64: {
  53. + context = std::make_unique<MinidumpContextRISCV64Writer>();
  54. + reinterpret_cast<MinidumpContextRISCV64Writer*>(context.get())
  55. + ->InitializeFromSnapshot(context_snapshot->riscv64);
  56. + break;
  57. + }
  58. +
  59. default: {
  60. LOG(ERROR) << "unknown context architecture "
  61. << context_snapshot->architecture;
  62. @@ -454,4 +461,41 @@ size_t MinidumpContextMIPS64Writer::ContextSize() const {
  63. return sizeof(context_);
  64. }
  65. +MinidumpContextRISCV64Writer::MinidumpContextRISCV64Writer()
  66. + : MinidumpContextWriter(), context_() {
  67. + context_.context_flags = kMinidumpContextRISCV64;
  68. +}
  69. +
  70. +MinidumpContextRISCV64Writer::~MinidumpContextRISCV64Writer() = default;
  71. +
  72. +void MinidumpContextRISCV64Writer::InitializeFromSnapshot(
  73. + const CPUContextRISCV64* context_snapshot) {
  74. + DCHECK_EQ(state(), kStateMutable);
  75. + DCHECK_EQ(context_.context_flags, kMinidumpContextRISCV64);
  76. +
  77. + context_.context_flags = kMinidumpContextRISCV64All;
  78. +
  79. + static_assert(sizeof(context_.regs) == sizeof(context_snapshot->regs),
  80. + "GPRs size mismatch");
  81. + memcpy(context_.regs, context_snapshot->regs, sizeof(context_.regs));
  82. +
  83. + static_assert(sizeof(context_.fpregs) == sizeof(context_snapshot->fpregs),
  84. + "FPRs size mismatch");
  85. + memcpy(context_.fpregs,
  86. + context_snapshot->fpregs,
  87. + sizeof(context_.fpregs));
  88. + context_.fcsr = context_snapshot->fcsr;
  89. +}
  90. +
  91. +bool MinidumpContextRISCV64Writer::WriteObject(
  92. + FileWriterInterface* file_writer) {
  93. + DCHECK_EQ(state(), kStateWritable);
  94. + return file_writer->Write(&context_, sizeof(context_));
  95. +}
  96. +
  97. +size_t MinidumpContextRISCV64Writer::ContextSize() const {
  98. + DCHECK_GE(state(), kStateFrozen);
  99. + return sizeof(context_);
  100. +}
  101. +
  102. } // namespace crashpad
  103. diff --git a/third_party/crashpad/crashpad/minidump/minidump_context_writer.h b/third_party/crashpad/crashpad/minidump/minidump_context_writer.h
  104. index 80b312b23c2a4..278830085c162 100644
  105. --- a/third_party/crashpad/crashpad/minidump/minidump_context_writer.h
  106. +++ b/third_party/crashpad/crashpad/minidump/minidump_context_writer.h
  107. @@ -330,6 +330,47 @@ class MinidumpContextMIPS64Writer final : public MinidumpContextWriter {
  108. MinidumpContextMIPS64 context_;
  109. };
  110. +//! \brief The writer for a MinidumpContextRISCV64 structure in a minidump file.
  111. +class MinidumpContextRISCV64Writer final : public MinidumpContextWriter {
  112. + public:
  113. + MinidumpContextRISCV64Writer();
  114. + ~MinidumpContextRISCV64Writer() override;
  115. +
  116. + MinidumpContextRISCV64Writer(const MinidumpContextRISCV64Writer&) = delete;
  117. + void operator=(const MinidumpContextRISCV64Writer&) = delete;
  118. +
  119. + //! \brief Initializes the MinidumpContextRISCV based on \a context_snapshot.
  120. + //!
  121. + //! \param[in] context_snapshot The context snapshot to use as source data.
  122. + //!
  123. + //! \note Valid in #kStateMutable. No mutation of context() may be done before
  124. + //! calling this method, and it is not normally necessary to alter
  125. + //! context() after calling this method.
  126. + void InitializeFromSnapshot(const CPUContextRISCV64* context_snapshot);
  127. +
  128. + //! \brief Returns a pointer to the context structure that this object will
  129. + //! write.
  130. + //!
  131. + //! \attention This returns a non-`const` pointer to this object’s private
  132. + //! data so that a caller can populate the context structure directly.
  133. + //! This is done because providing setter interfaces to each field in the
  134. + //! context structure would be unwieldy and cumbersome. Care must be taken
  135. + //! to populate the context structure correctly. The context structure
  136. + //! must only be modified while this object is in the #kStateMutable
  137. + //! state.
  138. + MinidumpContextRISCV64* context() { return &context_; }
  139. +
  140. + protected:
  141. + // MinidumpWritable:
  142. + bool WriteObject(FileWriterInterface* file_writer) override;
  143. +
  144. + // MinidumpContextWriter:
  145. + size_t ContextSize() const override;
  146. +
  147. + private:
  148. + MinidumpContextRISCV64 context_;
  149. +};
  150. +
  151. } // namespace crashpad
  152. #endif // CRASHPAD_MINIDUMP_MINIDUMP_CONTEXT_WRITER_H_
  153. diff --git a/third_party/crashpad/crashpad/minidump/minidump_misc_info_writer.cc b/third_party/crashpad/crashpad/minidump/minidump_misc_info_writer.cc
  154. index 78847c11970e5..b2a1486dfbbf0 100644
  155. --- a/third_party/crashpad/crashpad/minidump/minidump_misc_info_writer.cc
  156. +++ b/third_party/crashpad/crashpad/minidump/minidump_misc_info_writer.cc
  157. @@ -135,6 +135,10 @@ std::string MinidumpMiscInfoDebugBuildString() {
  158. static constexpr char kCPU[] = "mips";
  159. #elif defined(ARCH_CPU_MIPS64EL)
  160. static constexpr char kCPU[] = "mips64";
  161. +#elif defined(ARCH_CPU_RISCV)
  162. + static constexpr char kCPU[] = "riscv";
  163. +#elif defined(ARCH_CPU_RISCV64)
  164. + static constexpr char kCPU[] = "riscv64";
  165. #else
  166. #error define kCPU for this CPU
  167. #endif
  168. diff --git a/third_party/crashpad/crashpad/snapshot/capture_memory.cc b/third_party/crashpad/crashpad/snapshot/capture_memory.cc
  169. index 06d92581330bf..a8b52d11b9b53 100644
  170. --- a/third_party/crashpad/crashpad/snapshot/capture_memory.cc
  171. +++ b/third_party/crashpad/crashpad/snapshot/capture_memory.cc
  172. @@ -112,6 +112,16 @@ void CaptureMemory::PointedToByContext(const CPUContext& context,
  173. for (size_t i = 0; i < std::size(context.mipsel->regs); ++i) {
  174. MaybeCaptureMemoryAround(delegate, context.mipsel->regs[i]);
  175. }
  176. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  177. + if (context.architecture == kCPUArchitectureRISCV) {
  178. + for (size_t i = 0; i < base::size(context.riscv->regs); ++i) {
  179. + MaybeCaptureMemoryAround(delegate, context.riscv->regs[i]);
  180. + }
  181. + } else {
  182. + for (size_t i = 0; i < base::size(context.riscv64->regs); ++i) {
  183. + MaybeCaptureMemoryAround(delegate, context.riscv64->regs[i]);
  184. + }
  185. + }
  186. #else
  187. #error Port.
  188. #endif
  189. diff --git a/third_party/crashpad/crashpad/snapshot/cpu_architecture.h b/third_party/crashpad/crashpad/snapshot/cpu_architecture.h
  190. index 811a7209587d2..5b09abdb96761 100644
  191. --- a/third_party/crashpad/crashpad/snapshot/cpu_architecture.h
  192. +++ b/third_party/crashpad/crashpad/snapshot/cpu_architecture.h
  193. @@ -43,7 +43,13 @@ enum CPUArchitecture {
  194. kCPUArchitectureMIPSEL,
  195. //! \brief 64-bit MIPSEL.
  196. - kCPUArchitectureMIPS64EL
  197. + kCPUArchitectureMIPS64EL,
  198. +
  199. + //! \brief 32-bit RISCV.
  200. + kCPUArchitectureRISCV,
  201. +
  202. + //! \brief 64-bit RISCV.
  203. + kCPUArchitectureRISCV64
  204. };
  205. } // namespace crashpad
  206. diff --git a/third_party/crashpad/crashpad/snapshot/cpu_context.cc b/third_party/crashpad/crashpad/snapshot/cpu_context.cc
  207. index 2e29f70398c9f..e2f8097e2cae1 100644
  208. --- a/third_party/crashpad/crashpad/snapshot/cpu_context.cc
  209. +++ b/third_party/crashpad/crashpad/snapshot/cpu_context.cc
  210. @@ -197,10 +197,12 @@ bool CPUContext::Is64Bit() const {
  211. case kCPUArchitectureX86_64:
  212. case kCPUArchitectureARM64:
  213. case kCPUArchitectureMIPS64EL:
  214. + case kCPUArchitectureRISCV64:
  215. return true;
  216. case kCPUArchitectureX86:
  217. case kCPUArchitectureARM:
  218. case kCPUArchitectureMIPSEL:
  219. + case kCPUArchitectureRISCV:
  220. return false;
  221. default:
  222. NOTREACHED();
  223. diff --git a/third_party/crashpad/crashpad/snapshot/cpu_context.h b/third_party/crashpad/crashpad/snapshot/cpu_context.h
  224. index fb23c4679f0af..e120a980448d6 100644
  225. --- a/third_party/crashpad/crashpad/snapshot/cpu_context.h
  226. +++ b/third_party/crashpad/crashpad/snapshot/cpu_context.h
  227. @@ -352,6 +352,20 @@ struct CPUContextMIPS64 {
  228. uint64_t fir;
  229. };
  230. +//! \brief A context structure carrying RISC CPU state.
  231. +struct CPUContextRISCV {
  232. + uint32_t regs[32];
  233. + uint64_t fpregs[32];
  234. + uint32_t fcsr;
  235. +};
  236. +
  237. +//! \brief A context structure carrying RISC64 CPU state.
  238. +struct CPUContextRISCV64 {
  239. + uint64_t regs[32];
  240. + uint64_t fpregs[32];
  241. + uint32_t fcsr;
  242. +};
  243. +
  244. //! \brief A context structure capable of carrying the context of any supported
  245. //! CPU architecture.
  246. struct CPUContext {
  247. @@ -382,6 +396,8 @@ struct CPUContext {
  248. CPUContextARM64* arm64;
  249. CPUContextMIPS* mipsel;
  250. CPUContextMIPS64* mips64;
  251. + CPUContextRISCV* riscv;
  252. + CPUContextRISCV64* riscv64;
  253. };
  254. };
  255. diff --git a/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.cc b/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.cc
  256. index 8464a5a27b2dc..ec41216daa902 100644
  257. --- a/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.cc
  258. +++ b/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.cc
  259. @@ -266,6 +266,30 @@ void InitializeCPUContextARM64_OnlyFPSIMD(
  260. context->fpcr = float_context.fpcr;
  261. }
  262. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  263. +
  264. +template <typename Traits>
  265. +void InitializeCPUContextRISCV(
  266. + const typename Traits::SignalThreadContext& thread_context,
  267. + const typename Traits::SignalFloatContext& float_context,
  268. + typename Traits::CPUContext* context) {
  269. + static_assert(sizeof(context->regs) == sizeof(thread_context),
  270. + "registers size mismatch");
  271. + static_assert(sizeof(context->fpregs) == sizeof(float_context.f),
  272. + "fp registers size mismatch");
  273. + memcpy(&context->regs, &thread_context, sizeof(context->regs));
  274. + memcpy(&context->fpregs, &float_context, sizeof(context->fpregs));
  275. + context->fcsr = float_context.fcsr;
  276. +}
  277. +template void InitializeCPUContextRISCV<ContextTraits32>(
  278. + const ContextTraits32::SignalThreadContext& thread_context,
  279. + const ContextTraits32::SignalFloatContext& float_context,
  280. + ContextTraits32::CPUContext* context);
  281. +template void InitializeCPUContextRISCV<ContextTraits64>(
  282. + const ContextTraits64::SignalThreadContext& thread_context,
  283. + const ContextTraits64::SignalFloatContext& float_context,
  284. + ContextTraits64::CPUContext* context);
  285. +
  286. #endif // ARCH_CPU_X86_FAMILY
  287. } // namespace internal
  288. diff --git a/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.h b/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.h
  289. index 9f46a48977e12..1add07f81af88 100644
  290. --- a/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.h
  291. +++ b/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.h
  292. @@ -174,6 +174,22 @@ void InitializeCPUContextMIPS(
  293. #endif // ARCH_CPU_MIPS_FAMILY || DOXYGEN
  294. +#if defined(ARCH_CPU_RISCV_FAMILY) || DOXYGEN
  295. +
  296. +//! \brief Initializes a CPUContextRISCV structure from native context
  297. +//! structures on Linux.
  298. +//!
  299. +//! \param[in] thread_context The native thread context.
  300. +//! \param[in] float_context The native float context.
  301. +//! \param[out] context The CPUContextRISCV structure to initialize.
  302. +template <typename Traits>
  303. +void InitializeCPUContextRISCV(
  304. + const typename Traits::SignalThreadContext& thread_context,
  305. + const typename Traits::SignalFloatContext& float_context,
  306. + typename Traits::CPUContext* context);
  307. +
  308. +#endif // ARCH_CPU_RISCV_FAMILY || DOXYGEN
  309. +
  310. } // namespace internal
  311. } // namespace crashpad
  312. diff --git a/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.cc b/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.cc
  313. index efc9e5694ea8b..3d57d96756208 100644
  314. --- a/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.cc
  315. +++ b/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.cc
  316. @@ -325,6 +325,61 @@ bool ExceptionSnapshotLinux::ReadContext<ContextTraits64>(
  317. reader, context_address, context_.mips64);
  318. }
  319. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  320. +
  321. +template <typename Traits>
  322. +static bool ReadContext(ProcessReaderLinux* reader,
  323. + LinuxVMAddress context_address,
  324. + typename Traits::CPUContext* dest_context) {
  325. + const ProcessMemory* memory = reader->Memory();
  326. +
  327. + LinuxVMAddress gregs_address = context_address +
  328. + offsetof(UContext<Traits>, mcontext) +
  329. + offsetof(typename Traits::MContext, gregs);
  330. +
  331. + typename Traits::SignalThreadContext thread_context;
  332. + if (!memory->Read(gregs_address, sizeof(thread_context), &thread_context)) {
  333. + LOG(ERROR) << "Couldn't read gregs";
  334. + return false;
  335. + }
  336. +
  337. + LinuxVMAddress fpregs_address = context_address +
  338. + offsetof(UContext<Traits>, mcontext) +
  339. + offsetof(typename Traits::MContext, fpregs);
  340. +
  341. + typename Traits::SignalFloatContext fp_context;
  342. + if (!memory->Read(fpregs_address, sizeof(fp_context), &fp_context)) {
  343. + LOG(ERROR) << "Couldn't read fpregs";
  344. + return false;
  345. + }
  346. +
  347. + InitializeCPUContextRISCV<Traits>(thread_context, fp_context, dest_context);
  348. +
  349. + return true;
  350. +}
  351. +
  352. +template <>
  353. +bool ExceptionSnapshotLinux::ReadContext<ContextTraits32>(
  354. + ProcessReaderLinux* reader,
  355. + LinuxVMAddress context_address) {
  356. + context_.architecture = kCPUArchitectureRISCV;
  357. + context_.riscv = &context_union_.riscv;
  358. +
  359. + return internal::ReadContext<ContextTraits32>(
  360. + reader, context_address, context_.riscv);
  361. +}
  362. +
  363. +template <>
  364. +bool ExceptionSnapshotLinux::ReadContext<ContextTraits64>(
  365. + ProcessReaderLinux* reader,
  366. + LinuxVMAddress context_address) {
  367. + context_.architecture = kCPUArchitectureRISCV64;
  368. + context_.riscv64 = &context_union_.riscv64;
  369. +
  370. + return internal::ReadContext<ContextTraits64>(
  371. + reader, context_address, context_.riscv64);
  372. +}
  373. +
  374. #endif // ARCH_CPU_X86_FAMILY
  375. bool ExceptionSnapshotLinux::Initialize(
  376. diff --git a/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.h b/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.h
  377. index 05f6004e11d1e..0520af4ce9019 100644
  378. --- a/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.h
  379. +++ b/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.h
  380. @@ -89,6 +89,9 @@ class ExceptionSnapshotLinux final : public ExceptionSnapshot {
  381. #elif defined(ARCH_CPU_MIPS_FAMILY)
  382. CPUContextMIPS mipsel;
  383. CPUContextMIPS64 mips64;
  384. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  385. + CPUContextRISCV riscv;
  386. + CPUContextRISCV64 riscv64;
  387. #endif
  388. } context_union_;
  389. CPUContext context_;
  390. diff --git a/third_party/crashpad/crashpad/snapshot/linux/process_reader_linux.cc b/third_party/crashpad/crashpad/snapshot/linux/process_reader_linux.cc
  391. index 5711f343a46c4..abbb1662c3e0a 100644
  392. --- a/third_party/crashpad/crashpad/snapshot/linux/process_reader_linux.cc
  393. +++ b/third_party/crashpad/crashpad/snapshot/linux/process_reader_linux.cc
  394. @@ -108,6 +108,9 @@ void ProcessReaderLinux::Thread::InitializeStack(ProcessReaderLinux* reader) {
  395. #elif defined(ARCH_CPU_MIPS_FAMILY)
  396. stack_pointer = reader->Is64Bit() ? thread_info.thread_context.t64.regs[29]
  397. : thread_info.thread_context.t32.regs[29];
  398. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  399. + stack_pointer = reader->Is64Bit() ? thread_info.thread_context.t64.sp
  400. + : thread_info.thread_context.t32.sp;
  401. #else
  402. #error Port.
  403. #endif
  404. diff --git a/third_party/crashpad/crashpad/snapshot/linux/signal_context.h b/third_party/crashpad/crashpad/snapshot/linux/signal_context.h
  405. index c004f8f6dfab6..6aa9ee38f5b04 100644
  406. --- a/third_party/crashpad/crashpad/snapshot/linux/signal_context.h
  407. +++ b/third_party/crashpad/crashpad/snapshot/linux/signal_context.h
  408. @@ -422,6 +422,67 @@ static_assert(offsetof(UContext<ContextTraits64>, mcontext.fpregs) ==
  409. "context offset mismatch");
  410. #endif
  411. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  412. +
  413. +struct MContext32 {
  414. + uint32_t gregs[32];
  415. + uint64_t fpregs[32];
  416. + unsigned int fcsr;
  417. +};
  418. +
  419. +struct MContext64 {
  420. + uint64_t gregs[32];
  421. + uint64_t fpregs[32];
  422. + unsigned int fcsr;
  423. +};
  424. +
  425. +struct ContextTraits32 : public Traits32 {
  426. + using MContext = MContext32;
  427. + using SignalThreadContext = ThreadContext::t32_t;
  428. + using SignalFloatContext = FloatContext::f32_t;
  429. + using CPUContext = CPUContextRISCV;
  430. +};
  431. +
  432. +struct ContextTraits64 : public Traits64 {
  433. + using MContext = MContext64;
  434. + using SignalThreadContext = ThreadContext::t64_t;
  435. + using SignalFloatContext = FloatContext::f64_t;
  436. + using CPUContext = CPUContextRISCV64;
  437. +};
  438. +
  439. +template <typename Traits>
  440. +struct UContext {
  441. + typename Traits::ULong flags;
  442. + typename Traits::Address link;
  443. + SignalStack<Traits> stack;
  444. + Sigset<Traits> sigmask;
  445. + char padding[128 - sizeof(sigmask)];
  446. + typename Traits::Char_64Only padding2[8];
  447. + typename Traits::MContext mcontext;
  448. +};
  449. +
  450. +#if defined(ARCH_CPU_RISCV)
  451. +static_assert(offsetof(UContext<ContextTraits32>, mcontext) ==
  452. + offsetof(ucontext_t, uc_mcontext),
  453. + "context offset mismatch");
  454. +static_assert(offsetof(UContext<ContextTraits32>, mcontext.gregs) ==
  455. + offsetof(ucontext_t, uc_mcontext.__gregs),
  456. + "context offset mismatch");
  457. +static_assert(offsetof(UContext<ContextTraits32>, mcontext.fpregs) ==
  458. + offsetof(ucontext_t, uc_mcontext.__fpregs),
  459. + "context offset mismatch");
  460. +#elif defined(ARCH_CPU_RISCV64)
  461. +static_assert(offsetof(UContext<ContextTraits64>, mcontext) ==
  462. + offsetof(ucontext_t, uc_mcontext),
  463. + "context offset mismatch");
  464. +static_assert(offsetof(UContext<ContextTraits64>, mcontext.gregs) ==
  465. + offsetof(ucontext_t, uc_mcontext.__gregs),
  466. + "context offset mismatch");
  467. +static_assert(offsetof(UContext<ContextTraits64>, mcontext.fpregs) ==
  468. + offsetof(ucontext_t, uc_mcontext.__fpregs),
  469. + "context offset mismatch");
  470. +#endif
  471. +
  472. #else
  473. #error Port.
  474. #endif // ARCH_CPU_X86_FAMILY
  475. diff --git a/third_party/crashpad/crashpad/snapshot/linux/system_snapshot_linux.cc b/third_party/crashpad/crashpad/snapshot/linux/system_snapshot_linux.cc
  476. index e77bcafa9c6b5..55564ae4aeaf5 100644
  477. --- a/third_party/crashpad/crashpad/snapshot/linux/system_snapshot_linux.cc
  478. +++ b/third_party/crashpad/crashpad/snapshot/linux/system_snapshot_linux.cc
  479. @@ -205,6 +205,9 @@ CPUArchitecture SystemSnapshotLinux::GetCPUArchitecture() const {
  480. #elif defined(ARCH_CPU_MIPS_FAMILY)
  481. return process_reader_->Is64Bit() ? kCPUArchitectureMIPS64EL
  482. : kCPUArchitectureMIPSEL;
  483. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  484. + return process_reader_->Is64Bit() ? kCPUArchitectureRISCV64
  485. + : kCPUArchitectureRISCV;
  486. #else
  487. #error port to your architecture
  488. #endif
  489. @@ -220,6 +223,9 @@ uint32_t SystemSnapshotLinux::CPURevision() const {
  490. #elif defined(ARCH_CPU_MIPS_FAMILY)
  491. // Not implementable on MIPS
  492. return 0;
  493. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  494. + // Not implementable on RISCV
  495. + return 0;
  496. #else
  497. #error port to your architecture
  498. #endif
  499. @@ -240,6 +246,9 @@ std::string SystemSnapshotLinux::CPUVendor() const {
  500. #elif defined(ARCH_CPU_MIPS_FAMILY)
  501. // Not implementable on MIPS
  502. return std::string();
  503. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  504. + // Not implementable on RISCV
  505. + return std::string();
  506. #else
  507. #error port to your architecture
  508. #endif
  509. @@ -373,6 +382,9 @@ bool SystemSnapshotLinux::NXEnabled() const {
  510. #elif defined(ARCH_CPU_MIPS_FAMILY)
  511. // Not implementable on MIPS
  512. return false;
  513. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  514. + // Not implementable on RISCV
  515. + return false;
  516. #else
  517. #error Port.
  518. #endif // ARCH_CPU_X86_FAMILY
  519. diff --git a/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.cc b/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.cc
  520. index f279e0adaddba..8c133a7ca909f 100644
  521. --- a/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.cc
  522. +++ b/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.cc
  523. @@ -189,6 +189,22 @@ bool ThreadSnapshotLinux::Initialize(
  524. thread.thread_info.float_context.f32,
  525. context_.mipsel);
  526. }
  527. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  528. + if (process_reader->Is64Bit()) {
  529. + context_.architecture = kCPUArchitectureRISCV64;
  530. + context_.riscv64 = &context_union_.riscv64;
  531. + InitializeCPUContextRISCV<ContextTraits64>(
  532. + thread.thread_info.thread_context.t64,
  533. + thread.thread_info.float_context.f64,
  534. + context_.riscv64);
  535. + } else {
  536. + context_.architecture = kCPUArchitectureRISCV;
  537. + context_.riscv = &context_union_.riscv;
  538. + InitializeCPUContextRISCV<ContextTraits32>(
  539. + thread.thread_info.thread_context.t32,
  540. + thread.thread_info.float_context.f32,
  541. + context_.riscv);
  542. + }
  543. #else
  544. #error Port.
  545. #endif
  546. diff --git a/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.h b/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.h
  547. index 40cd7e7f54a39..aea1ce2047a6b 100644
  548. --- a/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.h
  549. +++ b/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.h
  550. @@ -73,6 +73,9 @@ class ThreadSnapshotLinux final : public ThreadSnapshot {
  551. #elif defined(ARCH_CPU_MIPS_FAMILY)
  552. CPUContextMIPS mipsel;
  553. CPUContextMIPS64 mips64;
  554. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  555. + CPUContextRISCV riscv;
  556. + CPUContextRISCV64 riscv64;
  557. #else
  558. #error Port.
  559. #endif // ARCH_CPU_X86_FAMILY
  560. diff --git a/third_party/crashpad/crashpad/util/linux/ptracer.cc b/third_party/crashpad/crashpad/util/linux/ptracer.cc
  561. index 557e0d3635752..d74dbc1ba1688 100644
  562. --- a/third_party/crashpad/crashpad/util/linux/ptracer.cc
  563. +++ b/third_party/crashpad/crashpad/util/linux/ptracer.cc
  564. @@ -397,6 +397,50 @@ bool GetThreadArea64(pid_t tid,
  565. *address = FromPointerCast<LinuxVMAddress>(result);
  566. return true;
  567. }
  568. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  569. +
  570. +template <typename Destination>
  571. +bool GetRegisterSet(pid_t tid, int set, Destination* dest, bool can_log) {
  572. + iovec iov;
  573. + iov.iov_base = dest;
  574. + iov.iov_len = sizeof(*dest);
  575. + if (ptrace(PTRACE_GETREGSET, tid, reinterpret_cast<void*>(set), &iov) != 0) {
  576. + PLOG_IF(ERROR, can_log) << "ptrace";
  577. + return false;
  578. + }
  579. + if (iov.iov_len != sizeof(*dest)) {
  580. + LOG_IF(ERROR, can_log) << "Unexpected registers size";
  581. + return false;
  582. + }
  583. + return true;
  584. +}
  585. +
  586. +bool GetFloatingPointRegisters32(pid_t tid,
  587. + FloatContext* context,
  588. + bool can_log) {
  589. + return false;
  590. +}
  591. +
  592. +bool GetFloatingPointRegisters64(pid_t tid,
  593. + FloatContext* context,
  594. + bool can_log) {
  595. + return GetRegisterSet(tid, NT_PRFPREG, &context->f64.f, can_log);
  596. +}
  597. +
  598. +bool GetThreadArea32(pid_t tid,
  599. + const ThreadContext& context,
  600. + LinuxVMAddress* address,
  601. + bool can_log) {
  602. + return false;
  603. +}
  604. +
  605. +bool GetThreadArea64(pid_t tid,
  606. + const ThreadContext& context,
  607. + LinuxVMAddress* address,
  608. + bool can_log) {
  609. + *address = context.t64.tp;
  610. + return true;
  611. +}
  612. #else
  613. #error Port.
  614. diff --git a/third_party/crashpad/crashpad/util/linux/thread_info.h b/third_party/crashpad/crashpad/util/linux/thread_info.h
  615. index d3f3b2c6953fa..6a649dc3d7ac7 100644
  616. --- a/third_party/crashpad/crashpad/util/linux/thread_info.h
  617. +++ b/third_party/crashpad/crashpad/util/linux/thread_info.h
  618. @@ -79,6 +79,40 @@ union ThreadContext {
  619. uint32_t cp0_status;
  620. uint32_t cp0_cause;
  621. uint32_t padding1_;
  622. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  623. + // Reflects user_regs_struct in asm/ptrace.h.
  624. + uint32_t pc;
  625. + uint32_t ra;
  626. + uint32_t sp;
  627. + uint32_t gp;
  628. + uint32_t tp;
  629. + uint32_t t0;
  630. + uint32_t t1;
  631. + uint32_t t2;
  632. + uint32_t s0;
  633. + uint32_t s1;
  634. + uint32_t a0;
  635. + uint32_t a1;
  636. + uint32_t a2;
  637. + uint32_t a3;
  638. + uint32_t a4;
  639. + uint32_t a5;
  640. + uint32_t a6;
  641. + uint32_t a7;
  642. + uint32_t s2;
  643. + uint32_t s3;
  644. + uint32_t s4;
  645. + uint32_t s5;
  646. + uint32_t s6;
  647. + uint32_t s7;
  648. + uint32_t s8;
  649. + uint32_t s9;
  650. + uint32_t s10;
  651. + uint32_t s11;
  652. + uint32_t t3;
  653. + uint32_t t4;
  654. + uint32_t t5;
  655. + uint32_t t6;
  656. #else
  657. #error Port.
  658. #endif // ARCH_CPU_X86_FAMILY
  659. @@ -132,6 +166,40 @@ union ThreadContext {
  660. uint64_t cp0_badvaddr;
  661. uint64_t cp0_status;
  662. uint64_t cp0_cause;
  663. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  664. + // Reflects user_regs_struct in asm/ptrace.h.
  665. + uint64_t pc;
  666. + uint64_t ra;
  667. + uint64_t sp;
  668. + uint64_t gp;
  669. + uint64_t tp;
  670. + uint64_t t0;
  671. + uint64_t t1;
  672. + uint64_t t2;
  673. + uint64_t s0;
  674. + uint64_t s1;
  675. + uint64_t a0;
  676. + uint64_t a1;
  677. + uint64_t a2;
  678. + uint64_t a3;
  679. + uint64_t a4;
  680. + uint64_t a5;
  681. + uint64_t a6;
  682. + uint64_t a7;
  683. + uint64_t s2;
  684. + uint64_t s3;
  685. + uint64_t s4;
  686. + uint64_t s5;
  687. + uint64_t s6;
  688. + uint64_t s7;
  689. + uint64_t s8;
  690. + uint64_t s9;
  691. + uint64_t s10;
  692. + uint64_t s11;
  693. + uint64_t t3;
  694. + uint64_t t4;
  695. + uint64_t t5;
  696. + uint64_t t6;
  697. #else
  698. #error Port.
  699. #endif // ARCH_CPU_X86_FAMILY
  700. @@ -143,11 +211,12 @@ union ThreadContext {
  701. using NativeThreadContext = user_regs;
  702. #elif defined(ARCH_CPU_MIPS_FAMILY)
  703. // No appropriate NativeThreadsContext type available for MIPS
  704. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  705. #else
  706. #error Port.
  707. #endif // ARCH_CPU_X86_FAMILY || ARCH_CPU_ARM64
  708. -#if !defined(ARCH_CPU_MIPS_FAMILY)
  709. +#if !defined(ARCH_CPU_MIPS_FAMILY) && !defined(ARCH_CPU_RISCV_FAMILY)
  710. #if defined(ARCH_CPU_32_BITS)
  711. static_assert(sizeof(t32_t) == sizeof(NativeThreadContext), "Size mismatch");
  712. #else // ARCH_CPU_64_BITS
  713. @@ -218,6 +287,9 @@ union FloatContext {
  714. } fpregs[32];
  715. uint32_t fpcsr;
  716. uint32_t fpu_id;
  717. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  718. + uint64_t f[32];
  719. + uint32_t fcsr;
  720. #else
  721. #error Port.
  722. #endif // ARCH_CPU_X86_FAMILY
  723. @@ -252,6 +324,9 @@ union FloatContext {
  724. double fpregs[32];
  725. uint32_t fpcsr;
  726. uint32_t fpu_id;
  727. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  728. + uint64_t f[32];
  729. + uint32_t fcsr;
  730. #else
  731. #error Port.
  732. #endif // ARCH_CPU_X86_FAMILY
  733. @@ -281,6 +356,7 @@ union FloatContext {
  734. static_assert(sizeof(f64) == sizeof(user_fpsimd_struct), "Size mismatch");
  735. #elif defined(ARCH_CPU_MIPS_FAMILY)
  736. // No appropriate floating point context native type for available MIPS.
  737. +#elif defined(ARCH_CPU_RISCV_FAMILY)
  738. #else
  739. #error Port.
  740. #endif // ARCH_CPU_X86
  741. diff --git a/third_party/crashpad/crashpad/util/net/http_transport_libcurl.cc b/third_party/crashpad/crashpad/util/net/http_transport_libcurl.cc
  742. index 7e3f41186f462..9568dc2e24f97 100644
  743. --- a/third_party/crashpad/crashpad/util/net/http_transport_libcurl.cc
  744. +++ b/third_party/crashpad/crashpad/util/net/http_transport_libcurl.cc
  745. @@ -237,6 +237,8 @@ std::string UserAgent() {
  746. #elif defined(ARCH_CPU_BIG_ENDIAN)
  747. static constexpr char arch[] = "aarch64_be";
  748. #endif
  749. +#elif defined(ARCH_CPU_RISCV64)
  750. + static constexpr char arch[] = "riscv64";
  751. #else
  752. #error Port
  753. #endif