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@@ -1,773 +0,0 @@
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-diff --git a/third_party/crashpad/crashpad/minidump/minidump_context.h b/third_party/crashpad/crashpad/minidump/minidump_context.h
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-index 3a3e603cb0d2d..cf074d2b8236b 100644
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---- a/third_party/crashpad/crashpad/minidump/minidump_context.h
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-+++ b/third_party/crashpad/crashpad/minidump/minidump_context.h
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-@@ -592,6 +592,41 @@ struct MinidumpContextMIPS64 {
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- uint64_t fir;
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- };
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-
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-+//! \brief 64bit RISC-V-specifc flags for MinidumpContextRISCV64::context_flags.
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-+//! Based on minidump_cpu_riscv64.h from breakpad
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-+enum MinidumpContextRISCV64Flags : uint32_t {
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-+ //! \brief Identifies the context structure as RISCV64.
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-+ kMinidumpContextRISCV64 = 0x00080000,
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-+
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-+ //! \brief Indicates the validity of integer registers.
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-+ //!
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-+ //! Registers `x1`-`x31` and pc are valid.
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-+ kMinidumpContextRISCV64Integer = kMinidumpContextRISCV64 | 0x00000002,
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-+
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-+ //! \brief Indicates the validity of floating point registers.
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-+ //!
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-+ //! Floating point registers `f0`-`f31`, and `fcsr` are valid
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-+ kMinidumpContextRISCV64FloatingPoint = kMinidumpContextRISCV64 | 0x00000004,
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-+
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-+ //! \brief Indicates the validity of all registers.
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-+ kMinidumpContextRISCV64All = kMinidumpContextRISCV64Integer |
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-+ kMinidumpContextRISCV64FloatingPoint,
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-+};
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-+
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-+//! \brief A 64bit RISCV CPU context (register state) carried in a minidump file.
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-+struct MinidumpContextRISCV64 {
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-+ uint64_t context_flags;
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-+
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-+ //! \brief General purpose registers.
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-+ uint64_t regs[32];
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-+
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-+ //! \brief FPU registers.
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-+ uint64_t fpregs[32];
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-+
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-+ //! \brief FPU status register.
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-+ uint64_t fcsr;
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-+};
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-+
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- } // namespace crashpad
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-
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- #endif // CRASHPAD_MINIDUMP_MINIDUMP_CONTEXT_H_
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-diff --git a/third_party/crashpad/crashpad/minidump/minidump_context_writer.cc b/third_party/crashpad/crashpad/minidump/minidump_context_writer.cc
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-index 2f2d90ba47071..ad26739432f51 100644
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---- a/third_party/crashpad/crashpad/minidump/minidump_context_writer.cc
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-+++ b/third_party/crashpad/crashpad/minidump/minidump_context_writer.cc
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-@@ -102,6 +102,13 @@ MinidumpContextWriter::CreateFromSnapshot(const CPUContext* context_snapshot) {
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- break;
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- }
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-
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-+ case kCPUArchitectureRISCV64: {
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-+ context = std::make_unique<MinidumpContextRISCV64Writer>();
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-+ reinterpret_cast<MinidumpContextRISCV64Writer*>(context.get())
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-+ ->InitializeFromSnapshot(context_snapshot->riscv64);
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-+ break;
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-+ }
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-+
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- default: {
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- LOG(ERROR) << "unknown context architecture "
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- << context_snapshot->architecture;
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-@@ -454,4 +461,41 @@ size_t MinidumpContextMIPS64Writer::ContextSize() const {
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- return sizeof(context_);
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- }
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-
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-+MinidumpContextRISCV64Writer::MinidumpContextRISCV64Writer()
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-+ : MinidumpContextWriter(), context_() {
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-+ context_.context_flags = kMinidumpContextRISCV64;
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-+}
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-+
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-+MinidumpContextRISCV64Writer::~MinidumpContextRISCV64Writer() = default;
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-+
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-+void MinidumpContextRISCV64Writer::InitializeFromSnapshot(
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-+ const CPUContextRISCV64* context_snapshot) {
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-+ DCHECK_EQ(state(), kStateMutable);
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-+ DCHECK_EQ(context_.context_flags, kMinidumpContextRISCV64);
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-+
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-+ context_.context_flags = kMinidumpContextRISCV64All;
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-+
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-+ static_assert(sizeof(context_.regs) == sizeof(context_snapshot->regs),
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-+ "GPRs size mismatch");
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-+ memcpy(context_.regs, context_snapshot->regs, sizeof(context_.regs));
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-+
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-+ static_assert(sizeof(context_.fpregs) == sizeof(context_snapshot->fpregs),
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-+ "FPRs size mismatch");
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-+ memcpy(context_.fpregs,
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-+ context_snapshot->fpregs,
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-+ sizeof(context_.fpregs));
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-+ context_.fcsr = context_snapshot->fcsr;
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-+}
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-+
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-+bool MinidumpContextRISCV64Writer::WriteObject(
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-+ FileWriterInterface* file_writer) {
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-+ DCHECK_EQ(state(), kStateWritable);
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-+ return file_writer->Write(&context_, sizeof(context_));
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-+}
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-+
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-+size_t MinidumpContextRISCV64Writer::ContextSize() const {
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-+ DCHECK_GE(state(), kStateFrozen);
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-+ return sizeof(context_);
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-+}
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-+
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- } // namespace crashpad
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-diff --git a/third_party/crashpad/crashpad/minidump/minidump_context_writer.h b/third_party/crashpad/crashpad/minidump/minidump_context_writer.h
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-index 80b312b23c2a4..278830085c162 100644
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---- a/third_party/crashpad/crashpad/minidump/minidump_context_writer.h
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-+++ b/third_party/crashpad/crashpad/minidump/minidump_context_writer.h
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-@@ -330,6 +330,47 @@ class MinidumpContextMIPS64Writer final : public MinidumpContextWriter {
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- MinidumpContextMIPS64 context_;
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- };
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-
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-+//! \brief The writer for a MinidumpContextRISCV64 structure in a minidump file.
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-+class MinidumpContextRISCV64Writer final : public MinidumpContextWriter {
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-+ public:
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-+ MinidumpContextRISCV64Writer();
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-+ ~MinidumpContextRISCV64Writer() override;
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-+
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-+ MinidumpContextRISCV64Writer(const MinidumpContextRISCV64Writer&) = delete;
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-+ void operator=(const MinidumpContextRISCV64Writer&) = delete;
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-+
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-+ //! \brief Initializes the MinidumpContextRISCV based on \a context_snapshot.
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-+ //!
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-+ //! \param[in] context_snapshot The context snapshot to use as source data.
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-+ //!
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-+ //! \note Valid in #kStateMutable. No mutation of context() may be done before
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-+ //! calling this method, and it is not normally necessary to alter
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-+ //! context() after calling this method.
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-+ void InitializeFromSnapshot(const CPUContextRISCV64* context_snapshot);
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-+
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-+ //! \brief Returns a pointer to the context structure that this object will
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-+ //! write.
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-+ //!
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-+ //! \attention This returns a non-`const` pointer to this object’s private
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-+ //! data so that a caller can populate the context structure directly.
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-+ //! This is done because providing setter interfaces to each field in the
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-+ //! context structure would be unwieldy and cumbersome. Care must be taken
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-+ //! to populate the context structure correctly. The context structure
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-+ //! must only be modified while this object is in the #kStateMutable
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-+ //! state.
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-+ MinidumpContextRISCV64* context() { return &context_; }
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-+
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-+ protected:
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-+ // MinidumpWritable:
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-+ bool WriteObject(FileWriterInterface* file_writer) override;
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-+
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-+ // MinidumpContextWriter:
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-+ size_t ContextSize() const override;
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-+
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-+ private:
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-+ MinidumpContextRISCV64 context_;
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-+};
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-+
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- } // namespace crashpad
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-
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- #endif // CRASHPAD_MINIDUMP_MINIDUMP_CONTEXT_WRITER_H_
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-diff --git a/third_party/crashpad/crashpad/minidump/minidump_misc_info_writer.cc b/third_party/crashpad/crashpad/minidump/minidump_misc_info_writer.cc
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-index 78847c11970e5..b2a1486dfbbf0 100644
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---- a/third_party/crashpad/crashpad/minidump/minidump_misc_info_writer.cc
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-+++ b/third_party/crashpad/crashpad/minidump/minidump_misc_info_writer.cc
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-@@ -135,6 +135,10 @@ std::string MinidumpMiscInfoDebugBuildString() {
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- static constexpr char kCPU[] = "mips";
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- #elif defined(ARCH_CPU_MIPS64EL)
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- static constexpr char kCPU[] = "mips64";
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-+#elif defined(ARCH_CPU_RISCV)
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-+ static constexpr char kCPU[] = "riscv";
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-+#elif defined(ARCH_CPU_RISCV64)
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-+ static constexpr char kCPU[] = "riscv64";
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- #else
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- #error define kCPU for this CPU
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- #endif
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-diff --git a/third_party/crashpad/crashpad/snapshot/capture_memory.cc b/third_party/crashpad/crashpad/snapshot/capture_memory.cc
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-index 06d92581330bf..a8b52d11b9b53 100644
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---- a/third_party/crashpad/crashpad/snapshot/capture_memory.cc
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-+++ b/third_party/crashpad/crashpad/snapshot/capture_memory.cc
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-@@ -112,6 +112,16 @@ void CaptureMemory::PointedToByContext(const CPUContext& context,
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- for (size_t i = 0; i < std::size(context.mipsel->regs); ++i) {
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- MaybeCaptureMemoryAround(delegate, context.mipsel->regs[i]);
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- }
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-+#elif defined(ARCH_CPU_RISCV_FAMILY)
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-+ if (context.architecture == kCPUArchitectureRISCV) {
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-+ for (size_t i = 0; i < base::size(context.riscv->regs); ++i) {
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-+ MaybeCaptureMemoryAround(delegate, context.riscv->regs[i]);
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-+ }
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-+ } else {
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-+ for (size_t i = 0; i < base::size(context.riscv64->regs); ++i) {
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-+ MaybeCaptureMemoryAround(delegate, context.riscv64->regs[i]);
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-+ }
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-+ }
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- #else
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- #error Port.
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- #endif
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-diff --git a/third_party/crashpad/crashpad/snapshot/cpu_architecture.h b/third_party/crashpad/crashpad/snapshot/cpu_architecture.h
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-index 811a7209587d2..5b09abdb96761 100644
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---- a/third_party/crashpad/crashpad/snapshot/cpu_architecture.h
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-+++ b/third_party/crashpad/crashpad/snapshot/cpu_architecture.h
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-@@ -43,7 +43,13 @@ enum CPUArchitecture {
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- kCPUArchitectureMIPSEL,
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-
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- //! \brief 64-bit MIPSEL.
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-- kCPUArchitectureMIPS64EL
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-+ kCPUArchitectureMIPS64EL,
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-+
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-+ //! \brief 32-bit RISCV.
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-+ kCPUArchitectureRISCV,
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-+
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-+ //! \brief 64-bit RISCV.
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-+ kCPUArchitectureRISCV64
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- };
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-
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- } // namespace crashpad
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-diff --git a/third_party/crashpad/crashpad/snapshot/cpu_context.cc b/third_party/crashpad/crashpad/snapshot/cpu_context.cc
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-index 2e29f70398c9f..e2f8097e2cae1 100644
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---- a/third_party/crashpad/crashpad/snapshot/cpu_context.cc
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-+++ b/third_party/crashpad/crashpad/snapshot/cpu_context.cc
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-@@ -197,10 +197,12 @@ bool CPUContext::Is64Bit() const {
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- case kCPUArchitectureX86_64:
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- case kCPUArchitectureARM64:
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- case kCPUArchitectureMIPS64EL:
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-+ case kCPUArchitectureRISCV64:
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- return true;
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- case kCPUArchitectureX86:
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- case kCPUArchitectureARM:
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- case kCPUArchitectureMIPSEL:
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-+ case kCPUArchitectureRISCV:
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- return false;
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- default:
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- NOTREACHED();
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-diff --git a/third_party/crashpad/crashpad/snapshot/cpu_context.h b/third_party/crashpad/crashpad/snapshot/cpu_context.h
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-index fb23c4679f0af..e120a980448d6 100644
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---- a/third_party/crashpad/crashpad/snapshot/cpu_context.h
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-+++ b/third_party/crashpad/crashpad/snapshot/cpu_context.h
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-@@ -352,6 +352,20 @@ struct CPUContextMIPS64 {
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- uint64_t fir;
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- };
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-
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-+//! \brief A context structure carrying RISC CPU state.
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-+struct CPUContextRISCV {
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-+ uint32_t regs[32];
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-+ uint64_t fpregs[32];
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-+ uint32_t fcsr;
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-+};
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-+
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-+//! \brief A context structure carrying RISC64 CPU state.
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-+struct CPUContextRISCV64 {
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-+ uint64_t regs[32];
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-+ uint64_t fpregs[32];
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-+ uint32_t fcsr;
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-+};
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-+
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- //! \brief A context structure capable of carrying the context of any supported
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- //! CPU architecture.
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- struct CPUContext {
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-@@ -382,6 +396,8 @@ struct CPUContext {
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- CPUContextARM64* arm64;
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- CPUContextMIPS* mipsel;
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- CPUContextMIPS64* mips64;
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-+ CPUContextRISCV* riscv;
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-+ CPUContextRISCV64* riscv64;
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- };
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- };
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-
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-diff --git a/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.cc b/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.cc
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-index 8464a5a27b2dc..ec41216daa902 100644
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---- a/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.cc
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-+++ b/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.cc
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-@@ -266,6 +266,30 @@ void InitializeCPUContextARM64_OnlyFPSIMD(
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- context->fpcr = float_context.fpcr;
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- }
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-
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-+#elif defined(ARCH_CPU_RISCV_FAMILY)
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-+
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-+template <typename Traits>
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-+void InitializeCPUContextRISCV(
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-+ const typename Traits::SignalThreadContext& thread_context,
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-+ const typename Traits::SignalFloatContext& float_context,
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-+ typename Traits::CPUContext* context) {
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-+ static_assert(sizeof(context->regs) == sizeof(thread_context),
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-+ "registers size mismatch");
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-+ static_assert(sizeof(context->fpregs) == sizeof(float_context.f),
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-+ "fp registers size mismatch");
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-+ memcpy(&context->regs, &thread_context, sizeof(context->regs));
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-+ memcpy(&context->fpregs, &float_context, sizeof(context->fpregs));
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-+ context->fcsr = float_context.fcsr;
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-+}
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-+template void InitializeCPUContextRISCV<ContextTraits32>(
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-+ const ContextTraits32::SignalThreadContext& thread_context,
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-+ const ContextTraits32::SignalFloatContext& float_context,
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-+ ContextTraits32::CPUContext* context);
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-+template void InitializeCPUContextRISCV<ContextTraits64>(
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-+ const ContextTraits64::SignalThreadContext& thread_context,
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-+ const ContextTraits64::SignalFloatContext& float_context,
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-+ ContextTraits64::CPUContext* context);
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-+
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- #endif // ARCH_CPU_X86_FAMILY
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-
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- } // namespace internal
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-diff --git a/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.h b/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.h
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-index 9f46a48977e12..1add07f81af88 100644
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---- a/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.h
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-+++ b/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.h
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-@@ -174,6 +174,22 @@ void InitializeCPUContextMIPS(
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-
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- #endif // ARCH_CPU_MIPS_FAMILY || DOXYGEN
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-
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-+#if defined(ARCH_CPU_RISCV_FAMILY) || DOXYGEN
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-+
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-+//! \brief Initializes a CPUContextRISCV structure from native context
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-+//! structures on Linux.
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-+//!
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-+//! \param[in] thread_context The native thread context.
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-+//! \param[in] float_context The native float context.
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-+//! \param[out] context The CPUContextRISCV structure to initialize.
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-+template <typename Traits>
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-+void InitializeCPUContextRISCV(
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-+ const typename Traits::SignalThreadContext& thread_context,
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-+ const typename Traits::SignalFloatContext& float_context,
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-+ typename Traits::CPUContext* context);
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-+
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-+#endif // ARCH_CPU_RISCV_FAMILY || DOXYGEN
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-+
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- } // namespace internal
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- } // namespace crashpad
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-
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-diff --git a/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.cc b/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.cc
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-index efc9e5694ea8b..3d57d96756208 100644
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---- a/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.cc
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-+++ b/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.cc
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-@@ -325,6 +325,61 @@ bool ExceptionSnapshotLinux::ReadContext<ContextTraits64>(
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- reader, context_address, context_.mips64);
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- }
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-
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-+#elif defined(ARCH_CPU_RISCV_FAMILY)
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-+
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-+template <typename Traits>
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-+static bool ReadContext(ProcessReaderLinux* reader,
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-+ LinuxVMAddress context_address,
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-+ typename Traits::CPUContext* dest_context) {
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-+ const ProcessMemory* memory = reader->Memory();
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-+
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-+ LinuxVMAddress gregs_address = context_address +
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-+ offsetof(UContext<Traits>, mcontext) +
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-+ offsetof(typename Traits::MContext, gregs);
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-+
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-+ typename Traits::SignalThreadContext thread_context;
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-+ if (!memory->Read(gregs_address, sizeof(thread_context), &thread_context)) {
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-+ LOG(ERROR) << "Couldn't read gregs";
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-+ return false;
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-+ }
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-+
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-+ LinuxVMAddress fpregs_address = context_address +
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-+ offsetof(UContext<Traits>, mcontext) +
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-+ offsetof(typename Traits::MContext, fpregs);
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-+
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-+ typename Traits::SignalFloatContext fp_context;
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-+ if (!memory->Read(fpregs_address, sizeof(fp_context), &fp_context)) {
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-+ LOG(ERROR) << "Couldn't read fpregs";
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-+ return false;
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-+ }
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-+
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-+ InitializeCPUContextRISCV<Traits>(thread_context, fp_context, dest_context);
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-+
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-+ return true;
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-+}
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-+
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-+template <>
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-+bool ExceptionSnapshotLinux::ReadContext<ContextTraits32>(
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-+ ProcessReaderLinux* reader,
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-+ LinuxVMAddress context_address) {
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-+ context_.architecture = kCPUArchitectureRISCV;
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-+ context_.riscv = &context_union_.riscv;
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-+
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-+ return internal::ReadContext<ContextTraits32>(
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-+ reader, context_address, context_.riscv);
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-+}
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-+
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-+template <>
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-+bool ExceptionSnapshotLinux::ReadContext<ContextTraits64>(
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-+ ProcessReaderLinux* reader,
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-+ LinuxVMAddress context_address) {
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-+ context_.architecture = kCPUArchitectureRISCV64;
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-+ context_.riscv64 = &context_union_.riscv64;
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-+
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-+ return internal::ReadContext<ContextTraits64>(
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-+ reader, context_address, context_.riscv64);
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-+}
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-+
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- #endif // ARCH_CPU_X86_FAMILY
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-
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- bool ExceptionSnapshotLinux::Initialize(
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-diff --git a/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.h b/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.h
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-index 05f6004e11d1e..0520af4ce9019 100644
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---- a/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.h
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-+++ b/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.h
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-@@ -89,6 +89,9 @@ class ExceptionSnapshotLinux final : public ExceptionSnapshot {
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- #elif defined(ARCH_CPU_MIPS_FAMILY)
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- CPUContextMIPS mipsel;
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- CPUContextMIPS64 mips64;
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-+#elif defined(ARCH_CPU_RISCV_FAMILY)
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-+ CPUContextRISCV riscv;
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-+ CPUContextRISCV64 riscv64;
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- #endif
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- } context_union_;
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- CPUContext context_;
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-diff --git a/third_party/crashpad/crashpad/snapshot/linux/process_reader_linux.cc b/third_party/crashpad/crashpad/snapshot/linux/process_reader_linux.cc
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-index 5711f343a46c4..abbb1662c3e0a 100644
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---- a/third_party/crashpad/crashpad/snapshot/linux/process_reader_linux.cc
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-+++ b/third_party/crashpad/crashpad/snapshot/linux/process_reader_linux.cc
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-@@ -108,6 +108,9 @@ void ProcessReaderLinux::Thread::InitializeStack(ProcessReaderLinux* reader) {
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- #elif defined(ARCH_CPU_MIPS_FAMILY)
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- stack_pointer = reader->Is64Bit() ? thread_info.thread_context.t64.regs[29]
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- : thread_info.thread_context.t32.regs[29];
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-+#elif defined(ARCH_CPU_RISCV_FAMILY)
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-+ stack_pointer = reader->Is64Bit() ? thread_info.thread_context.t64.sp
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-+ : thread_info.thread_context.t32.sp;
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- #else
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- #error Port.
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- #endif
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-diff --git a/third_party/crashpad/crashpad/snapshot/linux/signal_context.h b/third_party/crashpad/crashpad/snapshot/linux/signal_context.h
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-index c004f8f6dfab6..6aa9ee38f5b04 100644
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---- a/third_party/crashpad/crashpad/snapshot/linux/signal_context.h
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-+++ b/third_party/crashpad/crashpad/snapshot/linux/signal_context.h
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-@@ -422,6 +422,67 @@ static_assert(offsetof(UContext<ContextTraits64>, mcontext.fpregs) ==
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- "context offset mismatch");
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- #endif
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-
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-+#elif defined(ARCH_CPU_RISCV_FAMILY)
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-+
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-+struct MContext32 {
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-+ uint32_t gregs[32];
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-+ uint64_t fpregs[32];
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-+ unsigned int fcsr;
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-+};
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-+
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-+struct MContext64 {
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-+ uint64_t gregs[32];
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-+ uint64_t fpregs[32];
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-+ unsigned int fcsr;
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-+};
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-+
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-+struct ContextTraits32 : public Traits32 {
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-+ using MContext = MContext32;
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-+ using SignalThreadContext = ThreadContext::t32_t;
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-+ using SignalFloatContext = FloatContext::f32_t;
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-+ using CPUContext = CPUContextRISCV;
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-+};
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-+
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-+struct ContextTraits64 : public Traits64 {
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-+ using MContext = MContext64;
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-+ using SignalThreadContext = ThreadContext::t64_t;
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-+ using SignalFloatContext = FloatContext::f64_t;
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-+ using CPUContext = CPUContextRISCV64;
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-+};
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-+
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-+template <typename Traits>
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-+struct UContext {
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-+ typename Traits::ULong flags;
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-+ typename Traits::Address link;
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-+ SignalStack<Traits> stack;
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-+ Sigset<Traits> sigmask;
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-+ char padding[128 - sizeof(sigmask)];
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-+ typename Traits::Char_64Only padding2[8];
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-+ typename Traits::MContext mcontext;
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-+};
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-+
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-+#if defined(ARCH_CPU_RISCV)
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-+static_assert(offsetof(UContext<ContextTraits32>, mcontext) ==
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-+ offsetof(ucontext_t, uc_mcontext),
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-+ "context offset mismatch");
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-+static_assert(offsetof(UContext<ContextTraits32>, mcontext.gregs) ==
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-+ offsetof(ucontext_t, uc_mcontext.__gregs),
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-+ "context offset mismatch");
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-+static_assert(offsetof(UContext<ContextTraits32>, mcontext.fpregs) ==
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-+ offsetof(ucontext_t, uc_mcontext.__fpregs),
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-+ "context offset mismatch");
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-+#elif defined(ARCH_CPU_RISCV64)
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-+static_assert(offsetof(UContext<ContextTraits64>, mcontext) ==
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-+ offsetof(ucontext_t, uc_mcontext),
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-+ "context offset mismatch");
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-+static_assert(offsetof(UContext<ContextTraits64>, mcontext.gregs) ==
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-+ offsetof(ucontext_t, uc_mcontext.__gregs),
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-+ "context offset mismatch");
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-+static_assert(offsetof(UContext<ContextTraits64>, mcontext.fpregs) ==
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-+ offsetof(ucontext_t, uc_mcontext.__fpregs),
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-+ "context offset mismatch");
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-+#endif
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-+
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- #else
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- #error Port.
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- #endif // ARCH_CPU_X86_FAMILY
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-diff --git a/third_party/crashpad/crashpad/snapshot/linux/system_snapshot_linux.cc b/third_party/crashpad/crashpad/snapshot/linux/system_snapshot_linux.cc
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-index e77bcafa9c6b5..55564ae4aeaf5 100644
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---- a/third_party/crashpad/crashpad/snapshot/linux/system_snapshot_linux.cc
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-+++ b/third_party/crashpad/crashpad/snapshot/linux/system_snapshot_linux.cc
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-@@ -205,6 +205,9 @@ CPUArchitecture SystemSnapshotLinux::GetCPUArchitecture() const {
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- #elif defined(ARCH_CPU_MIPS_FAMILY)
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- return process_reader_->Is64Bit() ? kCPUArchitectureMIPS64EL
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- : kCPUArchitectureMIPSEL;
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-+#elif defined(ARCH_CPU_RISCV_FAMILY)
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-+ return process_reader_->Is64Bit() ? kCPUArchitectureRISCV64
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-+ : kCPUArchitectureRISCV;
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- #else
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- #error port to your architecture
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- #endif
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-@@ -220,6 +223,9 @@ uint32_t SystemSnapshotLinux::CPURevision() const {
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- #elif defined(ARCH_CPU_MIPS_FAMILY)
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- // Not implementable on MIPS
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- return 0;
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-+#elif defined(ARCH_CPU_RISCV_FAMILY)
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-+ // Not implementable on RISCV
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-+ return 0;
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- #else
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- #error port to your architecture
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- #endif
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-@@ -240,6 +246,9 @@ std::string SystemSnapshotLinux::CPUVendor() const {
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- #elif defined(ARCH_CPU_MIPS_FAMILY)
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- // Not implementable on MIPS
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- return std::string();
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-+#elif defined(ARCH_CPU_RISCV_FAMILY)
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-+ // Not implementable on RISCV
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-+ return std::string();
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- #else
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- #error port to your architecture
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- #endif
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-@@ -373,6 +382,9 @@ bool SystemSnapshotLinux::NXEnabled() const {
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- #elif defined(ARCH_CPU_MIPS_FAMILY)
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- // Not implementable on MIPS
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- return false;
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-+#elif defined(ARCH_CPU_RISCV_FAMILY)
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-+ // Not implementable on RISCV
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-+ return false;
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- #else
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- #error Port.
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- #endif // ARCH_CPU_X86_FAMILY
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-diff --git a/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.cc b/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.cc
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-index f279e0adaddba..8c133a7ca909f 100644
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---- a/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.cc
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-+++ b/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.cc
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-@@ -189,6 +189,22 @@ bool ThreadSnapshotLinux::Initialize(
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- thread.thread_info.float_context.f32,
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- context_.mipsel);
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- }
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-+#elif defined(ARCH_CPU_RISCV_FAMILY)
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-+ if (process_reader->Is64Bit()) {
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-+ context_.architecture = kCPUArchitectureRISCV64;
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-+ context_.riscv64 = &context_union_.riscv64;
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-+ InitializeCPUContextRISCV<ContextTraits64>(
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-+ thread.thread_info.thread_context.t64,
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-+ thread.thread_info.float_context.f64,
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-+ context_.riscv64);
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-+ } else {
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-+ context_.architecture = kCPUArchitectureRISCV;
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-+ context_.riscv = &context_union_.riscv;
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-+ InitializeCPUContextRISCV<ContextTraits32>(
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-+ thread.thread_info.thread_context.t32,
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-+ thread.thread_info.float_context.f32,
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-+ context_.riscv);
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-+ }
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- #else
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- #error Port.
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- #endif
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-diff --git a/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.h b/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.h
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-index 40cd7e7f54a39..aea1ce2047a6b 100644
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---- a/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.h
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-+++ b/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.h
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-@@ -73,6 +73,9 @@ class ThreadSnapshotLinux final : public ThreadSnapshot {
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- #elif defined(ARCH_CPU_MIPS_FAMILY)
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- CPUContextMIPS mipsel;
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- CPUContextMIPS64 mips64;
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-+#elif defined(ARCH_CPU_RISCV_FAMILY)
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-+ CPUContextRISCV riscv;
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-+ CPUContextRISCV64 riscv64;
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- #else
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- #error Port.
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- #endif // ARCH_CPU_X86_FAMILY
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-diff --git a/third_party/crashpad/crashpad/util/linux/ptracer.cc b/third_party/crashpad/crashpad/util/linux/ptracer.cc
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-index 557e0d3635752..d74dbc1ba1688 100644
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---- a/third_party/crashpad/crashpad/util/linux/ptracer.cc
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-+++ b/third_party/crashpad/crashpad/util/linux/ptracer.cc
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-@@ -397,6 +397,50 @@ bool GetThreadArea64(pid_t tid,
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- *address = FromPointerCast<LinuxVMAddress>(result);
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- return true;
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- }
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|
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-+#elif defined(ARCH_CPU_RISCV_FAMILY)
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-+
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-+template <typename Destination>
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-+bool GetRegisterSet(pid_t tid, int set, Destination* dest, bool can_log) {
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-+ iovec iov;
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-+ iov.iov_base = dest;
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-+ iov.iov_len = sizeof(*dest);
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-+ if (ptrace(PTRACE_GETREGSET, tid, reinterpret_cast<void*>(set), &iov) != 0) {
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-+ PLOG_IF(ERROR, can_log) << "ptrace";
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-+ return false;
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|
|
-+ }
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-+ if (iov.iov_len != sizeof(*dest)) {
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-+ LOG_IF(ERROR, can_log) << "Unexpected registers size";
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-+ return false;
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|
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-+ }
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-+ return true;
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|
|
-+}
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-+
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|
|
-+bool GetFloatingPointRegisters32(pid_t tid,
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|
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-+ FloatContext* context,
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-+ bool can_log) {
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-+ return false;
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|
|
-+}
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|
-+
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|
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-+bool GetFloatingPointRegisters64(pid_t tid,
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-+ FloatContext* context,
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-+ bool can_log) {
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-+ return GetRegisterSet(tid, NT_PRFPREG, &context->f64.f, can_log);
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|
|
-+}
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-+
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|
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-+bool GetThreadArea32(pid_t tid,
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|
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-+ const ThreadContext& context,
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|
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-+ LinuxVMAddress* address,
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-+ bool can_log) {
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|
-+ return false;
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|
|
-+}
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|
|
-+
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|
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-+bool GetThreadArea64(pid_t tid,
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|
|
-+ const ThreadContext& context,
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|
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-+ LinuxVMAddress* address,
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|
|
-+ bool can_log) {
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|
|
-+ *address = context.t64.tp;
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|
-+ return true;
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|
|
-+}
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|
|
-
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|
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- #else
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|
|
- #error Port.
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|
|
-diff --git a/third_party/crashpad/crashpad/util/linux/thread_info.h b/third_party/crashpad/crashpad/util/linux/thread_info.h
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-index d3f3b2c6953fa..6a649dc3d7ac7 100644
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---- a/third_party/crashpad/crashpad/util/linux/thread_info.h
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-+++ b/third_party/crashpad/crashpad/util/linux/thread_info.h
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|
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-@@ -79,6 +79,40 @@ union ThreadContext {
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|
|
- uint32_t cp0_status;
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|
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- uint32_t cp0_cause;
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|
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- uint32_t padding1_;
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|
|
-+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
|
|
-+ // Reflects user_regs_struct in asm/ptrace.h.
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-+ uint32_t pc;
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-+ uint32_t ra;
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-+ uint32_t sp;
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-+ uint32_t gp;
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|
-+ uint32_t tp;
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-+ uint32_t t0;
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-+ uint32_t t1;
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-+ uint32_t t2;
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|
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-+ uint32_t s0;
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|
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-+ uint32_t s1;
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|
-+ uint32_t a0;
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-+ uint32_t a1;
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-+ uint32_t a2;
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-+ uint32_t a3;
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-+ uint32_t a4;
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-+ uint32_t a5;
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|
-+ uint32_t a6;
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-+ uint32_t a7;
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|
|
-+ uint32_t s2;
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|
|
-+ uint32_t s3;
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|
|
-+ uint32_t s4;
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|
|
-+ uint32_t s5;
|
|
|
-+ uint32_t s6;
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|
|
-+ uint32_t s7;
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|
|
-+ uint32_t s8;
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|
|
-+ uint32_t s9;
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|
|
-+ uint32_t s10;
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|
|
-+ uint32_t s11;
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|
|
-+ uint32_t t3;
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|
|
-+ uint32_t t4;
|
|
|
-+ uint32_t t5;
|
|
|
-+ uint32_t t6;
|
|
|
- #else
|
|
|
- #error Port.
|
|
|
- #endif // ARCH_CPU_X86_FAMILY
|
|
|
-@@ -132,6 +166,40 @@ union ThreadContext {
|
|
|
- uint64_t cp0_badvaddr;
|
|
|
- uint64_t cp0_status;
|
|
|
- uint64_t cp0_cause;
|
|
|
-+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
|
|
-+ // Reflects user_regs_struct in asm/ptrace.h.
|
|
|
-+ uint64_t pc;
|
|
|
-+ uint64_t ra;
|
|
|
-+ uint64_t sp;
|
|
|
-+ uint64_t gp;
|
|
|
-+ uint64_t tp;
|
|
|
-+ uint64_t t0;
|
|
|
-+ uint64_t t1;
|
|
|
-+ uint64_t t2;
|
|
|
-+ uint64_t s0;
|
|
|
-+ uint64_t s1;
|
|
|
-+ uint64_t a0;
|
|
|
-+ uint64_t a1;
|
|
|
-+ uint64_t a2;
|
|
|
-+ uint64_t a3;
|
|
|
-+ uint64_t a4;
|
|
|
-+ uint64_t a5;
|
|
|
-+ uint64_t a6;
|
|
|
-+ uint64_t a7;
|
|
|
-+ uint64_t s2;
|
|
|
-+ uint64_t s3;
|
|
|
-+ uint64_t s4;
|
|
|
-+ uint64_t s5;
|
|
|
-+ uint64_t s6;
|
|
|
-+ uint64_t s7;
|
|
|
-+ uint64_t s8;
|
|
|
-+ uint64_t s9;
|
|
|
-+ uint64_t s10;
|
|
|
-+ uint64_t s11;
|
|
|
-+ uint64_t t3;
|
|
|
-+ uint64_t t4;
|
|
|
-+ uint64_t t5;
|
|
|
-+ uint64_t t6;
|
|
|
- #else
|
|
|
- #error Port.
|
|
|
- #endif // ARCH_CPU_X86_FAMILY
|
|
|
-@@ -143,11 +211,12 @@ union ThreadContext {
|
|
|
- using NativeThreadContext = user_regs;
|
|
|
- #elif defined(ARCH_CPU_MIPS_FAMILY)
|
|
|
- // No appropriate NativeThreadsContext type available for MIPS
|
|
|
-+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
|
|
- #else
|
|
|
- #error Port.
|
|
|
- #endif // ARCH_CPU_X86_FAMILY || ARCH_CPU_ARM64
|
|
|
-
|
|
|
--#if !defined(ARCH_CPU_MIPS_FAMILY)
|
|
|
-+#if !defined(ARCH_CPU_MIPS_FAMILY) && !defined(ARCH_CPU_RISCV_FAMILY)
|
|
|
- #if defined(ARCH_CPU_32_BITS)
|
|
|
- static_assert(sizeof(t32_t) == sizeof(NativeThreadContext), "Size mismatch");
|
|
|
- #else // ARCH_CPU_64_BITS
|
|
|
-@@ -218,6 +287,9 @@ union FloatContext {
|
|
|
- } fpregs[32];
|
|
|
- uint32_t fpcsr;
|
|
|
- uint32_t fpu_id;
|
|
|
-+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
|
|
-+ uint64_t f[32];
|
|
|
-+ uint32_t fcsr;
|
|
|
- #else
|
|
|
- #error Port.
|
|
|
- #endif // ARCH_CPU_X86_FAMILY
|
|
|
-@@ -252,6 +324,9 @@ union FloatContext {
|
|
|
- double fpregs[32];
|
|
|
- uint32_t fpcsr;
|
|
|
- uint32_t fpu_id;
|
|
|
-+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
|
|
-+ uint64_t f[32];
|
|
|
-+ uint32_t fcsr;
|
|
|
- #else
|
|
|
- #error Port.
|
|
|
- #endif // ARCH_CPU_X86_FAMILY
|
|
|
-@@ -281,6 +356,7 @@ union FloatContext {
|
|
|
- static_assert(sizeof(f64) == sizeof(user_fpsimd_struct), "Size mismatch");
|
|
|
- #elif defined(ARCH_CPU_MIPS_FAMILY)
|
|
|
- // No appropriate floating point context native type for available MIPS.
|
|
|
-+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
|
|
- #else
|
|
|
- #error Port.
|
|
|
- #endif // ARCH_CPU_X86
|
|
|
-diff --git a/third_party/crashpad/crashpad/util/net/http_transport_libcurl.cc b/third_party/crashpad/crashpad/util/net/http_transport_libcurl.cc
|
|
|
-index 7e3f41186f462..9568dc2e24f97 100644
|
|
|
---- a/third_party/crashpad/crashpad/util/net/http_transport_libcurl.cc
|
|
|
-+++ b/third_party/crashpad/crashpad/util/net/http_transport_libcurl.cc
|
|
|
-@@ -237,6 +237,8 @@ std::string UserAgent() {
|
|
|
- #elif defined(ARCH_CPU_BIG_ENDIAN)
|
|
|
- static constexpr char arch[] = "aarch64_be";
|
|
|
- #endif
|
|
|
-+#elif defined(ARCH_CPU_RISCV64)
|
|
|
-+ static constexpr char arch[] = "riscv64";
|
|
|
- #else
|
|
|
- #error Port
|
|
|
- #endif
|