Browse Source

rebase patchset to latest HEAD

Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
Rebecca Chang Swee Fun 2 years ago
parent
commit
13a88b9edb
28 changed files with 210 additions and 65 deletions
  1. 3 3
      0001-sandbox-add-riscv-arch-definition-and-define-syscall.patch
  2. 2 2
      0002-sandbox-linux-pass-fPIE-to-compiler.patch
  3. 2 2
      0003-skia-add-riscv64.patch
  4. 4 4
      0004-base-allocator-partition_allocator-add-riscv64-suppo.patch
  5. 10 9
      0005-base-process-add-riscv64-arch-definition.patch
  6. 2 2
      0006-remoting-fix-missing-cstring-header.patch
  7. 2 2
      0007-remoting-codec-fix-missing-cmath-header.patch
  8. 4 4
      0008-components-update_client-add-riscv64-arch-definition.patch
  9. 4 4
      0009-build-config-compiler-use_gold-linker-option.patch
  10. 8 8
      0010-build-config-compiler-remove-flags-not-available-in-.patch
  11. 2 2
      0011-build-config-add-atomic-build-flag.patch
  12. 4 4
      0012-build-config-compiler-set-generic-riscv64-flags.patch
  13. 2 2
      0013-chrome-common-remove-unrar-code.patch
  14. 2 2
      0014-third_party-libaom-add-riscv-target.patch
  15. 2 2
      0015-third_party-libvpx-add-riscv-target.patch
  16. 2 2
      0016-third_party-crashpad-add-support-for-riscv.patch
  17. 2 2
      0017-third_party-lzma_sdk-add-riscv-arch-definition.patch
  18. 2 2
      0018-build-linux-sysroot-create-a-sysroot-for-riscv.patch
  19. 29 0
      0019-workaround-for-files-not-found-in-sysroot.patch
  20. 27 0
      0020-v8-settings.patch
  21. 35 0
      0021-compiler-workaround.patch
  22. 1 1
      README.md
  23. 7 4
      third_party/0001-third-party-angle.patch
  24. 1 1
      third_party/0002-third-party-dawn.patch
  25. 1 1
      third_party/0008-third-party-boringssl-src.patch
  26. 19 0
      third_party/0011-third-party-highway-src.patch
  27. 17 0
      third_party/0012-third-party-perfetto.patch
  28. 14 0
      third_party/0013-third-party-skia.patch

+ 3 - 3
0001-sandbox-add-riscv-arch-definition-and-define-syscall.patch

@@ -1,7 +1,7 @@
-From 980d6f734be71176b619309ed76641846479927d Mon Sep 17 00:00:00 2001
+From 68ec2a3a6e740a8020fd39f3a81a943e982541d5 Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Wed, 30 Mar 2022 06:38:26 +0000
-Subject: [PATCH 01/18] sandbox: add riscv arch definition and define syscall
+Subject: [PATCH 01/21] sandbox: add riscv arch definition and define syscall
  header
 
 Credit to work contributed in Github.
@@ -113,7 +113,7 @@ index 961a8cf7521ee..7c9a0c99e8fbe 100644
  #error Unsupported target platform
  
 diff --git a/sandbox/linux/seccomp-bpf-helpers/baseline_policy.cc b/sandbox/linux/seccomp-bpf-helpers/baseline_policy.cc
-index 30c15cccb5c1f..06c6026a26fa2 100644
+index 90df076e15eb8..31d7b35349704 100644
 --- a/sandbox/linux/seccomp-bpf-helpers/baseline_policy.cc
 +++ b/sandbox/linux/seccomp-bpf-helpers/baseline_policy.cc
 @@ -60,6 +60,9 @@ bool IsBaselinePolicyAllowed(int sysno) {

+ 2 - 2
0002-sandbox-linux-pass-fPIE-to-compiler.patch

@@ -1,7 +1,7 @@
-From 906b510df263ee0e7a80cff465435d02874cad18 Mon Sep 17 00:00:00 2001
+From 93b4732471ac59684b2f84a9961ad60b07285819 Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Thu, 13 Jan 2022 03:50:24 +0000
-Subject: [PATCH 02/18] sandbox: linux: pass -fPIE to compiler
+Subject: [PATCH 02/21] sandbox: linux: pass -fPIE to compiler
 
 Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 ---

+ 2 - 2
0003-skia-add-riscv64.patch

@@ -1,7 +1,7 @@
-From dcb03e933a6e08edcd70ac63a07cd368ba9575d5 Mon Sep 17 00:00:00 2001
+From f8c7bce44def7e1816906dfada76ea5c5761cec3 Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Fri, 14 Jan 2022 01:04:19 +0000
-Subject: [PATCH 03/18] skia: add riscv64
+Subject: [PATCH 03/21] skia: add riscv64
 
 Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 ---

+ 4 - 4
0004-base-allocator-partition_allocator-add-riscv64-suppo.patch

@@ -1,7 +1,7 @@
-From a4939c0b3883152e6b092214d31560d2424bfa1a Mon Sep 17 00:00:00 2001
+From 72b3d5298c9870db7d3cb810f505e29832be5538 Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Tue, 5 Apr 2022 02:22:48 +0000
-Subject: [PATCH 04/18] base: allocator: partition_allocator: add riscv64
+Subject: [PATCH 04/21] base: allocator: partition_allocator: add riscv64
  support
 
 Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
@@ -12,10 +12,10 @@ Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
  create mode 100644 base/allocator/partition_allocator/starscan/stack/asm/riscv64/push_registers_asm.cc
 
 diff --git a/base/allocator/partition_allocator/BUILD.gn b/base/allocator/partition_allocator/BUILD.gn
-index 907f3435d5b2c..5747abb9383df 100644
+index ad6bcf15d92ff..01fdfe86b5fd8 100644
 --- a/base/allocator/partition_allocator/BUILD.gn
 +++ b/base/allocator/partition_allocator/BUILD.gn
-@@ -160,6 +160,9 @@ target(partition_alloc_target_type, "partition_alloc") {
+@@ -210,6 +210,9 @@ target(partition_alloc_target_type, "partition_alloc") {
    } else if (current_cpu == "arm64") {
      defines += [ "PA_PCSCAN_STACK_SUPPORTED" ]
      sources += [ "starscan/stack/asm/arm64/push_registers_asm.cc" ]

+ 10 - 9
0005-base-process-add-riscv64-arch-definition.patch

@@ -1,23 +1,24 @@
-From 5926c534338961fd9b431ca00bba3b0abd4f85ba Mon Sep 17 00:00:00 2001
+From a9f09015a24928b99eb5b574849a53b277781a71 Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
-Date: Wed, 30 Mar 2022 05:44:17 +0000
-Subject: [PATCH 05/18] base: process: add riscv64 arch definition
+Date: Tue, 10 May 2022 02:21:16 +0000
+Subject: [PATCH 05/21] base: process: add riscv64 arch definition
 
 Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 ---
- base/process/launch_posix.cc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
+ base/process/launch_posix.cc | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
 
 diff --git a/base/process/launch_posix.cc b/base/process/launch_posix.cc
-index 5130a0baa2c7d..add3ca595da80 100644
+index c5eb76eba5a7c..96df11f406f41 100644
 --- a/base/process/launch_posix.cc
 +++ b/base/process/launch_posix.cc
-@@ -707,7 +707,7 @@ NOINLINE pid_t CloneAndLongjmpInChild(unsigned long flags,
+@@ -706,7 +706,8 @@ NOINLINE pid_t CloneAndLongjmpInChild(unsigned long flags,
    alignas(16) char stack_buf[PTHREAD_STACK_MIN];
  #if defined(ARCH_CPU_X86_FAMILY) || defined(ARCH_CPU_ARM_FAMILY) ||   \
      defined(ARCH_CPU_MIPS_FAMILY) || defined(ARCH_CPU_S390_FAMILY) || \
--    defined(ARCH_CPU_PPC64_FAMILY)
-+    defined(ARCH_CPU_PPC64_FAMILY) || defined(ARCH_CPU_RISCV_FAMILY)
+-    defined(ARCH_CPU_PPC64_FAMILY) || defined(ARCH_CPU_LOONG_FAMILY)
++    defined(ARCH_CPU_PPC64_FAMILY) || defined(ARCH_CPU_LOONG_FAMILY) || \
++    defined(ARCH_CPU_RISCV_FAMILY)
    // The stack grows downward.
    void* stack = stack_buf + sizeof(stack_buf);
  #else

+ 2 - 2
0006-remoting-fix-missing-cstring-header.patch

@@ -1,7 +1,7 @@
-From af73ddaaeb31c115b77bf372095f611ff88e8b48 Mon Sep 17 00:00:00 2001
+From c021c89db7f17ee6f2592c61dec202603b88e639 Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Thu, 13 Jan 2022 09:44:47 +0000
-Subject: [PATCH 06/18] remoting: fix missing cstring header
+Subject: [PATCH 06/21] remoting: fix missing cstring header
 
 Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 ---

+ 2 - 2
0007-remoting-codec-fix-missing-cmath-header.patch

@@ -1,7 +1,7 @@
-From 7ac90a17331f7deb62c7f52988f400957ce29e64 Mon Sep 17 00:00:00 2001
+From aa99003ebb1dee8591410e35a1c8a898257c5262 Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Thu, 13 Jan 2022 09:48:12 +0000
-Subject: [PATCH 07/18] remoting: codec: fix missing cmath header
+Subject: [PATCH 07/21] remoting: codec: fix missing cmath header
 
 Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 ---

+ 4 - 4
0008-components-update_client-add-riscv64-arch-definition.patch

@@ -1,7 +1,7 @@
-From c9cd7b934cd2fe7583a9fa5e671559d99cfc3249 Mon Sep 17 00:00:00 2001
+From a2dbd291e3b85c394ce0644141a9e933ce25b85f Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Tue, 5 Apr 2022 02:27:27 +0000
-Subject: [PATCH 08/18] components: update_client: add riscv64 arch definition
+Subject: [PATCH 08/21] components: update_client: add riscv64 arch definition
 
 Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 ---
@@ -10,7 +10,7 @@ Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
  2 files changed, 5 insertions(+), 1 deletion(-)
 
 diff --git a/components/update_client/update_query_params.cc b/components/update_client/update_query_params.cc
-index a36b56d307976..4b2cf052246d4 100644
+index a707c0ea2ca62..29136a51488cf 100644
 --- a/components/update_client/update_query_params.cc
 +++ b/components/update_client/update_query_params.cc
 @@ -63,6 +63,8 @@ const char kArch[] =
@@ -22,7 +22,7 @@ index a36b56d307976..4b2cf052246d4 100644
  #else
  #error "unknown arch"
  #endif
-@@ -138,6 +140,8 @@ const char* UpdateQueryParams::GetNaclArch() {
+@@ -136,6 +138,8 @@ const char* UpdateQueryParams::GetNaclArch() {
    return "loong32";
  #elif defined(ARCH_CPU_LOONG64)
    return "loong64";

+ 4 - 4
0009-build-config-compiler-use_gold-linker-option.patch

@@ -1,7 +1,7 @@
-From 113b3389d4a9b3f596810a6d0b6e581cdc354e41 Mon Sep 17 00:00:00 2001
+From d19d7a13084f0d288bd7d04fafc5f052fe169cd5 Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Mon, 17 Jan 2022 04:48:24 +0000
-Subject: [PATCH 09/18] build: config: compiler: use_gold linker option
+Subject: [PATCH 09/21] build: config: compiler: use_gold linker option
 
 Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 ---
@@ -9,10 +9,10 @@ Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/build/config/compiler/compiler.gni b/build/config/compiler/compiler.gni
-index 590bfc5da5ebb..4664363ab1a6a 100644
+index 0567598343ea6..f5080708c9483 100644
 --- a/build/config/compiler/compiler.gni
 +++ b/build/config/compiler/compiler.gni
-@@ -229,7 +229,7 @@ declare_args() {
+@@ -223,7 +223,7 @@ declare_args() {
               (((is_linux || is_chromeos_lacros) &&
                 (current_cpu == "x64" || current_cpu == "x86" ||
                  current_cpu == "arm" || current_cpu == "arm64" ||

+ 8 - 8
0010-build-config-compiler-remove-flags-not-available-in-.patch

@@ -1,7 +1,7 @@
-From 1c5f889f1b11f01e66869eb99cab5e9a45894519 Mon Sep 17 00:00:00 2001
+From bef55e5fd42ed32c931f4ed52a628987cd1f229a Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Mon, 17 Jan 2022 08:15:52 +0000
-Subject: [PATCH 10/18] build: config: compiler: remove flags not available in
+Subject: [PATCH 10/21] build: config: compiler: remove flags not available in
  custom clang
 
 Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
@@ -10,10 +10,10 @@ Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
  1 file changed, 13 deletions(-)
 
 diff --git a/build/config/compiler/BUILD.gn b/build/config/compiler/BUILD.gn
-index a58b27f1a4ff3..2c8cfdaf3fee2 100644
+index f378b9560d153..38551f17df889 100644
 --- a/build/config/compiler/BUILD.gn
 +++ b/build/config/compiler/BUILD.gn
-@@ -348,7 +348,6 @@ config("compiler") {
+@@ -345,7 +345,6 @@ config("compiler") {
      }
  
      if (use_lld) {
@@ -21,7 +21,7 @@ index a58b27f1a4ff3..2c8cfdaf3fee2 100644
        if (lld_path != "") {
          ldflags += [ "-B$lld_path" ]
        }
-@@ -481,10 +480,6 @@ config("compiler") {
+@@ -478,10 +477,6 @@ config("compiler") {
      #}
    }
  
@@ -32,7 +32,7 @@ index a58b27f1a4ff3..2c8cfdaf3fee2 100644
    if (is_linux || is_chromeos) {
      cflags += [ "-pthread" ]
      # Do not use the -pthread ldflag here since it becomes a no-op
-@@ -495,8 +490,6 @@ config("compiler") {
+@@ -492,8 +487,6 @@ config("compiler") {
    # Clang-specific compiler flags setup.
    # ------------------------------------
    if (is_clang) {
@@ -41,7 +41,7 @@ index a58b27f1a4ff3..2c8cfdaf3fee2 100644
      # Enable -fmerge-all-constants. This used to be the default in clang
      # for over a decade. It makes clang non-conforming, but is fairly safe
      # in practice and saves some binary size. We might want to consider
-@@ -514,8 +507,6 @@ config("compiler") {
+@@ -511,8 +504,6 @@ config("compiler") {
        # On Windows, we call the linker directly, instead of calling it through
        # the driver.
        ldflags += [ "--color-diagnostics" ]
@@ -50,7 +50,7 @@ index a58b27f1a4ff3..2c8cfdaf3fee2 100644
      }
    }
  
-@@ -753,10 +744,6 @@ config("compiler") {
+@@ -749,10 +740,6 @@ config("compiler") {
    if (use_lld && !enable_call_graph_profile_sort) {
      if (is_win) {
        ldflags += [ "/call-graph-profile-sort:no" ]

+ 2 - 2
0011-build-config-add-atomic-build-flag.patch

@@ -1,7 +1,7 @@
-From d0971334579208f77a8d17b5e706d52463e0bbfc Mon Sep 17 00:00:00 2001
+From 68aa5df556e93bbc539b2e7c4d8c1176f1a5c19a Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Wed, 30 Mar 2022 05:43:35 +0000
-Subject: [PATCH 11/18] build: config: add atomic build flag
+Subject: [PATCH 11/21] build: config: add atomic build flag
 
 Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 ---

+ 4 - 4
0012-build-config-compiler-set-generic-riscv64-flags.patch

@@ -1,7 +1,7 @@
-From f6669b0988f1e40e2cfa0b58fb1e2bccd2af42ab Mon Sep 17 00:00:00 2001
+From 2afaf4d2e481f86a241df78807f09f8e27f2766a Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Fri, 14 Jan 2022 05:06:56 +0000
-Subject: [PATCH 12/18] build: config: compiler: set generic riscv64 flags
+Subject: [PATCH 12/21] build: config: compiler: set generic riscv64 flags
 
 Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 ---
@@ -9,10 +9,10 @@ Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
  1 file changed, 6 insertions(+)
 
 diff --git a/build/config/compiler/BUILD.gn b/build/config/compiler/BUILD.gn
-index 2c8cfdaf3fee2..8b751c25f2229 100644
+index 38551f17df889..99136e2834b9a 100644
 --- a/build/config/compiler/BUILD.gn
 +++ b/build/config/compiler/BUILD.gn
-@@ -1157,6 +1157,12 @@ config("compiler_cpu_abi") {
+@@ -1152,6 +1152,12 @@ config("compiler_cpu_abi") {
          cflags += [ "-m64" ]
          ldflags += [ "-m64" ]
        }

+ 2 - 2
0013-chrome-common-remove-unrar-code.patch

@@ -1,7 +1,7 @@
-From 34238a406f7c1d40b18b782faf5b1c2855f44107 Mon Sep 17 00:00:00 2001
+From b786a6b854fb87510fd1ae2801a65f67cbb32d33 Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Thu, 13 Jan 2022 08:57:34 +0000
-Subject: [PATCH 13/18] chrome: common: remove unrar code
+Subject: [PATCH 13/21] chrome: common: remove unrar code
 
 Upstream-status: Inappropriate
 

+ 2 - 2
0014-third_party-libaom-add-riscv-target.patch

@@ -1,7 +1,7 @@
-From cc46f13f10f3ddb0f3bb28d331cbd31dc0f3d397 Mon Sep 17 00:00:00 2001
+From 6301169f7bccf3af53f9f4e18f26df9ce0963363 Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Wed, 30 Mar 2022 11:24:25 +0000
-Subject: [PATCH 14/18] third_party: libaom: add riscv target
+Subject: [PATCH 14/21] third_party: libaom: add riscv target
 
 Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 ---

+ 2 - 2
0015-third_party-libvpx-add-riscv-target.patch

@@ -1,7 +1,7 @@
-From 855953bb289158cdd372eb138990d1bca4ca851d Mon Sep 17 00:00:00 2001
+From 9fac6d4bec43354233107d215d2a10da575e81d3 Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Wed, 30 Mar 2022 11:26:18 +0000
-Subject: [PATCH 15/18] third_party: libvpx: add riscv target
+Subject: [PATCH 15/21] third_party: libvpx: add riscv target
 
 Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 ---

+ 2 - 2
0016-third_party-crashpad-add-support-for-riscv.patch

@@ -1,7 +1,7 @@
-From d95a14331f87a8a389d35cc896a6ab30206b3f9f Mon Sep 17 00:00:00 2001
+From 1ebe516ac0b1ae7b8421f33adb40d11bdbbf4d94 Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Thu, 31 Mar 2022 00:35:10 +0000
-Subject: [PATCH 16/18] third_party: crashpad: add support for riscv
+Subject: [PATCH 16/21] third_party: crashpad: add support for riscv
 
 Credit to work contributed in Github.
 https://github.com/felixonmars/archriscv-packages/tree/master/chromium

+ 2 - 2
0017-third_party-lzma_sdk-add-riscv-arch-definition.patch

@@ -1,7 +1,7 @@
-From 1d07d1083a701b124791de2aa86ad6b53276c3d4 Mon Sep 17 00:00:00 2001
+From 482529f5f69e3944e1b4419af54cc36bf2ab4177 Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Fri, 14 Jan 2022 05:07:31 +0000
-Subject: [PATCH 17/18] third_party: lzma_sdk: add riscv arch definition
+Subject: [PATCH 17/21] third_party: lzma_sdk: add riscv arch definition
 
 Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 ---

+ 2 - 2
0018-build-linux-sysroot-create-a-sysroot-for-riscv.patch

@@ -1,7 +1,7 @@
-From 9740d7b669043e20142482f1e451c42e44ee2766 Mon Sep 17 00:00:00 2001
+From 2da7566427e37c028ba81e926a82da578ca1d909 Mon Sep 17 00:00:00 2001
 From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
 Date: Tue, 5 Apr 2022 06:40:16 +0000
-Subject: [PATCH 18/18] build: linux: sysroot: create a sysroot for riscv
+Subject: [PATCH 18/21] build: linux: sysroot: create a sysroot for riscv
 
 Upstream-status: Unidentified
 

+ 29 - 0
0019-workaround-for-files-not-found-in-sysroot.patch

@@ -0,0 +1,29 @@
+From 16b2129ed1f65609ed0f2da62334ced8b0018451 Mon Sep 17 00:00:00 2001
+From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
+Date: Thu, 28 Apr 2022 01:03:56 +0000
+Subject: [PATCH 19/21] workaround for files not found in sysroot
+
+Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
+---
+ buildtools/third_party/libc++/BUILD.gn | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/buildtools/third_party/libc++/BUILD.gn b/buildtools/third_party/libc++/BUILD.gn
+index 74b6ad644d49c..cf7ad5b2f8426 100644
+--- a/buildtools/third_party/libc++/BUILD.gn
++++ b/buildtools/third_party/libc++/BUILD.gn
+@@ -23,7 +23,10 @@ config("config") {
+       "-std:c++20",
+     ]
+   } else {
+-    cflags += [ "-fPIC" ]
++    cflags += [
++      "-fPIC",
++      "-isystem../../build/linux/debian_sid_riscv64-sysroot/usr/include",
++    ]
+     cflags_cc = [ "-std=c++20" ]
+   }
+ 
+-- 
+2.25.1
+

+ 27 - 0
0020-v8-settings.patch

@@ -0,0 +1,27 @@
+From fc741789fc4c36b3dbdae92f163b918950936e7e Mon Sep 17 00:00:00 2001
+From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
+Date: Thu, 28 Apr 2022 01:04:27 +0000
+Subject: [PATCH 20/21] v8 settings
+
+Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
+---
+ build/config/v8_target_cpu.gni | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/build/config/v8_target_cpu.gni b/build/config/v8_target_cpu.gni
+index 305981f3fa538..44b7700935cc6 100644
+--- a/build/config/v8_target_cpu.gni
++++ b/build/config/v8_target_cpu.gni
+@@ -49,6 +49,9 @@ if (v8_target_cpu == "") {
+     # code that will be run under a simulator, then the generated code
+     # also gets the benefits of the sanitizer.
+     v8_target_cpu = "arm64"
++  } else if (current_toolchain ==
++             "//build/toolchain/linux:clang_x86_v8_riscv64") {
++    v8_target_cpu = "riscv64"
+   } else {
+     v8_target_cpu = target_cpu
+   }
+-- 
+2.25.1
+

+ 35 - 0
0021-compiler-workaround.patch

@@ -0,0 +1,35 @@
+From 6a7bfbd6d1ce4281915fbf9e762cc3f4eae52ded Mon Sep 17 00:00:00 2001
+From: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
+Date: Thu, 28 Apr 2022 01:04:59 +0000
+Subject: [PATCH 21/21] compiler workaround
+
+Signed-off-by: Rebecca Chang Swee Fun <rebecca.chang@starfivetech.com>
+---
+ build/config/compiler/BUILD.gn | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/build/config/compiler/BUILD.gn b/build/config/compiler/BUILD.gn
+index 99136e2834b9a..5ef8f566db3dd 100644
+--- a/build/config/compiler/BUILD.gn
++++ b/build/config/compiler/BUILD.gn
+@@ -1154,6 +1154,7 @@ config("compiler_cpu_abi") {
+       }
+     } else if (current_cpu == "riscv64") {
+       cflags += [
++        "--target=riscv64-linux-gnu",
+         "-m64",
+         "-march=rv64gc",
+         "-mabi=lp64d",
+@@ -1627,7 +1628,8 @@ config("chromium_code") {
+ 
+     if (!is_debug && !using_sanitizer && current_cpu != "s390x" &&
+         current_cpu != "s390" && current_cpu != "ppc64" &&
+-        current_cpu != "mips" && current_cpu != "mips64") {
++        current_cpu != "mips" && current_cpu != "mips64" &&
++        current_cpu != "riscv64") {
+       # Non-chromium code is not guaranteed to compile cleanly with
+       # _FORTIFY_SOURCE. Also, fortified build may fail when optimizations are
+       # disabled, so only do that for Release build.
+-- 
+2.25.1
+

+ 1 - 1
README.md

@@ -73,7 +73,7 @@ solutions = [
 4. Checkout to specific commits where the patchset are based on.
 ```
 $ cd ~/chromium/src
-$ git checkout 9fc37dca35728
+$ git checkout f0f889644bcd1
 
 ```
 

+ 7 - 4
third_party/0001-third-party-angle.patch

@@ -1,19 +1,22 @@
 diff --git a/BUILD.gn b/BUILD.gn
-index ef402486c..ea007dcce 100644
+index 6e8a001a1..a59fb8116 100644
 --- a/BUILD.gn
 +++ b/BUILD.gn
-@@ -221,6 +221,9 @@ config("extra_warnings") {
+@@ -224,7 +224,12 @@ config("extra_warnings") {
        "-Wstrict-prototypes",
        "-Wunreachable-code-aggressive",
        "-Wshorten-64-to-32",
 +
 +      # Workaround for clang unable to locate pci/pci.h header
-+      "-isystem../../build/linux/debian_sid_riscv64-sysroot/usr/include/riscv64-linux-gnu",
++      "-I../../build/linux/debian_sid_riscv64-sysroot/usr/include/riscv64-linux-gnu",
      ]
++    # Workaround for linker unable to locate X11 related header
++    ldflags = [ "-Wl,-L../../build/linux/debian_sid_riscv64-sysroot/usr/lib/riscv64-linux-gnu" ]
    }
  
+   if (is_gcc) {
 diff --git a/gni/angle.gni b/gni/angle.gni
-index 5ccddb13e..804acecd1 100644
+index ac0273979..5d1f52eff 100644
 --- a/gni/angle.gni
 +++ b/gni/angle.gni
 @@ -74,7 +74,8 @@ declare_args() {

+ 1 - 1
third_party/0002-third-party-dawn.patch

@@ -1,5 +1,5 @@
 diff --git a/src/dawn/common/Platform.h b/src/dawn/common/Platform.h
-index f9471021f..cde974278 100644
+index 5e4f9d7ff..089824d52 100644
 --- a/src/dawn/common/Platform.h
 +++ b/src/dawn/common/Platform.h
 @@ -68,7 +68,7 @@

+ 1 - 1
third_party/0008-third-party-boringssl-src.patch

@@ -1,5 +1,5 @@
 diff --git a/include/openssl/base.h b/include/openssl/base.h
-index 983eadc5d..8a66adbbc 100644
+index b63023664..a89a90e64 100644
 --- a/include/openssl/base.h
 +++ b/include/openssl/base.h
 @@ -118,6 +118,8 @@ extern "C" {

+ 19 - 0
third_party/0011-third-party-highway-src.patch

@@ -1,3 +1,22 @@
+diff --git a/hwy/aligned_allocator.cc b/hwy/aligned_allocator.cc
+index bec7c3b..677fcf1 100644
+--- a/hwy/aligned_allocator.cc
++++ b/hwy/aligned_allocator.cc
+@@ -27,7 +27,14 @@
+ namespace hwy {
+ namespace {
+ 
++#if HWY_ARCH_RVV && defined(__riscv_vector)
++// Not actually an upper bound on the size, but this value prevents crossing a
++// 4K boundary (relevant on Andes).
++constexpr size_t kAlignment = HWY_MAX(HWY_ALIGNMENT, 4096);
++#else
+ constexpr size_t kAlignment = HWY_MAX(HWY_ALIGNMENT, kMaxVectorSize);
++#endif
++
+ // On x86, aliasing can only occur at multiples of 2K, but that's too wasteful
+ // if this is used for single-vector allocations. 256 is more reasonable.
+ constexpr size_t kAlias = kAlignment * 4;
 diff --git a/hwy/base.h b/hwy/base.h
 index d87eb34..db5df58 100644
 --- a/hwy/base.h

+ 17 - 0
third_party/0012-third-party-perfetto.patch

@@ -0,0 +1,17 @@
+diff --git a/gn/standalone/BUILD.gn b/gn/standalone/BUILD.gn
+index ab21e5877..d63efe924 100644
+--- a/gn/standalone/BUILD.gn
++++ b/gn/standalone/BUILD.gn
+@@ -252,6 +252,12 @@ config("default") {
+         "-msse4.2",
+       ]
+     }
++  } else if (target_cpu == "riscv64") {
++      cflags += [
++        "-m64",
++        "-march=rv64gc",
++        "-mabi=lp64d",
++      ]
+   }
+ 
+   if (is_linux) {

+ 14 - 0
third_party/0013-third-party-skia.patch

@@ -0,0 +1,14 @@
+diff --git a/gn/BUILDCONFIG.gn b/gn/BUILDCONFIG.gn
+index 44f39c5aaa..93ef968c5a 100644
+--- a/gn/BUILDCONFIG.gn
++++ b/gn/BUILDCONFIG.gn
+@@ -80,6 +80,9 @@ if (target_cpu == "") {
+ if (target_cpu == "x86_64") {
+   target_cpu = "x64"
+ }
++if (target_cpu == "riscv64") {
++  target_cpu = "riscv64"
++}
+ if (current_cpu == "") {
+   current_cpu = target_cpu
+ }