fdt_helper.c 21 KB

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  1. // SPDX-License-Identifier: BSD-2-Clause
  2. /*
  3. * fdt_helper.c - Flat Device Tree manipulation helper routines
  4. * Implement helper routines on top of libfdt for OpenSBI usage
  5. *
  6. * Copyright (C) 2020 Bin Meng <bmeng.cn@gmail.com>
  7. */
  8. #include <libfdt.h>
  9. #include <sbi/riscv_asm.h>
  10. #include <sbi/sbi_console.h>
  11. #include <sbi/sbi_hartmask.h>
  12. #include <sbi/sbi_platform.h>
  13. #include <sbi/sbi_scratch.h>
  14. #include <sbi_utils/fdt/fdt_helper.h>
  15. #include <sbi_utils/irqchip/aplic.h>
  16. #include <sbi_utils/irqchip/imsic.h>
  17. #include <sbi_utils/irqchip/plic.h>
  18. #define DEFAULT_UART_FREQ 0
  19. #define DEFAULT_UART_BAUD 115200
  20. #define DEFAULT_UART_REG_SHIFT 0
  21. #define DEFAULT_UART_REG_IO_WIDTH 1
  22. #define DEFAULT_UART_REG_OFFSET 0
  23. #define DEFAULT_SIFIVE_UART_FREQ 0
  24. #define DEFAULT_SIFIVE_UART_BAUD 115200
  25. #define DEFAULT_SIFIVE_UART_REG_SHIFT 0
  26. #define DEFAULT_SIFIVE_UART_REG_IO_WIDTH 4
  27. #define DEFAULT_GAISLER_UART_REG_IO_WIDTH 4
  28. #define DEFAULT_SHAKTI_UART_FREQ 50000000
  29. #define DEFAULT_SHAKTI_UART_BAUD 115200
  30. const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
  31. const struct fdt_match *match_table)
  32. {
  33. int ret;
  34. if (!fdt || nodeoff < 0 || !match_table)
  35. return NULL;
  36. while (match_table->compatible) {
  37. ret = fdt_node_check_compatible(fdt, nodeoff,
  38. match_table->compatible);
  39. if (!ret)
  40. return match_table;
  41. match_table++;
  42. }
  43. return NULL;
  44. }
  45. int fdt_find_match(void *fdt, int startoff,
  46. const struct fdt_match *match_table,
  47. const struct fdt_match **out_match)
  48. {
  49. int nodeoff;
  50. if (!fdt || !match_table)
  51. return SBI_ENODEV;
  52. while (match_table->compatible) {
  53. nodeoff = fdt_node_offset_by_compatible(fdt, startoff,
  54. match_table->compatible);
  55. if (nodeoff >= 0) {
  56. if (out_match)
  57. *out_match = match_table;
  58. return nodeoff;
  59. }
  60. match_table++;
  61. }
  62. return SBI_ENODEV;
  63. }
  64. int fdt_parse_phandle_with_args(void *fdt, int nodeoff,
  65. const char *prop, const char *cells_prop,
  66. int index, struct fdt_phandle_args *out_args)
  67. {
  68. u32 i, pcells;
  69. int len, pnodeoff;
  70. const fdt32_t *list, *list_end, *val;
  71. if (!fdt || (nodeoff < 0) || !prop || !cells_prop || !out_args)
  72. return SBI_EINVAL;
  73. list = fdt_getprop(fdt, nodeoff, prop, &len);
  74. if (!list)
  75. return SBI_ENOENT;
  76. list_end = list + (len / sizeof(*list));
  77. while (list < list_end) {
  78. pnodeoff = fdt_node_offset_by_phandle(fdt,
  79. fdt32_to_cpu(*list));
  80. if (pnodeoff < 0)
  81. return pnodeoff;
  82. list++;
  83. val = fdt_getprop(fdt, pnodeoff, cells_prop, &len);
  84. if (!val)
  85. return SBI_ENOENT;
  86. pcells = fdt32_to_cpu(*val);
  87. if (FDT_MAX_PHANDLE_ARGS < pcells)
  88. return SBI_EINVAL;
  89. if (list + pcells > list_end)
  90. return SBI_ENOENT;
  91. if (index > 0) {
  92. list += pcells;
  93. index--;
  94. } else {
  95. out_args->node_offset = pnodeoff;
  96. out_args->args_count = pcells;
  97. for (i = 0; i < pcells; i++)
  98. out_args->args[i] = fdt32_to_cpu(list[i]);
  99. return 0;
  100. }
  101. }
  102. return SBI_ENOENT;
  103. }
  104. static int fdt_translate_address(void *fdt, uint64_t reg, int parent,
  105. uint64_t *addr)
  106. {
  107. int i, rlen;
  108. int cell_addr, cell_size;
  109. const fdt32_t *ranges;
  110. uint64_t offset = 0, caddr = 0, paddr = 0, rsize = 0;
  111. cell_addr = fdt_address_cells(fdt, parent);
  112. if (cell_addr < 1)
  113. return SBI_ENODEV;
  114. cell_size = fdt_size_cells(fdt, parent);
  115. if (cell_size < 0)
  116. return SBI_ENODEV;
  117. ranges = fdt_getprop(fdt, parent, "ranges", &rlen);
  118. if (ranges && rlen > 0) {
  119. for (i = 0; i < cell_addr; i++)
  120. caddr = (caddr << 32) | fdt32_to_cpu(*ranges++);
  121. for (i = 0; i < cell_addr; i++)
  122. paddr = (paddr << 32) | fdt32_to_cpu(*ranges++);
  123. for (i = 0; i < cell_size; i++)
  124. rsize = (rsize << 32) | fdt32_to_cpu(*ranges++);
  125. if (reg < caddr || caddr >= (reg + rsize )) {
  126. sbi_printf("invalid address translation\n");
  127. return SBI_ENODEV;
  128. }
  129. offset = reg - caddr;
  130. *addr = paddr + offset;
  131. } else {
  132. /* No translation required */
  133. *addr = reg;
  134. }
  135. return 0;
  136. }
  137. int fdt_get_node_addr_size(void *fdt, int node, int index,
  138. uint64_t *addr, uint64_t *size)
  139. {
  140. int parent, len, i, rc;
  141. int cell_addr, cell_size;
  142. const fdt32_t *prop_addr, *prop_size;
  143. uint64_t temp = 0;
  144. if (!fdt || node < 0 || index < 0)
  145. return SBI_EINVAL;
  146. parent = fdt_parent_offset(fdt, node);
  147. if (parent < 0)
  148. return parent;
  149. cell_addr = fdt_address_cells(fdt, parent);
  150. if (cell_addr < 1)
  151. return SBI_ENODEV;
  152. cell_size = fdt_size_cells(fdt, parent);
  153. if (cell_size < 0)
  154. return SBI_ENODEV;
  155. prop_addr = fdt_getprop(fdt, node, "reg", &len);
  156. if (!prop_addr)
  157. return SBI_ENODEV;
  158. if ((len / sizeof(u32)) <= (index * (cell_addr + cell_size)))
  159. return SBI_EINVAL;
  160. prop_addr = prop_addr + (index * (cell_addr + cell_size));
  161. prop_size = prop_addr + cell_addr;
  162. if (addr) {
  163. for (i = 0; i < cell_addr; i++)
  164. temp = (temp << 32) | fdt32_to_cpu(*prop_addr++);
  165. do {
  166. if (parent < 0)
  167. break;
  168. rc = fdt_translate_address(fdt, temp, parent, addr);
  169. if (rc)
  170. break;
  171. parent = fdt_parent_offset(fdt, parent);
  172. temp = *addr;
  173. } while (1);
  174. }
  175. temp = 0;
  176. if (size) {
  177. for (i = 0; i < cell_size; i++)
  178. temp = (temp << 32) | fdt32_to_cpu(*prop_size++);
  179. *size = temp;
  180. }
  181. return 0;
  182. }
  183. bool fdt_node_is_enabled(void *fdt, int nodeoff)
  184. {
  185. int len;
  186. const void *prop;
  187. prop = fdt_getprop(fdt, nodeoff, "status", &len);
  188. if (!prop)
  189. return true;
  190. if (!strncmp(prop, "okay", strlen("okay")))
  191. return true;
  192. if (!strncmp(prop, "ok", strlen("ok")))
  193. return true;
  194. return false;
  195. }
  196. int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid)
  197. {
  198. int len;
  199. const void *prop;
  200. const fdt32_t *val;
  201. if (!fdt || cpu_offset < 0)
  202. return SBI_EINVAL;
  203. prop = fdt_getprop(fdt, cpu_offset, "device_type", &len);
  204. if (!prop || !len)
  205. return SBI_EINVAL;
  206. if (strncmp (prop, "cpu", strlen ("cpu")))
  207. return SBI_EINVAL;
  208. val = fdt_getprop(fdt, cpu_offset, "reg", &len);
  209. if (!val || len < sizeof(fdt32_t))
  210. return SBI_EINVAL;
  211. if (len > sizeof(fdt32_t))
  212. val++;
  213. if (hartid)
  214. *hartid = fdt32_to_cpu(*val);
  215. return 0;
  216. }
  217. int fdt_parse_max_enabled_hart_id(void *fdt, u32 *max_hartid)
  218. {
  219. u32 hartid;
  220. int err, cpu_offset, cpus_offset;
  221. if (!fdt)
  222. return SBI_EINVAL;
  223. if (!max_hartid)
  224. return 0;
  225. *max_hartid = 0;
  226. cpus_offset = fdt_path_offset(fdt, "/cpus");
  227. if (cpus_offset < 0)
  228. return cpus_offset;
  229. fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
  230. err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
  231. if (err)
  232. continue;
  233. if (!fdt_node_is_enabled(fdt, cpu_offset))
  234. continue;
  235. if (hartid > *max_hartid)
  236. *max_hartid = hartid;
  237. }
  238. return 0;
  239. }
  240. int fdt_parse_timebase_frequency(void *fdt, unsigned long *freq)
  241. {
  242. const fdt32_t *val;
  243. int len, cpus_offset;
  244. if (!fdt || !freq)
  245. return SBI_EINVAL;
  246. cpus_offset = fdt_path_offset(fdt, "/cpus");
  247. if (cpus_offset < 0)
  248. return cpus_offset;
  249. val = fdt_getprop(fdt, cpus_offset, "timebase-frequency", &len);
  250. if (len > 0 && val)
  251. *freq = fdt32_to_cpu(*val);
  252. else
  253. return SBI_ENOENT;
  254. return 0;
  255. }
  256. static int fdt_parse_uart_node_common(void *fdt, int nodeoffset,
  257. struct platform_uart_data *uart,
  258. unsigned long default_freq,
  259. unsigned long default_baud)
  260. {
  261. int len, rc;
  262. const fdt32_t *val;
  263. uint64_t reg_addr, reg_size;
  264. if (nodeoffset < 0 || !uart || !fdt)
  265. return SBI_ENODEV;
  266. rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
  267. &reg_addr, &reg_size);
  268. if (rc < 0 || !reg_addr || !reg_size)
  269. return SBI_ENODEV;
  270. uart->addr = reg_addr;
  271. /**
  272. * UART address is mandatory. clock-frequency and current-speed
  273. * may not be present. Don't return error.
  274. */
  275. val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "clock-frequency", &len);
  276. if (len > 0 && val)
  277. uart->freq = fdt32_to_cpu(*val);
  278. else
  279. uart->freq = default_freq;
  280. val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "current-speed", &len);
  281. if (len > 0 && val)
  282. uart->baud = fdt32_to_cpu(*val);
  283. else
  284. uart->baud = default_baud;
  285. return 0;
  286. }
  287. int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
  288. struct platform_uart_data *uart)
  289. {
  290. int rc;
  291. rc = fdt_parse_uart_node_common(fdt, nodeoffset, uart,
  292. DEFAULT_UART_FREQ,
  293. DEFAULT_UART_BAUD);
  294. if (rc)
  295. return rc;
  296. /* For Gaisler APBUART, the reg-shift and reg-io-width are fixed .*/
  297. uart->reg_shift = DEFAULT_UART_REG_SHIFT;
  298. uart->reg_io_width = DEFAULT_GAISLER_UART_REG_IO_WIDTH;
  299. return 0;
  300. }
  301. int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
  302. struct platform_uart_data *uart)
  303. {
  304. int rc;
  305. rc = fdt_parse_uart_node_common(fdt, nodeoffset, uart,
  306. DEFAULT_SHAKTI_UART_FREQ,
  307. DEFAULT_SHAKTI_UART_BAUD);
  308. return rc ? : 0;
  309. }
  310. int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
  311. struct platform_uart_data *uart)
  312. {
  313. int rc;
  314. rc = fdt_parse_uart_node_common(fdt, nodeoffset, uart,
  315. DEFAULT_SIFIVE_UART_FREQ,
  316. DEFAULT_SIFIVE_UART_BAUD);
  317. if (rc)
  318. return rc;
  319. /* For SiFive UART, the reg-shift and reg-io-width are fixed .*/
  320. uart->reg_shift = DEFAULT_SIFIVE_UART_REG_SHIFT;
  321. uart->reg_io_width = DEFAULT_SIFIVE_UART_REG_IO_WIDTH;
  322. return 0;
  323. }
  324. int fdt_parse_uart_node(void *fdt, int nodeoffset,
  325. struct platform_uart_data *uart)
  326. {
  327. int len, rc;
  328. const fdt32_t *val;
  329. rc = fdt_parse_uart_node_common(fdt, nodeoffset, uart,
  330. DEFAULT_UART_FREQ,
  331. DEFAULT_UART_BAUD);
  332. if (rc)
  333. return rc;
  334. val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "reg-shift", &len);
  335. if (len > 0 && val)
  336. uart->reg_shift = fdt32_to_cpu(*val);
  337. else
  338. uart->reg_shift = DEFAULT_UART_REG_SHIFT;
  339. val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "reg-io-width", &len);
  340. if (len > 0 && val)
  341. uart->reg_io_width = fdt32_to_cpu(*val);
  342. else
  343. uart->reg_io_width = DEFAULT_UART_REG_IO_WIDTH;
  344. val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "reg-offset", &len);
  345. if (len > 0 && val)
  346. uart->reg_offset = fdt32_to_cpu(*val);
  347. else
  348. uart->reg_offset = DEFAULT_UART_REG_OFFSET;
  349. return 0;
  350. }
  351. int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
  352. const char *compatible)
  353. {
  354. int nodeoffset;
  355. if (!compatible || !uart || !fdt)
  356. return SBI_ENODEV;
  357. nodeoffset = fdt_node_offset_by_compatible(fdt, -1, compatible);
  358. if (nodeoffset < 0)
  359. return nodeoffset;
  360. return fdt_parse_uart_node(fdt, nodeoffset, uart);
  361. }
  362. int fdt_parse_xlnx_uartlite_node(void *fdt, int nodeoffset,
  363. struct platform_uart_data *uart)
  364. {
  365. int rc;
  366. rc = fdt_parse_uart_node_common(fdt, nodeoffset, uart, 0, 0);
  367. return rc ? : 0;
  368. }
  369. int fdt_parse_aplic_node(void *fdt, int nodeoff, struct aplic_data *aplic)
  370. {
  371. bool child_found;
  372. const fdt32_t *val;
  373. const fdt32_t *del;
  374. struct imsic_data imsic;
  375. int i, j, d, dcnt, len, noff, rc;
  376. uint64_t reg_addr, reg_size;
  377. struct aplic_delegate_data *deleg;
  378. if (nodeoff < 0 || !aplic || !fdt)
  379. return SBI_ENODEV;
  380. memset(aplic, 0, sizeof(*aplic));
  381. rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &reg_addr, &reg_size);
  382. if (rc < 0 || !reg_addr || !reg_size)
  383. return SBI_ENODEV;
  384. aplic->addr = reg_addr;
  385. aplic->size = reg_size;
  386. val = fdt_getprop(fdt, nodeoff, "riscv,num-sources", &len);
  387. if (len > 0)
  388. aplic->num_source = fdt32_to_cpu(*val);
  389. val = fdt_getprop(fdt, nodeoff, "interrupts-extended", &len);
  390. if (val && len > sizeof(fdt32_t)) {
  391. len = len / sizeof(fdt32_t);
  392. for (i = 0; i < len; i += 2) {
  393. if (fdt32_to_cpu(val[i + 1]) == IRQ_M_EXT) {
  394. aplic->targets_mmode = true;
  395. break;
  396. }
  397. }
  398. aplic->num_idc = len / 2;
  399. goto aplic_msi_parent_done;
  400. }
  401. val = fdt_getprop(fdt, nodeoff, "msi-parent", &len);
  402. if (val && len >= sizeof(fdt32_t)) {
  403. noff = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*val));
  404. if (noff < 0)
  405. return noff;
  406. rc = fdt_parse_imsic_node(fdt, noff, &imsic);
  407. if (rc)
  408. return rc;
  409. rc = imsic_data_check(&imsic);
  410. if (rc)
  411. return rc;
  412. aplic->targets_mmode = imsic.targets_mmode;
  413. if (imsic.targets_mmode) {
  414. aplic->has_msicfg_mmode = true;
  415. aplic->msicfg_mmode.lhxs = imsic.guest_index_bits;
  416. aplic->msicfg_mmode.lhxw = imsic.hart_index_bits;
  417. aplic->msicfg_mmode.hhxw = imsic.group_index_bits;
  418. aplic->msicfg_mmode.hhxs = imsic.group_index_shift;
  419. if (aplic->msicfg_mmode.hhxs <
  420. (2 * IMSIC_MMIO_PAGE_SHIFT))
  421. return SBI_EINVAL;
  422. aplic->msicfg_mmode.hhxs -= 24;
  423. aplic->msicfg_mmode.base_addr = imsic.regs[0].addr;
  424. } else {
  425. goto aplic_msi_parent_done;
  426. }
  427. val = fdt_getprop(fdt, nodeoff, "riscv,children", &len);
  428. if (!val || len < sizeof(fdt32_t))
  429. goto aplic_msi_parent_done;
  430. noff = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*val));
  431. if (noff < 0)
  432. return noff;
  433. val = fdt_getprop(fdt, noff, "msi-parent", &len);
  434. if (!val || len < sizeof(fdt32_t))
  435. goto aplic_msi_parent_done;
  436. noff = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*val));
  437. if (noff < 0)
  438. return noff;
  439. rc = fdt_parse_imsic_node(fdt, noff, &imsic);
  440. if (rc)
  441. return rc;
  442. rc = imsic_data_check(&imsic);
  443. if (rc)
  444. return rc;
  445. if (!imsic.targets_mmode) {
  446. aplic->has_msicfg_smode = true;
  447. aplic->msicfg_smode.lhxs = imsic.guest_index_bits;
  448. aplic->msicfg_smode.lhxw = imsic.hart_index_bits;
  449. aplic->msicfg_smode.hhxw = imsic.group_index_bits;
  450. aplic->msicfg_smode.hhxs = imsic.group_index_shift;
  451. if (aplic->msicfg_smode.hhxs <
  452. (2 * IMSIC_MMIO_PAGE_SHIFT))
  453. return SBI_EINVAL;
  454. aplic->msicfg_smode.hhxs -= 24;
  455. aplic->msicfg_smode.base_addr = imsic.regs[0].addr;
  456. }
  457. }
  458. aplic_msi_parent_done:
  459. for (d = 0; d < APLIC_MAX_DELEGATE; d++) {
  460. deleg = &aplic->delegate[d];
  461. deleg->first_irq = 0;
  462. deleg->last_irq = 0;
  463. deleg->child_index = 0;
  464. }
  465. del = fdt_getprop(fdt, nodeoff, "riscv,delegate", &len);
  466. if (!del || len < (3 * sizeof(fdt32_t)))
  467. goto skip_delegate_parse;
  468. d = 0;
  469. dcnt = len / sizeof(fdt32_t);
  470. for (i = 0; i < dcnt; i += 3) {
  471. if (d >= APLIC_MAX_DELEGATE)
  472. break;
  473. deleg = &aplic->delegate[d];
  474. deleg->first_irq = fdt32_to_cpu(del[i + 1]);
  475. deleg->last_irq = fdt32_to_cpu(del[i + 2]);
  476. deleg->child_index = 0;
  477. child_found = false;
  478. val = fdt_getprop(fdt, nodeoff, "riscv,children", &len);
  479. if (!val || len < sizeof(fdt32_t)) {
  480. deleg->first_irq = 0;
  481. deleg->last_irq = 0;
  482. deleg->child_index = 0;
  483. continue;
  484. }
  485. len = len / sizeof(fdt32_t);
  486. for (j = 0; j < len; j++) {
  487. if (del[i] != val[j])
  488. continue;
  489. deleg->child_index = j;
  490. child_found = true;
  491. break;
  492. }
  493. if (child_found) {
  494. d++;
  495. } else {
  496. deleg->first_irq = 0;
  497. deleg->last_irq = 0;
  498. deleg->child_index = 0;
  499. }
  500. }
  501. skip_delegate_parse:
  502. return 0;
  503. }
  504. bool fdt_check_imsic_mlevel(void *fdt)
  505. {
  506. const fdt32_t *val;
  507. int i, len, noff = 0;
  508. if (!fdt)
  509. return false;
  510. while ((noff = fdt_node_offset_by_compatible(fdt, noff,
  511. "riscv,imsics")) >= 0) {
  512. val = fdt_getprop(fdt, noff, "interrupts-extended", &len);
  513. if (val && len > sizeof(fdt32_t)) {
  514. len = len / sizeof(fdt32_t);
  515. for (i = 0; i < len; i += 2) {
  516. if (fdt32_to_cpu(val[i + 1]) == IRQ_M_EXT)
  517. return true;
  518. }
  519. }
  520. }
  521. return false;
  522. }
  523. int fdt_parse_imsic_node(void *fdt, int nodeoff, struct imsic_data *imsic)
  524. {
  525. const fdt32_t *val;
  526. struct imsic_regs *regs;
  527. uint64_t reg_addr, reg_size;
  528. int i, rc, len, nr_parent_irqs;
  529. if (nodeoff < 0 || !imsic || !fdt)
  530. return SBI_ENODEV;
  531. imsic->targets_mmode = false;
  532. val = fdt_getprop(fdt, nodeoff, "interrupts-extended", &len);
  533. if (val && len > sizeof(fdt32_t)) {
  534. len = len / sizeof(fdt32_t);
  535. nr_parent_irqs = len / 2;
  536. for (i = 0; i < len; i += 2) {
  537. if (fdt32_to_cpu(val[i + 1]) == IRQ_M_EXT) {
  538. imsic->targets_mmode = true;
  539. break;
  540. }
  541. }
  542. } else
  543. return SBI_EINVAL;
  544. val = fdt_getprop(fdt, nodeoff, "riscv,guest-index-bits", &len);
  545. if (val && len > 0)
  546. imsic->guest_index_bits = fdt32_to_cpu(*val);
  547. else
  548. imsic->guest_index_bits = 0;
  549. val = fdt_getprop(fdt, nodeoff, "riscv,hart-index-bits", &len);
  550. if (val && len > 0) {
  551. imsic->hart_index_bits = fdt32_to_cpu(*val);
  552. } else {
  553. imsic->hart_index_bits = sbi_fls(nr_parent_irqs);
  554. if ((1UL << imsic->hart_index_bits) < nr_parent_irqs)
  555. imsic->hart_index_bits++;
  556. }
  557. val = fdt_getprop(fdt, nodeoff, "riscv,group-index-bits", &len);
  558. if (val && len > 0)
  559. imsic->group_index_bits = fdt32_to_cpu(*val);
  560. else
  561. imsic->group_index_bits = 0;
  562. val = fdt_getprop(fdt, nodeoff, "riscv,group-index-shift", &len);
  563. if (val && len > 0)
  564. imsic->group_index_shift = fdt32_to_cpu(*val);
  565. else
  566. imsic->group_index_shift = 2 * IMSIC_MMIO_PAGE_SHIFT;
  567. val = fdt_getprop(fdt, nodeoff, "riscv,num-ids", &len);
  568. if (val && len > 0)
  569. imsic->num_ids = fdt32_to_cpu(*val);
  570. else
  571. return SBI_EINVAL;
  572. for (i = 0; i < IMSIC_MAX_REGS; i++) {
  573. regs = &imsic->regs[i];
  574. regs->addr = 0;
  575. regs->size = 0;
  576. }
  577. for (i = 0; i < (IMSIC_MAX_REGS - 1); i++) {
  578. regs = &imsic->regs[i];
  579. rc = fdt_get_node_addr_size(fdt, nodeoff, i,
  580. &reg_addr, &reg_size);
  581. if (rc < 0 || !reg_addr || !reg_size)
  582. break;
  583. regs->addr = reg_addr;
  584. regs->size = reg_size;
  585. };
  586. if (!imsic->regs[0].size)
  587. return SBI_EINVAL;
  588. return 0;
  589. }
  590. int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic)
  591. {
  592. int len, rc;
  593. const fdt32_t *val;
  594. uint64_t reg_addr, reg_size;
  595. if (nodeoffset < 0 || !plic || !fdt)
  596. return SBI_ENODEV;
  597. rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
  598. &reg_addr, &reg_size);
  599. if (rc < 0 || !reg_addr || !reg_size)
  600. return SBI_ENODEV;
  601. plic->addr = reg_addr;
  602. val = fdt_getprop(fdt, nodeoffset, "riscv,ndev", &len);
  603. if (len > 0)
  604. plic->num_src = fdt32_to_cpu(*val);
  605. return 0;
  606. }
  607. int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat)
  608. {
  609. int nodeoffset;
  610. if (!compat || !plic || !fdt)
  611. return SBI_ENODEV;
  612. nodeoffset = fdt_node_offset_by_compatible(fdt, -1, compat);
  613. if (nodeoffset < 0)
  614. return nodeoffset;
  615. return fdt_parse_plic_node(fdt, nodeoffset, plic);
  616. }
  617. int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
  618. unsigned long *out_addr1, unsigned long *out_size1,
  619. unsigned long *out_addr2, unsigned long *out_size2,
  620. u32 *out_first_hartid, u32 *out_hart_count)
  621. {
  622. const fdt32_t *val;
  623. uint64_t reg_addr, reg_size;
  624. int i, rc, count, cpu_offset, cpu_intc_offset;
  625. u32 phandle, hwirq, hartid, first_hartid, last_hartid, hart_count;
  626. u32 match_hwirq = (for_timer) ? IRQ_M_TIMER : IRQ_M_SOFT;
  627. if (nodeoffset < 0 || !fdt ||
  628. !out_addr1 || !out_size1 ||
  629. !out_first_hartid || !out_hart_count)
  630. return SBI_EINVAL;
  631. rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
  632. &reg_addr, &reg_size);
  633. if (rc < 0 || !reg_size)
  634. return SBI_ENODEV;
  635. *out_addr1 = reg_addr;
  636. *out_size1 = reg_size;
  637. rc = fdt_get_node_addr_size(fdt, nodeoffset, 1,
  638. &reg_addr, &reg_size);
  639. if (rc < 0 || !reg_size)
  640. reg_addr = reg_size = 0;
  641. if (out_addr2)
  642. *out_addr2 = reg_addr;
  643. if (out_size2)
  644. *out_size2 = reg_size;
  645. *out_first_hartid = 0;
  646. *out_hart_count = 0;
  647. val = fdt_getprop(fdt, nodeoffset, "interrupts-extended", &count);
  648. if (!val || count < sizeof(fdt32_t))
  649. return 0;
  650. count = count / sizeof(fdt32_t);
  651. first_hartid = -1U;
  652. hart_count = last_hartid = 0;
  653. for (i = 0; i < (count / 2); i++) {
  654. phandle = fdt32_to_cpu(val[2 * i]);
  655. hwirq = fdt32_to_cpu(val[(2 * i) + 1]);
  656. cpu_intc_offset = fdt_node_offset_by_phandle(fdt, phandle);
  657. if (cpu_intc_offset < 0)
  658. continue;
  659. cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
  660. if (cpu_intc_offset < 0)
  661. continue;
  662. rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
  663. if (rc)
  664. continue;
  665. if (SBI_HARTMASK_MAX_BITS <= hartid)
  666. continue;
  667. if (match_hwirq == hwirq) {
  668. if (hartid < first_hartid)
  669. first_hartid = hartid;
  670. if (hartid > last_hartid)
  671. last_hartid = hartid;
  672. hart_count++;
  673. }
  674. }
  675. if ((last_hartid >= first_hartid) && first_hartid != -1U) {
  676. *out_first_hartid = first_hartid;
  677. count = last_hartid - first_hartid + 1;
  678. *out_hart_count = (hart_count < count) ? hart_count : count;
  679. }
  680. return 0;
  681. }
  682. int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
  683. unsigned long *plmt_size, u32 *hart_count)
  684. {
  685. const fdt32_t *val;
  686. int rc, i, count;
  687. uint64_t reg_addr, reg_size, cpu_offset, cpu_intc_offset;
  688. u32 phandle, hwirq, hartid, hcount;
  689. if (nodeoffset < 0 || !fdt || !plmt_base ||
  690. !hart_count || !plmt_size)
  691. return SBI_EINVAL;
  692. rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
  693. &reg_addr, &reg_size);
  694. if (rc < 0 || !plmt_base || !plmt_size)
  695. return SBI_ENODEV;
  696. *plmt_base = reg_addr;
  697. *plmt_size = reg_size;
  698. val = fdt_getprop(fdt, nodeoffset, "interrupts-extended", &count);
  699. if (!val || count < sizeof(fdt32_t))
  700. return 0;
  701. count = count / sizeof(fdt32_t);
  702. hcount = 0;
  703. for (i = 0; i < (count / 2); i++) {
  704. phandle = fdt32_to_cpu(val[2 * i]);
  705. hwirq = fdt32_to_cpu(val[2 * i + 1]);
  706. cpu_intc_offset = fdt_node_offset_by_phandle(fdt, phandle);
  707. if (cpu_intc_offset < 0)
  708. continue;
  709. cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
  710. if (cpu_intc_offset < 0)
  711. continue;
  712. rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
  713. if (rc)
  714. continue;
  715. if (SBI_HARTMASK_MAX_BITS <= hartid)
  716. continue;
  717. if (hwirq == IRQ_M_TIMER)
  718. hcount++;
  719. }
  720. *hart_count = hcount;
  721. return 0;
  722. }
  723. int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
  724. const char *compatible)
  725. {
  726. int nodeoffset, rc;
  727. nodeoffset = fdt_node_offset_by_compatible(fdt, -1, compatible);
  728. if (nodeoffset < 0)
  729. return nodeoffset;
  730. rc = fdt_get_node_addr_size(fdt, nodeoffset, 0, addr, NULL);
  731. if (rc < 0 || !addr)
  732. return SBI_ENODEV;
  733. return 0;
  734. }